SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
FEATURES
• Access Times: 12, 15, 20, 25, 35, 45, 55, 70, & 100ns
• Battery Backup: 2V data retention
• Low power standby
• High-performance, low-power CMOS double-metal process
• Single +5V (+10%) Power Supply
• Easy memory expansion with CE\
• All inputs and outputs are TTL compatible
OPTIONS MARKING
•Timing
12ns access1-12
15ns access1-15
20ns access -20
25ns access -25
35ns access -35
45ns access -45
55ns access2-55
70ns access2-70
100ns access -1004
•Package(s)3
Ceramic DIP (300 mil) C No. 108
Ceramic DIP (600 mil) CW No. 110
Ceramic LCC (28 leads) EC No. 204
Ceramic LCC (32 leads) ECW No. 208
Ceramic Flat Pack F No. 302
Ceramic SOJ ECJ No. 500
•Operating Temperature Ranges
Military -55oC to +125oCXT
Industrial -40oC to +85oCIT
• 2V data retention/low power L
NOTES:
1. -12 and -15 available in IT only.
2. Electrical characteristics identical to those provided for the
45ns access devices.
3. Plastic SOJ (DJ Package) is available on the AS5C2568 datasheet.
4. Available in CW, ECW, and F packages only.
PIN ASSIGNMENT
(T op View)
AVAILABLE AS MILITARY
SPECIFICATIONS
•SMD 5962-88662
•MIL-STD-883
28-PIN SOJ (ECJ)
28-Pin DIP (C, CW) 32-Pin LCC (ECW)
28-Pin Flat P ack (F)
28-Pin LCC (EC)
GENERAL DESCRIPTION
The Austin Semiconductor SRAM family employs
high-speed, low power CMOS designs using a four-transistor
memory cell. These SRAMs are fabricated using double-layer
metal, double-layer polysilicon technology .
For flexibility in high-speed memory applications, Aus-
tin Semiconductor offers chip enable (CE\) and output enable
(OE\) capability . These enhancements can place the outputs in
High-Z for additional flexibility in system design.
Writing to these devices is accomplished when write
enable (WE\) and CE\ inputs are both LOW . Reading is accom-
plished when WE\ remains HIGH and CE\ and OE\ go LOW.
The device offers a reduced power standby mode when dis-
abled. This allows system designs to achieve low standby
power requirements.
The “L” version provides a battery backup/low volt-
age data retention mode, offering 2mW maximum power dissi-
pation at 2 volts. All devices operate from a single +5V power
supply and all inputs and outputs are fully TTL compatible.
4 3 2 1 32 31 30
A7
A12
A14
NC
V
CC
WE\
A13
14 15 16 17 18 19 20
DQ2
DQ3
V
SS
NC
DQ4
DQ5
DQ6
5
6
7
8
9
10
11
12
13
A6
A5
A4
A3
A2
A1
A0
NC
DQ1
29
28
27
26
25
24
23
22
21
A8
A9
A11
NC
OE\
A10
CE\
DQ8
DQ7
3 2 1 28 27
A7
A12
A14
V
CC
WE\
13 14 15 16 17
DQ3
V
SS
DQ4
DQ5
DQ6
4
5
6
7
8
9
10
11
12
A6
A5
A4
A3
A2
A1
A0
DQ1
DQ2
26
25
24
23
22
21
20
19
18
A13
A8
A9
A11
OE\
A10
CE\
DQ8
DQ7
A14 1 28 V
CC
A12 2 27 WE\
A7 3 26 A13
A6 4 25 A8
A5 5 24 A9
A4 6 23 A11
A3 7 22 OE\
A2 8 21 A10
A1 9 20 CE\
A0 10 19 DQ8
DQ1 11 18 DQ7
DQ2 12 17 DQ6
DQ3 13 16 DQ5
V
SS
14 15 DQ4
32K x 8 SRAM
SRAM MEMORY ARRAY
For more products and information
please visit our web site at
www.austinsemiconductor.com
A14 1 28 V
CC
A12 2 27 WE\
A7 3 26 A13
A6 4 25 A8
A5 5 24 A9
A4 6 23 A11
A3 7 22 OE\
A2 8 21 A10
A1 9 20 CE\
A0 10 19 DQ8
DQ1 11 18 DQ7
DQ2 12 17 DQ6
DQ3 13 16 DQ5
V
SS
14 15 DQ4
SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
2
FUNCTIONAL BLOCK DIAGRAM
TRUTH TABLE
A0 Vcc
GND
A14
I/O0
I/O7
CE\
OE\
WE\
9A128-1
DECODER
I/O
DATA
CIRCUIT
CONTROL
CIRCUIT
256 x 1024
MEMORY ARRAY
COLUMN I/O
MODE OE\ CE\ WE\ DQ POWER
STANDBY X H X HIGH-Z STANDBY
READ L L H Q ACTIVE
READ H L H HIGH-Z ACTIVE
WRITE X L L D ACTIVE
SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
3
ABSOLUTE MAXIMUM RA TINGS*
Voltage on Any Input or DQ Relative
to Vss..................................................................-0.5V to Vcc +0.5V
Voltage on Vcc Supply Relative to Vss.......................-1V to +7V
Storage T emperature..............................................-65oC to +150oC
Power Dissipation.......................................................................1W
Short Circuit Output Current.................................................50mA
Lead T emperature (soldering 10 seconds)........................+260oC
Max. Junction T emperature.................................................+175oC
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operation section of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods
may affect reliability .
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC < TC < 125oC or -40oC to +85oC; VCC = 5.0V +10%)
CAPACITANCE
DESCRIPTION CONDITIONS SYMBOL MIN MAX UNITS NOTES
Input High (Logic 1) Voltage V
IH
2.2 Vcc+0.5 V 1
Input Low (Logic 0) Voltage V
IL
-0.5 0.8 V 1, 2
Input Leakage Current 0V ≤ V
IN
≤ Vcc IL
I
-5 5 µA
Output Leakage Current Output(s) disabled
0V < V
OUT
< Vcc IL
O
-5 5 µA
Output High Voltage I
OH
= -4.0mA V
OH
2.4 V 1
Output Low Voltage I
OL
= 8.0mA V
OL
0.4 V 1
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PARAMETER CONDITIONS SYM MAX
UNITS
NOTES
Input Capacitance C
IN
8pF4
Input/Output Capacitance C
IO
10 pF 4
T
A
= 25
o
C, f = 1MHz
Vcc = 5V
SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
4
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55oC < TC < 125oC or -40oC to +85oC; VCC = 5.0V +10%)
SYM MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX UNITS NOTES
READ cycle time
t
RC 12 15 20 25 35 45 ns
Address access time
t
AA 12 15 20 25 35 45 ns
Chip Enable access time
t
ACE 12 15 20 25 35 45 ns
Output hold from address change
t
OH 222222ns
Chip Enable to output in Low-Z
t
LZCE 222222ns7
Chip disable to output in High-Z
t
HZCE 7 8 9 10 14 15 ns 6,7
Chip Enable to power-up time
t
PU 000000ns4
Chip disable to power-down time
t
PD 12 15 20 25 35 45 ns 4
Output Enable access time
t
AOE 678101415ns
Output Enable to output in Low-Z
t
LZOE 000000ns
Output disable to output in High-Z
t
HZOE 6 7 8 10 14 15 ns 6
WRITE cycle time
t
WC 12 15 20 25 35 45 ns
Chip Enable to end of write
t
CW 9 10 12 15 17 22 ns
Address valid to end of write
t
AW 9 10 12 15 17 22 ns
Address setup time
t
AS 000000ns
Address hold from end of write
t
AH 0 0 0 0 0 0 ns
WRITE pulse width
t
WP 10 12 15 17 20 25 ns
Data setup time
t
DS 7 8 10 12 15 20 ns
Data hold time
t
DH 000000ns
Write disable to output in Low-Z
t
LZWE 222222ns7
Write Enable to output in High-Z
t
HZWE 0 7 0 7 0 9 0 10 0 13 0 14 ns 6,7
WRITE CYCLE
-35 -45
DESCRIPTION
READ CYCLE
-15 -20 -25-12
SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
NOTES
1 . All voltages referenced to VSS (GND).
2 . -3V for pulse width < 20ns
3. ICC is dependent on output loading and cycle rates. The
specified value applies with the outputs unloaded, and
f = 1 Hz.
tRC (MIN)
4. This parameter is guaranteed but not tested.
5. Test conditions as specified with the output loading as
shown in Fig. 1 unless otherwise noted.
6. t HZCE, tHZOE and tHZWE are specified with CL = 5pF
as in Fig. 2. Transition is measured ±500mV typical from
steady state voltage, allowing for actual tester RC time
constant.
7. At any given temperature and voltage condition, tHZCE
is less than tLZCE, and tHZWE is less than tLZWE.
8 . WE\ is HIGH for READ cycle.
9. Device is continuously selected. Chip enables and
output enables are held in their active state.
10. Address valid prior to, or coincident with, latest
occurring chip enable.
11. tRC = Read Cycle Time.
1 2 . Chip enable (CE\) and write enable (WE\) can initiate and
terminate a WRITE cycle.
DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)
LOW Vcc D ATA RETENTION WAVEFORM
123
1
2
3
1
2
3
123
1
23
4
1
23
4
1
23
4
1234
DON’T CARE
UNDEFINED
AC TEST CONDITIONS
Input pulse levels....................................................Vss to 3V
Input rise and fall times.....................................................5ns
Input timing reference level.............................................1.5V
Output reference level......................................................1.5V
Output load.................................................See figures 1 & 2
DESCRIPTION SYMBOL MIN MAX UNITS NOTES
V
CC
for Retention Data V
DR
2--V
V
CC
= 2V I
CCDR
1.0 mA
V
CC
= 3V 2.0 mA
Chip Deselect to Data
Retention Time
t
CDR 0-- ns 4
Operation Recovery Time
t
R
t
RC ns 4, 11
Data Retention Current CE\ > (V
CC
- 0.2V)
V
IN
> (V
CC
- 0.2V)
or < 0.2V
CONDITIONS
12345678
12345678
12345678
12345678
12345678
123
1
2
3
1
2
3
1
2
3
123
1234
1
23
4
1
23
4
1234
12345678
12345678
12345678
12345678
12345678
12
12
12
12
12
123
1
2
3
1
2
3
123
DAT A RETENTION MODE
VDR > 2V
4.5V 4.5V
VDR
tCDR tR
VIH
VIL
VCC
CE\
Fig. 2
OUTPUT LOAD
EQUIVALENT
Fig. 1
OUTPUT LOAD
EQUIVALENT
+5V
Q
255 30 pF
480
5 pF
+5V
Q
255
480
SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
6
tAA
tOH
tRCtRC
PREVIOUS DATA VALID
VALID
DATA VALID
ADDRESS
DQ
tPD
tPU
tHZCEtACE
tLZCE
tHZOE
tLZOE
tAOE
tRCtRC
DATA VALID
CE\
OE\
DQ
Icc
READ CYCLE NO. 1 8, 9
READ CYCLE NO. 2 7, 8, 10, 12
SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
7
WRITE CYCLE NO. 1 12
(Chip Enabled Controlled)
WRITE CYCLE NO. 2 7, 12
(Write Enabled Controlled)
tDHtDS
tWP1tWP1
tAH
tCW
tAW
tCWtAS
tWCtWC
HIGH Z
DATA VAILD
ADDRESS
CE\
WE\
D
Q
tDH
tWP1tWP1
tAS
tAW
tCW tAH
tCW
tWCtWC
DATA VALID
ADDRESS
CE\
WE\
D
Q
HIGH-Z
NOTE: Output enable (OE\) is inactive (HIGH).
SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
8
MECHANICAL DEFINITIONS*
ASI Case #108 (Package Designator C)
SMD 5962-88662, Case Outline N
NOTE: These dimensions are per the SMD. ASI's package dimensional limits may
differ, but they will be within the SMD limits.
* All measurements are in inches.
S2 A
Q
L
eb
b2
S1
D
E
MIN MAX
A --- 0.225
b 0.014 0.026
b2 0.045 0.065
c 0.008 0.018
D --- 1.485
E 0.240 0.310
eA
e
L 0.125 0.200
Q 0.015 0.070
S1 0.005 ---
S2 0.005 ---
SYMBOL
0.100 BSC
SMD SPECIFICATIONS
0.300 BSC
eA c
SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
9
* All measurements are in inches.
MECHANICAL DEFINITIONS*
ASI Case #110 (Package Designator CW)
SMD 5962-88662, Case Outline X
NOTE: These dimensions are per the SMD. ASI's package dimensional limits may
differ, but they will be within the SMD limits.
S2 A
Q
L
eb
b2
S1
D
E
MIN MAX
A --- 0.232
b 0.014 0.026
b2 0.045 0.065
c 0.008 0.018
D --- 1.490
E 0.500 0.610
eA
e
L 0.125 0.200
Q 0.015 0.060
S1 0.005 ---
S2 0.005 ---
SYMBOL
0.100 BSC
SMD SPECIFICATIONS
0.600 BSC
eA c
SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
10
* All measurements are in inches.
MECHANICAL DEFINITIONS*
ASI Case #204 (Package Designator EC)
SMD 5962-88662, Case Outline U
NOTE: These dimensions are per the SMD. ASI's package dimensional limits may
differ, but they will be within the SMD limits.
E
D
E3
hx45o
A
A1
D3
MIN MAX
A 0.060 0.120
A1 0.050 0.088
B1 0.022 0.028
B2
D 0.342 0.358
D1
D2
D3 --- 0.358
E 0.540 0.560
E1
E2
E3 --- 0.558
e
h
L 0.045 0.055
L1 0.075 0.095
SYMBOL SMD SPECIFICATIONS
0.072 REF
0.200 BSC
0.100 BSC
0.040 REF
0.050 BSC
0.200 BSC
0.400 BSC
E1
L1
B1
D1
L
e
B2
E2
D2
SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
11
* All measurements are in inches.
E
D
E3
hx45o
A
A1
D3
E1
L1
B1
D1
L
e
B2
E2
D2
MIN MAX
A 0.060 0.120
A1 0.050 0.088
B1 0.022 0.028
B2
D 0.442 0.458
D1
D2
D3 --- 0.458
E 0.540 0.560
E1
E2
E3 --- 0.558
e
h
L 0.045 0.055
L1 0.075 0.095
0.150 BSC
0.040 REF
0.050 BSC
0.200 BSC
0.400 BSC
SYMBOL SMD SPECIFICATIONS
0.072 REF
0.300 BSC
MECHANICAL DEFINITIONS*
ASI Case #208 (Package Designator ECW)
SMD 5962-88662, Case Outline Y
NOTE: These dimensions are per the SMD. ASI's package dimensional limits may
differ, but they will be within the SMD limits.
SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
12
* All measurements are in inches.
MECHANICAL DEFINITIONS*
ASI Case #302 (Package Designator F)
SMD 5962-88662, Case Outline T
L
c
E2
A
Q
E3
E
MIN
MAX
A 0.090 0.130
b 0.015 0.019
c 0.004 0.009
D --- 0.740
E 0.380 0.420
E2 0.180 ---
E3 0.030 ---
e
L 0.250 0.370
Q 0.026 0.045
S 0.000 0.045
SYMBOL SMD SPECIFICATIONS
0.050 BSC
NOTE: These dimensions are per the SMD. ASI's package dimensional limits may
differ, but they will be within the SMD limits.
D
e
b
T op View
S
SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
13
* All measurements are in inches.
ASI Case #500 (Package Designator ECJ)
MECHANICAL DEFINITIONS*
A
A2
e
b
D
E
D1
E1
E2
B1
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SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
14
ORDERING INFORMATION
*AVAILABLE PROCESSES
IT = Industrial T emperature Range -40oC to +85oC
XT = Extended T emperature Range -55oC to +125oC
883C = Full Military Processing -55oC to +125oC
12ns & 15ns offered in IT only
**DEFINITION OF OPTIONS
2V Data Retention / Low Power L
Device Number Options** Package
Type Speed ns Process Device Number Options** Package
Type Speed ns Process
MT5C2568
MT5C2568 L
LC
CW -12
-12 /*
/* MT5C2568
MT5C2568 L
LEC
ECW -12
-12 /*
/*
MT5C2568
MT5C2568 L
LC
CW -15
-15 /*
/* MT5C2568
MT5C2568 L
LEC
ECW -15
-15 /*
/*
MT5C2568
MT5C2568 L
LC
CW -20
-20 /*
/* MT5C2568
MT5C2568 L
LEC
ECW -20
-20 /*
/*
MT5C2568
MT5C2568 L
LC
CW -25
-25 /*
/* MT5C2568
MT5C2568 L
LEC
ECW -25
-25 /*
/*
MT5C2568
MT5C2568 L
LC
CW -35
-35 /*
/* MT5C2568
MT5C2568 L
LEC
ECW -35
-35 /*
/*
MT5C2568
MT5C2568 L
LC
CW -45
-45 /*
/* MT5C2568
MT5C2568 L
LEC
ECW -45
-45 /*
/*
MT5C2568
MT5C2568 L
LC
CW -55
-55 /*
/* MT5C2568
MT5C2568 L
LEC
ECW -55
-55 /*
/*
MT5C2568
MT5C2568 L
LC
CW -70
-70 /*
/* MT5C2568
MT5C2568 L
LEC
ECW -70
-70 /*
/*
MT5C2568 L CW -100 /* MT5C2568 L ECW -100 /*
Device Number Options** Package
Type Speed ns Process Device Number Options** Package
Type Speed ns Process
MT5C2568 L F -12 /* MT5C2568 L ECJ -12 /*
/*
MT5C2568 L F -15 /* MT5C2568 L ECJ -15 /*
/*
MT5C2568 L F -20 /* MT5C2568 L ECJ -20 /*
/*
MT5C2568 L F -25 /* MT5C2568 L ECJ -25 /*
/*
MT5C2568 L F -35 /* MT5C2568 L ECJ -35 /*
/*
MT5C2568 L F -45 /* MT5C2568 L ECJ -45 /*
/*
MT5C2568 L F -55 /* MT5C2568 L ECJ -55 /*
/*
MT5C2568 L F -70 /* MT5C2568 L ECJ -70 /*
/*
MT5C2568 L F -100 /*
EXAMPLE: MT5C2568L CW-25/XT
EXAMPLE: MT5C2568F-55/XT
EXAMPLE: MT5C2568L ECW-15/IT
EXAMPLE: MT5C2568L ECJ-70/IT
SRAM
MT5C2568
Austin Semiconductor, Inc.
MT5C2568
Rev. 1.0 9/99
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
15
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.
ASI TO DSCC PART NUMBER
CROSS REFERENCE*
ASI Package Designator C & CW
ASI Part # SMD Part #
MT5C2568C-20/883C 5962-8866207NX
MT5C2568C-25/883C 5962-8866206NX
MT5C2568C-35/883C 5962-8866205NX
MT5C2568C-45/883C 5962-8866204NX
MT5C2568C-55/883C 5962-8866203NX
MT5C2568C-70/883C 5962-8866202NX
MT5C2568CW-20/883C 5962-8866207XX
MT5C2568CW-25/883C 5962-8866206XX
MT5C2568CW-35/883C 5962-8866205XX
MT5C2568CW-45/883C 5962-8866204XX
MT5C2568CW-55/883C 5962-8866203XX
MT5C2568CW-70/883C 5962-8866202XX
MT5C2568CW-100/883C 5962-8866201XX
ASI Package Designator EC & ECW
ASI Part # SMD Part #
MT5C2568EC-20/883C 5962-8866207UX
MT5C2568EC-25/883C 5962-8866206UX
MT5C2568EC-35/883C 5962-8866205UX
MT5C2568EC-45/883C 5962-8866204UX
MT5C2568EC-55/883C 5962-8866203UX
MT5C2568EC-70/883C 5962-8866202UX
MT5C2568ECW-20/883C 5962-8866207YX
MT5C2568ECW-25/883C 5962-8866206YX
MT5C2568ECW-35/883C 5962-8866205YX
MT5C2568ECW-45/883C 5962-8866204YX
MT5C2568ECW-55/883C 5962-8866203YX
MT5C2568ECW-70/883C 5962-8866202YX
MT5C2568ECW-100/883C 5962-8866201YX
ASI Package Designator F
ASI Part # SMD Part #
MT5C2568F-20/883C 5962-8866207TX
MT5C2568F-25/883C 5962-8866206TX
MT5C2568F-35/883C 5962-8866205TX
MT5C2568F-45/883C 5962-8866204TX
MT5C2568F-55/883C 5962-8866203TX
MT5C2568F-70/883C 5962-8866202TX
MT5C2568F-100/883C 5962-8866201TX