PESD3V3L5UY - Philips Semiconductors / NXP Semiconductors

DATA SH EET

Product speciﬁcation 2004 Mar 23

DISCRETE SEMICONDUCTORS

PESD3V3L5UY; PESD5V0L5UY

Low capacitance 5-fold ESD

protection diode arrays in SOT363

package

ook, halfpage

MBD128

2004 Mar 23 2

Philips Semiconductors Product speciﬁcation

Low capacitance 5-fold ESD protection

diode arrays in SOT363 package PESD3V3L5UY;

PESD5V0L5UY

FEATURES

•Uni-directional ESD protection of up to five lines

•Bi-directional ESD protection of up to four lines

•Low diode capacitance

•Maximum peak pulse power: Ppp = 25 W at tp= 8/20 µs

•Low clamping voltage: VCL(R) = 12 V at Ipp = 2.5 A

•Ultra low leakage current: IRM = 8 nA at VRWM =5V

•ESD protection > 20 kV

•IEC 61000-4-2; level 4 (ESD)

•IEC 61000-4-5 (surge); Ipp = 2.5 A at Tp= 8/20 µs.

APPLICATIONS

•Cellular handsets and accessories

•Portable electronics

•Computers and peripherals

•Communications systems

•Audio and video equipment.

DESCRIPTION

Low capacitance 5-fold ESD protection array in the very

small SOT363 plastic package designed to protect up to

five transmission or data lines from the damage caused by

Electrostatic Discharge (ESD).

MARKING

Note

1. * = p: Made in Hong Kong.

* = t: Made in Malaysia.

* = W: Made in China.

TYPE NUMBER MARKING CODE(1)

PESD3V3L5UY *K3

PESD5V0L5UY *K4

PINNING

PIN DESCRIPTION

1 cathode 1

2 common anode

3 cathode 2

4 cathode 3

5 cathode 4

6 cathode 5

001aaa212

132

sym011

Fig.1 Simplified outline (SOT363) and symbol.

QUICK REFERENCE DATA

SYMBOL PARAMETER VALUE UNIT

VRWM reverse standoff voltage

PESD3V3L5UY 3.3 V

PESD5V0L5UY 5 V

Cddiode capacitance

PESD3V3L5UY 22 pF

PESD5V0L5UY 16 pF

number of protected lines 5

ORDERING INFORMATION

TYPE NUMBER PACKAGE

NAME DESCRIPTION VERSION

PESD3V3L5UY −plastic surface mounted package; 6 leads SOT363

PESD5V0L5UY −plastic surface mounted package; 6 leads SOT363

2004 Mar 23 3

Philips Semiconductors Product speciﬁcation

Low capacitance 5-fold ESD protection

diode arrays in SOT363 package PESD3V3L5UY;

PESD5V0L5UY

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134).

Notes

1. Non-repetitive current pulse 8/20 µs exponentially decaying waveform; see Fig.2.

2. Measured from any of pins 1, 3, 4, 5 or 6 to pin 2.

ESD maximum ratings

Notes

1. Device stressed with ten non-repetitive Electrostatic Discharge (ESD) pulses; see Fig.3.

2. Measured from any of pins 1, 3, 4, 5 or 6 to pin 2.

ESD standards compliance

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

Per diode

Ppp peak pulse power 8/20 µs pulse; notes 1 and 2 −25 W

Ipp peak pulse current 8/20 µs pulse; notes 1 and 2 −2.5 A

Tjjunction temperature −150 °C

Tamb operating ambient temperature −65 +150 °C

Tstg storage temperature −65 +150 °C

SYMBOL PARAMETER CONDITIONS VALUE UNIT

Per diode

ESD electrostatic discharge capability IEC 61000-4-2 (contact discharge);

notes 1 and 2 20 kV

HBM MIL-Std 883 10 kV

ESD STANDARD CONDITIONS

IEC 61000-4-2, level 4 (ESD) > 15 kV (air); > 8 kV (contact)

HBM MIL-Std 883, class 3 > 4 kV

2004 Mar 23 4

Philips Semiconductors Product speciﬁcation

Low capacitance 5-fold ESD protection

diode arrays in SOT363 package PESD3V3L5UY;

PESD5V0L5UY

handbook, halfpage

010

e−t

20 t (µs)

Ipp

(%)

120

MLE218

100 % Ipp; 8 µs

50 % Ipp; 20 µs

Fig.2 8/20 µs pulse waveform according to

IEC 61000-4-5.

001aaa191

Ipp

100 %

90 %

30 ns 60 ns

10 %

tr = 0.7 to 1 ns

Fig.3 Electrostatic Discharge (ESD) pulse

waveform according to IEC 61000-4-2.

2004 Mar 23 5

Philips Semiconductors Product speciﬁcation

Low capacitance 5-fold ESD protection

diode arrays in SOT363 package PESD3V3L5UY;

PESD5V0L5UY

CHARACTERISTICS

Tj=25°C unless otherwise speciﬁed.

Notes

1. Non-repetitive current pulse 8/20 µs exponentially decaying waveform; see Fig.2.

2. Measured from any of pins 1, 3, 4, 5 or 6 to pin 2.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Per diode

VRWM reverse stand-off voltage

PESD3V3L5UY −−3.3 V

PESD5V0L5UY −−5V

IRM reverse leakage current

PESD3V3L5UY VRWM = 3.3 V −75 300 nA

PESD5V0L5UY VRWM =5V −525nA

VBR breakdown voltage IZ=1mA

PESD3V3L5UY 5.3 5.6 5.9 V

PESD5V0L5UY 6.4 6.8 7.2 V

Cddiode capacitance f = 1 MHz; VR=0V;

see Fig.5

PESD3V3L5UY −22 28 pF

PESD5V0L5UY −16 19 pF

VCL(R) clamping voltage notes 1 and 2

PESD3V3L5UY Ipp =1A −−10 V

Ipp = 2.5 A −−12 V

PESD5V0L5UY Ipp =1A −−10 V

Ipp = 2.5 A −−12 V

rdiff differential resistance IR=1mA

PESD3V3L5UY −−200 Ω

PESD5V0L5UY −−100 Ω

2004 Mar 23 6

Philips Semiconductors Product speciﬁcation

Low capacitance 5-fold ESD protection

diode arrays in SOT363 package PESD3V3L5UY;

PESD5V0L5UY

GRAPHICAL DATA

001aaa208

tp (µs)

110

103

10 102

102

Ppp

(W)

Fig.4 Peak pulse power dissipation as a function

of pulse time; typical values.

Tamb =25°C.

Ipp = 8/20 µs exponentially decaying waveform; see Fig.2.

001aaa209

0.4

0.8

0.2

0.6

1.0

Tj (°C)

0 15010050

Ppp(Tj)

Ppp(Tj=25°C)

Fig.5 Relative variation of peak pulse power as a

function of junction temperature; typical

values.

VR (V)

054231

(1)

(2)

001aaa210

(pF)

Fig.6 Diode capacitance as a function of reverse

voltage; typical values.

(1) PESD3V3L5UY.

(2) PESD5V0L5UY.

f = 1 MHz; Tamb =25°C.

001aaa211

Tj (°C)

−75 −25 17512525 75

10−1

IR(Tj)

IR(Tj=25°C)

Fig.7 Relative variation of reverse leakage

current as a function of junction

temperature; typical values.

2004 Mar 23 7

Philips Semiconductors Product speciﬁcation

Low capacitance 5-fold ESD protection

diode arrays in SOT363 package PESD3V3L5UY;

PESD5V0L5UY

001aaa218

50 Ω

D.U.T.: PESDxL5UY

Note 1: Attenuator is only used for open

socket high voltage measurements

vertical scale = 200 V/div

horizontal scale = 50 ns/div

unclamped +1 kV ESD voltage waveform

(IEC61000-4-2 network) clamped +1 kV ESD voltage waveform

(IEC61000-4-2 network)

unclamped −1 kV ESD voltage waveform

(IEC61000-4-2 network) clamped −1 kV ESD voltage waveform

(IEC61000-4-2 network)

vertical scale = 5 V/div

horizontal scale = 50 ns/div

vertical scale = 200 V/div

horizontal scale = 50 ns/div vertical scale = 5 V/div

horizontal scale = 50 ns/div

GND

GND1

GND2

GND

450 ΩRG 223/U

50 Ω coax

ESD TESTER 4 GHz DIGITAL

OSCILLOSCOPE

10×

ATTENUATOR

note 1

IEC 61000-4-2 network

CZ = 150 pF; RZ = 330 Ω

PESD5V0L5UY

PESD3V3L5UY

Fig.8 ESD clamping test set-up and waveforms.

2004 Mar 23 8

Philips Semiconductors Product speciﬁcation

Low capacitance 5-fold ESD protection

diode arrays in SOT363 package PESD3V3L5UY;

PESD5V0L5UY

APPLICATION INFORMATION

The PESDxL5UY is designed for the uni-directional protection of up to five lines or bi-directional protection of four lines

from the damage caused by Electrostatic Discharge (ESD) and surge pulses. The PESDxL5UY may be used on lines

where the signal polarities are above or below ground. PESDxL5UY can withstand and provides protection from a surge

of 25 watts peak pulse power per line for a 8/20 µs waveform.

001aaa216

PESDxL5UY

GND

high speed data lines

Fig.9 Typical application for uni-directional

protection of five lines.

001aaa214

PESDxL5UY

GND

high speed data lines

Fig.10 Typical application for bi-directional

protection of four lines.

Circuit board layout and protection device placement

Circuit board layout is critical for the suppression of ESD,

Electrical Fast Transient (EFT) and surge transients. The

following guidelines are recommended:

1. The protection device should be placed as closely as

possible to the input terminal or connector.

2. Thepathlengthbetweentheprotectiondeviceandthe

protected line should be as short as possible.

3. Parallel signal paths should be kept to a minimum.

4. Running protection conductors in parallel with

unprotected conductor should be avoided.

5. All printed-circuit board conductive loops (including

power and group loops) should be kept to a minimum.

6. The length of the transient return path to ground

should be kept to a minimum.

7. The use of shared transient return paths to a common

ground point should be avoided.

8. Ground planes should be used whenever possible.

9. For multilayer printed-circuit boards, ground vias

should be used.

2004 Mar 23 9

Philips Semiconductors Product speciﬁcation

Low capacitance 5-fold ESD protection

diode arrays in SOT363 package PESD3V3L5UY;

PESD5V0L5UY

PACKAGE OUTLINE

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC EIAJ

SOT363 SC-88

pin 1

index A

detail X

0 1 2 mm

scale

132

Plastic surface mounted package; 6 leads SOT363

UNIT A1

max bpcDEe

HELpQywv

mm 0.1 0.30

0.20 2.2

1.8

0.25

0.10 1.35

1.15 0.65

1.3 2.2

2.0 0.2 0.10.2

DIMENSIONS (mm are the original dimensions)

0.45

0.15 0.25

0.15

1.1

0.8

97-02-28

2004 Mar 23 10

Philips Semiconductors Product speciﬁcation

Low capacitance 5-fold ESD protection

diode arrays in SOT363 package PESD3V3L5UY;

PESD5V0L5UY

DATA SHEET STATUS

Notes

1. Please consult the most recently issued data sheet before initiating or completing a design.

2. The product status of the device(s) described in this data sheet may have changed since this data sheet was

published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.

3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.

LEVEL DATA SHEET

STATUS(1) PRODUCT

STATUS(2)(3) DEFINITION

I Objective data Development This data sheet contains data from the objective speciﬁcation for product

development. Philips Semiconductors reserves the right to change the

speciﬁcation in any manner without notice.

II Preliminary data Qualiﬁcation This data sheet contains data from the preliminary speciﬁcation.

Supplementary data will be published at a later date. Philips

Semiconductors reserves the right to change the speciﬁcation without

notice, in order to improve the design and supply the best possible

product.

III Product data Production This data sheet contains data from the product speciﬁcation. Philips

Semiconductors reserves the right to make changes at any time in order

to improve the design, manufacturing and supply. Relevant changes will

be communicated via a Customer Product/Process Change Notiﬁcation

(CPCN).

DEFINITIONS

Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the

same type number and title. For detailed information see

the relevant data sheet or data handbook.

Limiting values definition Limiting values given are in

accordance with the Absolute Maximum Rating System

(IEC 60134). Stress above one or more of the limiting

values may cause permanent damage to the device.

These are stress ratings only and operation of the device

attheseoratany otherconditionsabove thosegivenin the

Characteristics sections of the specification is not implied.

Exposure to limiting values for extended periods may

affect device reliability.

Application information  Applications that are

described herein for any of these products are for

illustrative purposes only. Philips Semiconductors make

norepresentationor warrantythatsuchapplicationswill be

suitable for the specified use without further testing or

modification.

DISCLAIMERS

Life support applications  These products are not

designed for use in life support appliances, devices, or

systems where malfunction of these products can

reasonably be expected to result in personal injury. Philips

Semiconductorscustomersusing orsellingthese products

for use in such applications do so at their own risk and

agree to fully indemnify Philips Semiconductors for any

damages resulting from such application.

Right to make changes  Philips Semiconductors

reserves the right to make changes in the products -

including circuits, standard cells, and/or software -

described or contained herein in order to improve design

and/or performance. When the product is in full production

(status ‘Production’), relevant changes will be

communicated via a Customer Product/Process Change

Notification (CPCN). Philips Semiconductors assumes no

responsibility or liability for the use of any of these

products, conveys no licence or title under any patent,

makes no representations or warranties that these

products are free from patent, copyright, or mask work

right infringement, unless otherwise specified.

All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed

without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license

under patent- or other industrial or intellectual property rights.

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Contact information

For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825

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Printed in The Netherlands R76/01/pp11 Date of release: 2004 Mar 23 Document order number: 9397 750 12255