LTC3621/LTC3621-2 17V, 1A Synchronous Step-Down Regulator with 3.5A Quiescent Current Description Features n n n n n n n n n n n n n n Wide VIN Range: 2.7V to 17V Wide VOUT Range: 0.6V to VIN 95% Max Efficiency Low IQ < 3.5A, Zero-Current Shutdown Constant Frequency (1MHz/2.25MHz) Full Dropout Operation with Low IQ 1A Rated Output Current 1% Output Voltage Accuracy Current Mode Operation for Excellent Line and Load Transient Response Synchronizable to External Clock Pulse-Skipping, Forced Continuous, Burst Mode(R) Operation Internal Compensation and Soft-Start Overtemperature Protection Compact 6-Lead DFN (2mm x 3mm) Package or Thermally-Enhanced MS8E Package with Power Good Output and Independent SGND Pin Applications n n n n Portable-Handheld Scanners Industrial and Embedded Computing Automotive Applications Emergency Radio The LTC(R)3621/LTC3621-2 is a high efficiency 17V, 1A synchronous monolithic step-down regulator. The switching frequency is fixed to 1MHz or 2.25MHz with a 40% synchronizing range. The regulator features ultralow quiescent current and high efficiencies over a wide VOUT range. The step-down regulator operates from an input voltage range of 2.7V to 17V and provides an adjustable output range from 0.6V to VIN while delivering up to 1A of output current. A user-selectable mode input is provided to allow the user to trade off ripple noise for light load efficiency; Burst Mode operation provides the highest efficiency at light loads, while pulse-skipping mode provides the lowest voltage ripple. The MODE pin can also be used to allow the user to sync the switching frequency to an external clock. LTC3621 Options PART NAME FREQUENCY VOUT LTC3621 1.00MHz Adjustable LTC3621-3.3 1.00MHz 3.3V LTC3621-5 1.00MHz 5V LTC3621-2 2.25MHz Adjustable LTC3621-23.3 2.25MHz 3.3V LTC3621-25 2.25MHz 5V L, LT, LTC, LTM, Burst Mode, Linear Technology, the Linear logo and LTSpice are registered trademarks and Hot Swap and LTpowerCAD are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5481178, 6580258, 6498466, 6611131, 6177787, 5705919, 5847554. Typical Application Efficiency and Power Loss vs Load at 1MHz 2.5V VOUT with 400mA Burst Clamp, fSW = 1MHz 4.7H SW VIN 604k LTC3621 RUN FB MODE/SYNC INTVCC GND 22pF 22F 191k 1F 3621 TA01a 0.5 EFFICIENCY 80 70 0.4 60 50 0.3 POWER LOSS 40 0.2 30 20 10 0 0 0.2 0.4 0.6 LOAD CURRENT (A) POWER LOSS (W) 10F VOUT 2.5V 1A 0.6 VIN = 12V 90 EFFICIENCY (%) VIN 2.7V TO 17V 100 VOUT = 5V 0.1 VOUT = 3.3V VOUT = 2.5V 0 1 0.8 3621 TA01b 3621fc For more information www.linear.com/LTC3621 1 LTC3621/LTC3621-2 Absolute Maximum Ratings (Note 1) VIN Voltage.................................................. 17V to -0.3V RUN Voltage................................................ VIN to -0.3V MODE/SYNC, FB Voltages............................. 6V to -0.3V PGOOD Voltages........................................... 6V to -0.3V Operating Junction Temperature Range (Notes 3, 6, 7) LTC3621E, LTC3621I........................... -40C to 125C LTC3621H........................................... -40C to 150C Storage Temperature Range................... -65C to 150C Pin Configuration TOP VIEW TOP VIEW 6 MODE/SYNC SW 1 VIN 2 7 GND SW VIN RUN PGOOD 5 INTVCC 4 FB RUN 3 DCB PACKAGE 6-LEAD (2mm x 3mm) PLASTIC DFN TJMAX = 125C, JA = 64C/W, JC = 9.6C/W EXPOSED PAD (PIN 7) IS GND, MUST BE SOLDERED TO PCB 1 2 3 4 9 GND 8 7 6 5 SGND MODE/SYNC INTVCC FB MS8E PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 150C, JA = 40C/W, JC = 10C/W EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3621EDCB#PBF LTC3621EDCB#TRPBF LGDG 6-Lead (2mm x 3mm) Plastic DFN -40C to 125C LTC3621IDCB#PBF LTC3621IDCB#TRPBF LGDG 6-Lead (2mm x 3mm) Plastic DFN -40C to 125C LTC3621EDCB-3.3#PBF LTC3621EDCB-3.3#TRPBF LGQF 6-Lead (2mm x 3mm) Plastic DFN -40C to 125C LTC3621IDCB-3.3#PBF LTC3621IDCB-3.3#TRPBF LGQF 6-Lead (2mm x 3mm) Plastic DFN -40C to 125C LTC3621EDCB-5#PBF LTC3621EDCB-5#TRPBF LGQC 6-Lead (2mm x 3mm) Plastic DFN -40C to 125C LTC3621IDCB-5#PBF LTC3621IDCB-5#TRPBF LGQC 6-Lead (2mm x 3mm) Plastic DFN -40C to 125C LTC3621EMS8E#PBF LTC3621EMS8E#TRPBF LTGDH 8-Lead Plastic MSOP -40C to 125C LTC3621IMS8E#PBF LTC3621IMS8E#TRPBF LTGDH 8-Lead Plastic MSOP -40C to 125C LTC3621HMS8E#PBF LTC3621HMS8E#TRPBF LTGDH 8-Lead Plastic MSOP -40C to 150C LTC3621EMS8E-3.3#PBF LTC3621EMS8E-3.3#TRPBF LTGNY 8-Lead Plastic MSOP -40C to 125C LTC3621IMS8E-3.3#PBF LTC3621IMS8E-3.3#TRPBF LTGNY 8-Lead Plastic MSOP -40C to 125C LTC3621HMS8E-3.3#PBF LTC3621HMS8E-3.3#TRPBF LTGNY 8-Lead Plastic MSOP -40C to 150C LTC3621EMS8E-5#PBF LTC3621EMS8E-5#TRPBF LTGNX 8-Lead Plastic MSOP -40C to 125C LTC3621IMS8E-5#PBF LTC3621IMS8E-5#TRPBF LTGNX 8-Lead Plastic MSOP -40C to 125C LTC3621HMS8E-5#PBF LTC3621HMS8E-5#TRPBF LTGNX 8-Lead Plastic MSOP -40C to 150C LTC3621EDCB-2#PBF LTC3621EDCB-2#TRPBF LGHY 6-Lead (2mm x 3mm) Plastic DFN -40C to 125C LTC3621IDCB-2#PBF LTC3621IDCB-2#TRPBF LGHY 6-Lead (2mm x 3mm) Plastic DFN -40C to 125C LTC3621EDCB-23.3#PBF LTC3621EDCB-23.3#TRPBF LGQG 6-Lead (2mm x 3mm) Plastic DFN -40C to 125C LTC3621IDCB-23.3#PBF LTC3621IDCB-23.3#TRPBF LGQG 6-Lead (2mm x 3mm) Plastic DFN -40C to 125C LTC3621EDCB-25#PBF LTC3621EDCB-25#TRPBF LGQD 6-Lead (2mm x 3mm) Plastic DFN -40C to 125C LTC3621IDCB-25#PBF LTC3621IDCB-25#TRPBF LGQD 6-Lead (2mm x 3mm) Plastic DFN -40C to 125C 2 3621fc For more information www.linear.com/LTC3621 LTC3621/LTC3621-2 Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3621EMS8E-2#PBF LTC3621EMS8E-2#TRPBF LTGHZ 8-Lead Plastic MSOP -40C to 125C LTC3621IMS8E-2#PBF LTC3621IMS8E-2#TRPBF LTGHZ 8-Lead Plastic MSOP -40C to 125C LTC3621HMS8E-2#PBF LTC3621HMS8E-2#TRPBF LTGHZ 8-Lead Plastic MSOP -40C to 150C LTC3621EMS8E-23.3#PBF LTC3621EMS8E-23.3#TRPBF LTGNZ 8-Lead Plastic MSOP -40C to 125C LTC3621IMS8E-23.3#PBF LTGNZ 8-Lead Plastic MSOP -40C to 125C LTC3621HMS8E-23.3#PBF LTC3621HMS8E-23.3#TRPBF LTGNZ 8-Lead Plastic MSOP -40C to 150C LTC3621EMS8E-25#PBF LTC3621EMS8E-25#TRPBF LTGQB 8-Lead Plastic MSOP -40C to 125C LTC3621IMS8E-25#PBF LTC3621IMS8E-25#TRPBF LTGQB 8-Lead Plastic MSOP -40C to 125C LTC3621HMS8E-25#PBF LTC3621HMS8E-25#TRPBF LTGQB 8-Lead Plastic MSOP -40C to 150C LTC3621IMS8E-23.3#TRPBF Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ Electrical Characteristics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TJ = 25C. (Note 3) VIN = 12V, unless otherwise noted. SYMBOL PARAMETER VIN Operating Voltage CONDITIONS MIN VOUT Operating Voltage IVIN Input Quiescent Current Shutdown Mode, VRUN = 0V Burst Mode Operation Forced Continuous Mode (Note 4), VFB < 0.6V VFB Regulated Feedback Voltage LTC3621/LTC3621-2 FB Input Current LTC3621/LTC3621-2 VOUT Regulated Fixed Output Voltage LTC3621-3.3/LTC3621-23.3 MAX 17 0.6 IFB UNITS V VIN V 0.1 3.5 1.5 1.0 7 A A mA l 0.594 0.591 0.6 0.6 0.606 0.609 V V 10 nA l 3.267 3.250 3.3 3.3 3.333 3.350 V V l 4.950 4.925 5.0 5.0 5.050 5.075 V V LTC3621-5/LTC3621-25 2 10 A VLINE(REG) Reference Voltage Line Regulation VIN = 2.7V to 17V (Note 5) 0.01 0.015 %/V VLOAD(REG) Output Voltage Load Regulation (Note 5) 0.1 1 1 A A IFB(VOUT) ILSW RDS(ON) Feedback Input Leakage Current TYP 2.7 Fixed Output Versions NMOS Switch Leakage PMOS Switch Leakage NMOS On-Resistance (Bottom FET) 0.1 0.1 VIN = 5V PMOS On-Resistance (Top FET) DMAX Maximum Duty Cycle tON(MIN) Minimum On-Time VRUN RUN Input High Threshold RUN Input Low Threshold IRUN RUN Input Current VFB = 0.5V, VMODE/SYNC = 1.5V l 0.15 0.37 100 % 60 ns 0.3 VRUN = 12V % 0 1.0 V V 20 nA 3621fc For more information www.linear.com/LTC3621 3 LTC3621/LTC3621-2 Electrical Characteristics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TJ = 25C. (Note 3) VIN = 12V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN VMODE/SYNC Pulse-Skipping Mode Burst Mode Operation Forced Continuous Mode IMODE/SYNC MODE/SYNC Input Current tSS Internal Soft-Start Time ILIM Peak Current Limit VUVLO VINTVCC Undervoltage Lockout VUVLO(HYS) VINTVCC Undervoltage Lockout Hysteresis VOVLO VIN Overvoltage Lockout Rising VOVLO(HYS) VIN Overvoltage Lockout Hysteresis fOSC Oscillator Frequency fSYNC SYNC Capture Range VINTVCC VINTVCC LDO Output Voltage VPGOOD Power Good Range TYP 0.3 VINTVCC - 0.4 1.0 0 (E/I-Grade) (H-Grade) l l VIN Ramping Up VINTVCC - 1.2 20 nA ms 1.44 1.30 1.2 1.60 1.76 1.80 1.80 A A A 2.4 2.6 2.7 V 250 l UNITS V V V 0.8 18 19 mV 20 300 V mV LTC3621/LTC3621-3.3/LTC3621-5 (E/I-Grade) (H-Grade) 0.92 0.82 0.78 1.00 l l 1.08 1.16 1.16 MHz MHz MHz LTC3621-2/LTC3621-23.3/LTC3621-25 (E/I-Grade) (H-Grade) 2.05 1.8 1.7 2.25 l l 2.45 2.6 2.6 MHz MHz MHz 140 % 7.5 12.5 % 350 60 VIN > 4V 3.6 RPGOOD Power Good Resistance PGOOD RDS(ON) at 500A 275 tPGOOD PGOOD Delay PGOOD Low to High PGOOD High to Low 0 32 IPGOOD PGOOD Leakage Current V Cycles Cycles 100 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Transient absolute maximum voltages should not be applied for more than 4% of the switching duty cycle. Note 3: The LTC3621 is tested under pulsed load conditions such that TJ TA. The LTC3621E is guaranteed to meet specifications from 0C to 85C junction temperature. Specifications over the -40C to 125C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3621I is guaranteed over the -40C to 125C operating junction temperature range, and the LTC3621H is guaranteed over the -40C to 150C operating junction temperature range. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125C. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. 4 MAX nA Note 4: The quiescent current in forced continuous mode does not include switching loss of the power FETs. Note 5: The LTC3621 is tested in a proprietary test mode that connects VFB to the output of error amplifier. Note 6: TJ is calculated from the ambient, TA, and power dissipation, PD, according to the following formula: TJ = TA + (PD * JA) Note 7: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 150C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. 3621fc For more information www.linear.com/LTC3621 LTC3621/LTC3621-2 Typical Performance Characteristics TJ = 25C, unless otherwise noted. VIN Supply Current vs Input Voltage Efficiency vs Load Current (Burst Mode Operation) 100 Efficiency vs Load at Dropout Operation 100 5 90 90 70 60 50 40 30 20 VOUT = 2.5V VOUT = 3.3V 10 VIN = 12V VOUT = 5V FREQUENCY = 2.25MHz 0 0.001 0.1 0.01 1 LOAD CURRENT (A) 4 80 3 EFFICIENCY (%) VIN SUPPLY CURRENT (A) EFFICIENCY (%) 80 SLEEP 2 1 0 Burst Mode OPERATION 70 60 FORCED CONTINUOUS MODE 50 40 30 20 0 2 4 0 0.0001 6 8 10 12 14 16 18 20 INPUT VOLTAGE (V) 3621 G01 VIN = 5V FREQUENCY = 2.25MHz 10 SD 0.001 0.1 0.01 LOAD CURRENT (A) 1 3621 G03 3621 G02 Burst Mode Operation Pulse-Skipping Mode Operation Load Step SW 5V/DIV SW 5V/DIV VOUT 100mV/DIV VOUT AC-COUPLED 50mV/DIV VOUT AC-COUPLED 50mV/DIV IL 500mA/DIV IL 500mA/DIV IL 500mA/DIV ILOAD 500mA/DIV 3621 G04 VIN = 12V VOUT = 3.3V PULSE SKIP MODE IOUT = 10mA L = 2.2H Soft-Start Operation VIN = 12V VOUT = 3.3V ILOAD = 0.05A EFFICIENCY (%) IL 0.5A/DIV VOUT 1V/DIV PGOOD 2V/DIV 3621 G07 96 94 92 90 88 86 84 82 80 78 76 74 72 70 40s/DIV 3621 G06 Oscillator Frequency vs Temperature Efficiency vs Input Voltage RUN 5V/DIV 400s/DIV 3621 G05 4s/DIV 2.50 VOUT = 2.5V 2.45 OSCILLATOR FREQUENCY (MHz) 4s/DIV VIN = 12V VOUT = 3.3V Burst Mode OPERATION IOUT = 50mA L = 2.2H ILOAD = 1A ILOAD = 10mA 2.40 2.35 2.30 2.25 2.20 2.15 2.10 2.05 0 5 20 10 15 INPUT VOLTAGE (V) 3621 G08 2.00 -50 -25 0 25 50 75 100 125 150 TEMPERATURE (C) 3621 G09 3621fc For more information www.linear.com/LTC3621 5 LTC3621/LTC3621-2 Typical Performance Characteristics TJ = 25C, unless otherwise noted. Oscillator Frequency vs Supply Voltage Efficiency vs Load at 1MHz 2.50 90 2.45 80 EFFICIENCY (%) 70 60 50 40 30 20 VOUT = 2.5V VOUT = 3.3V VOUT = 5V 10 VIN = 12V 0 0.0001 0.001 0.1 0.01 LOAD CURRENT (A) 600.5 600.0 2.40 REFERENCE VOLTAGE OSCILLATOR FREQUENCY (MHz) 100 Reference Voltage vs Temperature 2.35 2.30 2.25 2.20 2.15 2.10 599.5 599.0 598.5 598.0 2.05 1 2.00 2 3621 G16 12 7 SUPPLY VOLTAGE (V) 597.5 -100 17 50 100 0 TEMPERATURE (C) -50 3521 G11 3621 G10 RDS(ON) vs Input Voltage RDS(ON) vs Temperature 700 550 4 300 2 400 350 300 250 200 0 2 4 0 -1 -3 150 -4 100 -50 -25 6 8 10 12 14 16 18 20 INPUT VOLTAGE (V) 1 -2 BOTTOM FET 200 BOTTOM FET VIN = 12V VOUT = 3.3V FORCED CONTINUOUS MODE 3 TOP FET VOUT (%) TOP FET 400 100 5 450 500 Load Regulation 600 500 RDS(ON) (m) RDS(ON) (m) 600 0 -5 25 50 75 100 125 150 TEMPERATURE (C) 3621 G12 0 1500 500 1000 LOAD CURRENT (mA) 3621 G14 3621 G13 VIN Supply Current vs Temperature Line Regulation 0.5 150 Switch Leakage vs Temperature 6 30 27 0.1 -0.1 -0.3 -0.5 24 21 4 SLEEP 3 2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 INPUT VOLTAGE (V) 0 -50 -25 18 15 12 9 BOTTOM FET 6 3 1 3621 G15 6 5 SW LEAKAGE (A) VIN SUPPLY CURRENT (A) VOUT ERROR (%) 0.3 0 SHUTDOWN 0 25 50 75 100 125 150 TEMPERATURE (C) 3521 G17 -3 -50 -25 TOP FET 0 25 50 75 100 125 150 TEMPERATURE (C) 3621 G18 3621fc For more information www.linear.com/LTC3621 LTC3621/LTC3621-2 Pin Functions (DFN/MSOP) SW (Pin 1/Pin 1): Switch Node Connection to the Inductor of the Step-Down Regulator. INTVCC (Pin 5/Pin 6): Low Dropout Regulator. Bypass with at least 1F to Ground. VIN (Pin 2/Pin 2): Input Voltage of the Step-Down Regulator. MODE/SYNC (Pin 6/Pin 7): Burst Mode Select and External Clock Synchronization of the Step-Down Regulator. Tie MODE/SYNC to INTVCC for Burst Mode operation with a 400mA peak current clamp, tie MODE/SYNC to GND for pulse skipping operation, and tie MODE/SYNC to a voltage between 1V and VINTVCC - 1.2V for forced continuous mode. Furthermore, connecting MODE/SYNC to an external clock will sync the system clock to the external clock and put the part in forced continuous mode. RUN (Pin 3/Pin 3): Logic Controlled RUN Input. Do not leave this pin floating. Logic high activates the step-down regulator. FB (Pin 4/Pin 5): Feedback Input to the Error Amplifier of the Step-Down Regulator. Connect a resistor divider tap to this pin. The output voltage can be adjusted from 0.6V to VIN by: VOUT = 0.6V * [1 + (R2/R1)] For Fixed VOUT options, connect the FB pin directly to VOUT. PGOOD (Pin 4, MSOP Package Only): VOUT within Regulation Indicator. GND (Exposed Pad Pin 7/Pin 9): Ground Backplane for Power and Signal Ground. Must be soldered to PCB ground. SGND (Pin 8, MSOP Package Only): Signal Ground. Block Diagram 0.8ms SOFT-START 0.6V FB + + - VIN SLOPE COMPENSATION ERROR AMPLIFIER ITH + BURST AMPLIFIER MAIN I-COMPARATOR - + - V FIXED VOUT MODE/SYNC INTVCC RUN OSCILLATOR CLK OVERCURRENT COMPARATOR LDO BUCK LOGIC AND GATE DRIVE + - PGOOD VIN - 5V SW INTVCC + - REVERSE COMPARATOR MS8E PACKAGE ONLY GND 3621 BD 3621fc For more information www.linear.com/LTC3621 7 LTC3621/LTC3621-2 Operation The LTC3621 uses a constant-frequency, peak current mode architecture. It operates through a wide VIN range and regulates with ultralow quiescent current. The operation frequency is set at either 2.25MHz or 1MHz and can be synchronized to an external oscillator 40% of the inherent frequency. To suit a variety of applications, the selectable MODE/SYNC pin allows the user to trade off output ripple for efficiency. The output voltage is set by an external divider returned to the FB pin. An error amplifier compares the divided output voltage with a reference voltage of 0.6V and adjusts the peak inductor current accordingly. In the MS8E package, overvoltage and undervoltage comparators will pull the PGOOD output low if the output voltage is not within 7.5% of the programmed value. The PGOOD output will go high immediately after achieving regulation and will go low 32 clock cycles after falling out of regulation. Main Control Loop During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle. The inductor current is allowed to ramp up to a peak level. Once that level is reached, the top power switch is turned off and the bottom switch (N-channel MOSFET) is turned on until the next clock cycle. The peak current level is controlled by the internally compensated ITH voltage, which is the output of the error amplifier. This amplifier compares the FB voltage to the 0.6V internal reference. When the load current increases, the FB voltage decreases slightly below the reference, which causes the error amplifier to increase the ITH voltage until the average inductor current matches the new load current. The main control loop is shut down by pulling the RUN pin to ground. Low Current Operation Two discontinuous-conduction modes (DCMs) are available to control the operation of the LTC3621 at low currents. Both modes, Burst Mode operation and pulse-skipping, automatically switch from continuous operation to the selected mode when the load current is low. 8 To optimize efficiency, Burst Mode operation can be selected by tying the MODE/SYNC pin to INTVCC. In Burst Mode operation, the peak inductor current is set to be at least 400mA, even if the output of the error amplifier demands less. Thus, when the switcher is on at relatively light output loads, FB voltage will rise and cause the ITH voltage to drop. Once the ITH voltage goes below 0.2V, the switcher goes into its sleep mode with both power switches off. The switcher remains in this sleep state until the external load pulls the output voltage below its regulation point. During sleep mode, the part draws an ultralow 3.5A of quiescent current from VIN. To minimize VOUT ripple, pulse-skipping mode can be selected by grounding the MODE/SYNC pin. In the LTC3621, pulse-skipping mode is implemented similarly to Burst Mode operation with the peak inductor current set to be at about 66mA. This results in lower output voltage ripple than in Burst Mode operation with the trade-off being slightly lower efficiency. Forced Continuous Mode Operation Aside from the two discontinuous-conduction modes, the LTC3621 also has the ability to operate in the forced continuous mode by setting the MODE/SYNC voltage between 1V and VINTVCC - 1V. In forced continuous mode, the switcher will switch cycle by cycle regardless of what the output load current is. If forced continuous mode is selected, the minimum peak current is set to be -133mA in order to ensure that the part can operate continuously at zero output load. High Duty Cycle/Dropout Operation When the input supply voltage decreases towards the output voltage, the duty cycle increases and slope compensation is required to maintain the fixed switching frequency. The LTC3621 has internal circuitry to accurately maintain the peak current limit (ILIM) of 1.6A even at high duty cycles. As the duty cycle approaches 100%, the LTC3621 enters dropout operation. During dropout, if force continuous mode is selected, the top PMOS switch is turned on continuously, and all active circuitry is kept alive. However, if Burst Mode operation or pulse-skipping mode is 3621fc For more information www.linear.com/LTC3621 LTC3621/LTC3621-2 Operation selected, the part will transition in and out of sleep mode depending on the output load current. This significantly reduces the quiescent current, thus prolonging the use of the input supply. VIN Overvoltage Protection In order to protect the internal power MOSFET devices against transient voltage spikes, the LTC3621 constantly monitors the VIN pin for an overvoltage condition. When VIN rises above 19V, the regulator suspends operation by shutting off both power MOSFETs. Once VIN drops below 18.7V, the regulator immediately resumes normal operation. The regulator executes its soft-start function when exiting an overvoltage condition. Low Supply Operation The LTC3621 incorporates an undervoltage lockout circuit which shuts down the part when the input voltage drops below 2.7V. As the input voltage rises slightly above the undervoltage threshold, the switcher will begin its basic operation. However, the RDS(ON) of the top and bottom switch will be slightly higher than that specified in the electrical characteristics due to lack of gate drive. Refer to graph of RDS(ON) versus VIN for more details. Soft-Start The LTC3621 has an internal 800s soft-start ramp. During start-up soft-start operation, the switcher will operate in pulse-skipping mode. Applications Information Output Voltage Programming For non-fixed output voltage parts, the output voltage is set by external resistive divider according to the following equation: R2 VOUT = 0.6V * 1+ R1 VOUT R2 CFF FB R1 SGND 3621 F01 Figure 1. Setting the Output Voltage VOUT VIN VIN -1 VOUT This formula has a maximum at VIN = 2VOUT, where: IRMS The resistive divider allows the FB pin to sense a fraction of the output voltage as shown in Figure 1. LTC3621 IRMS IOUT(MAX) IOUT 2 This simple worst-case condition is commonly used for design because even significant deviations do not offer much relief. Note that ripple current ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet size or height requirements in the design. For low input voltage applications, sufficient bulk input capacitance is needed to minimize transient effects during output load changes. Input Capacitor (CIN) Selection Output Capacitor (COUT) Selection The input capacitance, CIN, is needed to filter the square wave current at the drain of the top power MOSFET. To prevent large voltage transients from occurring, a low ESR input capacitor sized for the maximum RMS current should be used. The maximum RMS current is given by: The selection of COUT is determined by the effective series resistance (ESR) that is required to minimize voltage ripple and load step transients as well as the amount of bulk capacitance that is necessary to ensure that the control loop is stable. Loop stability can be checked by viewing 3621fc For more information www.linear.com/LTC3621 9 LTC3621/LTC3621-2 Applications Information the load transient response. The output ripple, VOUT, is determined by: VOUT < IL 1 +ESR 8 * f *COUT The output ripple is highest at maximum input voltage since IL increases with input voltage. Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer, aluminum electrolytic, and ceramic capacitors are all available in surface mount packages. Special polymer capacitors are very low ESR but have lower capacitance density than other types. Tantalum capacitors have the highest capacitance density but it is important to only use types that have been surge tested for use in switching power supplies. Aluminum electrolytic capacitors have significantly higher ESR, but can be used in cost-sensitive applications provided that consideration is given to ripple current ratings and long-term reliability. Ceramic capacitors have excellent low ESR characteristics and small footprints. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. However, care must be taken when these capacitors are used at the input and output. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the VIN input. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN large enough to damage the part. When choosing the input and output ceramic capacitors, choose the X5R and X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. Since the ESR of a ceramic capacitor is so low, the input and output capacitor must instead fulfill a charge storage 10 requirement. During a load step, the output capacitor must instantaneously supply the current to support the load until the feedback loop raises the switch current enough to support the load. Typically, five cycles are required to respond to a load step, but only in the first cycle does the output voltage drop linearly. The output droop, VDROOP, is usually about three times the linear drop of the first cycle. Thus, a good place to start with the output capacitor value is approximately: COUT = 3 IOUT f * VDROOP More capacitance may be required depending on the duty cycle and load-step requirements. In most applications, the input capacitor is merely required to supply high frequency bypassing, since the impedance to the supply is very low. A 10F ceramic capacitor is usually enough for these conditions. Place this input capacitor as close to the VIN pin as possible. Output Power Good In the MS8E package, when the LTC3621's output voltage is within the 7.5% window of the regulation point, the output voltage is good and the PGOOD pin is pulled high with an external resistor. Otherwise, an internal open-drain pull-down device (275) will pull the PGOOD pin low. To prevent unwanted PGOOD glitches during transients or dynamic VOUT changes, the LTC3621's PGOOD falling edge includes a blanking delay of approximately 32 switching cycles. Frequency Sync Capability The LTC3621 has the capability to sync to a frequency within a 40% range of the internal programmed frequency. It takes 2 to 3 cycles of external clock pulses to engage the sync mode. If the external clock signal were to stop switching during operation, it will take roughly 7s for the part's internal sync signal to go low and respond accordingly. Once engaged in sync, the LTC3621 immediately runs at the external clock frequency in forced continuous mode. 3621fc For more information www.linear.com/LTC3621 LTC3621/LTC3621-2 Applications Information Inductor Selection Given the desired input and output voltages, the inductor value and operating frequency determine the ripple current: IL = VOUT V 1- OUT f *L VIN(MAX) Lower ripple current reduces power losses in the inductor, ESR losses in the output capacitors and output voltage ripple. Highest efficiency operation is obtained at low frequency with small ripple current. However, achieving this requires a large inductor. There is a trade-off between component size, efficiency and operating frequency. A reasonable starting point is to choose a ripple current that is about 40% of IOUT(MAX). To guarantee that ripple current does not exceed a specified maximum, the inductance should be chosen according to: L= VOUT V 1- OUT f * IL(MAX) VIN(MAX) Once the value for L is known, the type of inductor must be selected. Actual core loss is independent of core size for a fixed inductor value, but is very dependent on the inductance selected. As the inductance or frequency increases, core losses decrease. Unfortunately, increased inductance requires more turns of wire and therefore copper losses will increase. Copper losses also increase as frequency increases. Ferrite designs have very low core losses and are preferred at high switching frequencies, so design goals can concentrate on copper loss and preventing saturation. Ferrite core material saturates "hard", which means that inductance collapses abruptly when the peak design current is exceeded. This results in an abrupt increase in inductor ripple current and consequent output voltage ripple. Do not allow the core to saturate! Different core materials and shapes will change the size/ current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials are small and don't radiate much energy, but generally cost more than powdered iron core inductors with similar characteristics. The choice of which style inductor to use mainly depends on the price versus size requirements and any radiated field/EMI requirements. New designs for surface mount inductors are available from Coilcraft, Toko, Vishay, NEC/Tokin, TDK and Wurth Electronik. Refer to Table 1 for more details. Checking Transient Response The regular loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to the ILOAD * ESR, where ESR is the effective series resistance of COUT. ILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The initial output voltage step may not be within the bandwidth of the feedback loop, so the standard second order overshoot/DC ratio cannot be used to determine phase margin. In addition, a feedforward capacitor can be added to improve the high frequency response, as shown in Figure 1. Capacitor CFF provides phase lead by creating a high frequency zero with R2, which improves the phase margin. The output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. LTpowerCADTM and LTSpice(R) can be used to check control loop and transient performance. In some applications, a more severe transient can be caused by switching in loads with large (>1F) load capacitors. The discharged load capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the switch connecting the load has low resistance and is driven quickly. The solution is to limit the turn-on speed of the load switch driver. A Hot SwapTM controller is designed specifically for this purpose and usually incorporates current limiting, short-circuit protection and soft-starting. 3621fc For more information www.linear.com/LTC3621 11 LTC3621/LTC3621-2 Applications Information Table 1. Inductor Selection Table INDUCTOR IHLP-1616BZ-11 Series IHLP-2020BZ-01 Series FDV0620 Series MPLC0525L Series XFL4020 Series RLF7030 Series WE-TPC 4828 Series INDUCTANCE (H) 1.0 2.2 4.7 1 2.2 3.3 4.7 5.6 6.8 1 2.2 3.3 4.7 1 1.5 2.2 1.0 1.5 2.2 3.3 4.7 1 1.5 2.2 3.3 4.7 6.8 1.2 1.8 2.2 2.7 3.3 3.9 4.7 DCR (m) 24 61 95 18.9 45.6 79.2 108 113 139 18 37 51 68 16 24 40 10.8 14.4 21.3 34.8 52.2 8.8 9.6 12 20 31 45 17 20 23 27 30 47 52 MAX CURRENT (A) 4.5 3.25 1.7 7 4.2 3.3 2.8 2.5 2.4 5.7 4 3.2 2.8 6.4 5.2 4.1 5.1 4.4 3.5 2.5 2.5 6.4 6.1 5.4 4.1 3.4 2.8 3.1 2.7 2.5 2.35 2.15 1.72 1.55 Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Percent efficiency can be expressed as: % Efficiency = 100% - (Loss1 + Loss2 + ...) where Loss1, Loss2, etc. are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, three main sources usually account for most of the losses in LTC3621 circuits: 1) I2R losses, 2) switching and biasing losses, 3) other losses. 12 DIMENSIONS (mm) 4.3 x 4.7 4.3 x 4.7 4.3 x 4.7 5.4 x 5.7 5.4 x 5.7 5.4 x 5.7 5.4 x 5.7 5.4 x 5.7 5.4 x 5.7 6.7 x 7.4 6.7 x 7.4 6.7 x 7.4 6.7 x 7.4 6.2 x 5.4 6.2 x 5.4 6.2 x 5.4 4x4 4x4 4x4 4x4 4x4 6.9 x 7.3 6.9 x 7.3 6.9 x 7.3 6.9 x 7.3 6.9 x 7.3 6.9 x 7.3 4.8 x 4.8 4.8 x 4.8 4.8 x 4.8 4.8 x 4.8 4.8 x 4.8 4.8 x 4.8 4.8 x 4.8 HEIGHT (mm) 2 2 2 2 2 2 2 2 2 2 2 2 2 2.5 2.5 2.5 2.1 2.1 2.1 2.1 2.1 3.2 3.2 3.2 3.2 3.2 3.2 2.8 2.8 2.8 2.8 2.8 2.8 2.8 MANUFACTURER Vishay www.vishay.com Toko www.toko.com NEC/Tokin www.nec-tokin.com Coilcraft www.coilcraft.com TDK www.tdk.com Wurth Elektronik www.we-online.com 1. I2R losses are calculated from the DC resistances of the internal switches, RSW, and external inductor, RL. In continuous mode, the average output current flows through inductor L but is "chopped" between the internal top and bottom power MOSFETs. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 - DC) The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus to obtain I2R losses: I2R losses = IOUT2(RSW + RL) 3621fc For more information www.linear.com/LTC3621 LTC3621/LTC3621-2 Applications Information 2. The switching current is the sum of the MOSFET driver and control currents. The power MOSFET driver current results from switching the gate capacitance of the power MOSFETs. Each time a power MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of VIN that is typically much larger than the DC control bias current. In continuous mode, IGATECHG = f(QT + QB), where QT and QB are the gate charges of the internal top and bottom power MOSFETs and f is the switching frequency. The power loss is thus: analysis. The goal of the thermal analysis is to determine whether the power dissipated exceeds the maximum junction temperature of the part. The temperature rise is given by: TRISE = PD * JA As an example, consider the case when the LTC3621 is used in applications where VIN = 12V, IOUT = 1A, f = 2.25MHz, VOUT = 1.8V. The equivalent power MOSFET resistance RSW is: RSW =RDS(ON)TOP * Switching Loss = IGATECHG * VIN The gate charge loss is proportional to VIN and f and thus their effects will be more pronounced at higher supply voltages and higher frequencies. 3. Other "hidden" losses such as transition loss and copper trace and internal load resistances can account for additional efficiency degradations in the overall power system. It is very important to include these "system" level losses in the design of a system. Transition loss arises from the brief amount of time the top power MOSFET spends in the saturated region during switch node transitions. The LTC3621 internal power devices switch quickly enough that these losses are not significant compared to other sources. These losses plus other losses, including diode conduction losses during dead-time and inductor core losses, generally account for less than 2% total additional loss. Thermal Conditions In a majority of applications, the LTC3621 does not dissipate much heat due to its high efficiency and low thermal resistance of its exposed pad package. However, in applications where the LTC3621 is running at high ambient temperature, high VIN, high switching frequency, and maximum output current load, the heat dissipated may exceed the maximum junction temperature of the part. If the junction temperature reaches approximately 160C, both power switches will be turned off until the temperature drops about 15C cooler. To avoid the LTC3621 from exceeding the maximum junction temperature, the user will need to do some thermal = 370m * VOUT V +RDS(ON)BOT * 1- OUT VIN VIN 1.8V 1.8V +150m * 1- 12V 12V = 183m The VIN current during 2.25MHz force continuous operation with no load is about 5mA, which includes switching and internal biasing current loss, transition loss, inductor core loss and other losses in the application. Therefore, the total power dissipated by the part is: PD = IOUT2 * RSW + VIN * IIN(Q) = 1A2 * 183m + 12V * 5mA = 243mW The DFN 2mm x 3mm package junction-to-ambient thermal resistance, JA, is around 64C/W. Therefore, the junction temperature of the regulator operating in a 25C ambient temperature is approximately: TJ = 0.243W * 64C/W + 25C = 40.6C Remembering that the above junction temperature is obtained from an RDS(ON) at 25C, we might recalculate the junction temperature based on a higher RDS(ON) since it increases with temperature. Redoing the calculation assuming that RSW increased 5% at 40.6C yields a new junction temperature of 41.1C. If the application calls for a higher ambient temperature and/or higher switching frequency, care should be taken to reduce the temperature rise of the part by using a heat sink or forced air flow. 3621fc For more information www.linear.com/LTC3621 13 LTC3621/LTC3621-2 Applications Information Board Layout Considerations When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3621 (refer to Figure 3). Check the following in your layout: 5. Keep sensitive components away from the SW pin. The feedback resistors and INTVCC bypass capacitors should be routed away from the SW trace and the inductor. 6. A ground plane is preferred. 7. Flood all unused areas on all layers with copper, which reduces the temperature rise of power components. These copper areas should be connected to GND. Design Example As a design example, consider using the LTC3621 in an application with the following specifications: L1 CIN VIN VOUT VIN = 10.8V to 13.2V VOUT = 3.3V IOUT(MAX) = 1A GND IOUT(MIN) = 0A COUT fSW = 2.25MHz Because efficiency and quiescent current is important at both 500mA and 0A current states, Burst Mode operation will be utilized. 3621 F03 Figure 3. Sample PCB Layout 1. Do the capacitors CIN connect to the VIN pin and GND pin as close as possible? These capacitors provide the AC current to the internal power MOSFETs and their drivers. 2. Are COUT and L closely connected? The (-) plate of COUT returns current to GND. 3. The resistive divider, R1 and R2, must be connected between the (+) plate of COUT and a ground line terminated near GND. The feedback signal VFB should be routed away from noisy components and traces, such as the SW line, and its trace should be minimized. Keep R1 and R2 close to the IC. 4. Solder the exposed pad (Pin 7 for DFN, Pin 9 for MSOP) on the bottom of the package to the GND plane. Connect this GND plane to other layers with thermal vias to help dissipate heat from the LTC3621. 14 Given the internal oscillator of 2.25MHz, we can calculate the inductor value for about 40% ripple current at maximum VIN: L= 3.3V 3.3V 1- = 2.75H 2.25MHz * 0.4A 13.2V Given this, a 2.7H or 3.3H, >1.2A inductor would suffice. COUT will be selected based on the ESR that is required to satisfy the output voltage ripple requirement and the bulk capacitance needed for loop stability. For this design, a 22F ceramic capacitor will be used. CIN should be sized for a maximum current rating of: 3.3V 13.2V IRMS = 1A -1 13.2V 3.3V 1/2 = 0.43A Decoupling the VIN pin with 10F ceramic capacitors is adequate for most applications. 3621fc For more information www.linear.com/LTC3621 LTC3621/LTC3621-2 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. DCB Package 6-Lead Plastic DFN (2mm x 3mm) (Reference LTC DWG # 05-08-1715 Rev A) 0.70 0.05 3.55 0.05 1.65 0.05 (2 SIDES) 2.15 0.05 PACKAGE OUTLINE 0.25 0.05 0.50 BSC 1.35 0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS R = 0.115 TYP R = 0.05 TYP 2.00 0.10 (2 SIDES) 3.00 0.10 (2 SIDES) 0.40 0.10 4 6 1.65 0.10 (2 SIDES) PIN 1 NOTCH R0.20 OR 0.25 x 45 CHAMFER PIN 1 BAR TOP MARK (SEE NOTE 6) 3 0.200 REF 0.75 0.05 1 (DCB6) DFN 0405 0.25 0.05 0.50 BSC 1.35 0.10 (2 SIDES) 0.00 - 0.05 BOTTOM VIEW--EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (TBD) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 3621fc For more information www.linear.com/LTC3621 15 LTC3621/LTC3621-2 Package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MS8E Package 8-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1662 Rev K) BOTTOM VIEW OF EXPOSED PAD OPTION 1.88 (.074) 1 1.88 0.102 (.074 .004) 0.29 REF 1.68 (.066) 0.889 0.127 (.035 .005) 0.05 REF 5.10 (.201) MIN DETAIL "B" CORNER TAIL IS PART OF DETAIL "B" THE LEADFRAME FEATURE. FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 1.68 0.102 3.20 - 3.45 (.066 .004) (.126 - .136) 8 3.00 0.102 (.118 .004) (NOTE 3) 0.65 (.0256) BSC 0.42 0.038 (.0165 .0015) TYP 8 7 6 5 0.52 (.0205) REF RECOMMENDED SOLDER PAD LAYOUT 0.254 (.010) 3.00 0.102 (.118 .004) (NOTE 4) 4.90 0.152 (.193 .006) DETAIL "A" 0 - 6 TYP GAUGE PLANE 0.53 0.152 (.021 .006) DETAIL "A" 1 2 3 4 1.10 (.043) MAX 0.86 (.034) REF 0.18 (.007) SEATING PLANE 0.22 - 0.38 (.009 - .015) TYP 0.65 (.0256) BSC 0.1016 0.0508 (.004 .002) MSOP (MS8E) 0213 REV K NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 16 3621fc For more information www.linear.com/LTC3621 LTC3621/LTC3621-2 Revision History REV DATE DESCRIPTION A 08/13 Updated Efficiency curve 1 Input quiescent current limits changed 2 Oscillator frequency (fOSC) conditions changed 2 B 03/14 PAGE NUMBER Clarified Features and Description 1 Clarified options 1 Clarified ordering info and Absolute Maximum Ratings 2 2-3 Added Note 7 Clarified electrical specifications 3 Clarified pin descriptions, Block Diagram 6 Clarified Operation description 7 Added box to figure 7 Clarified Applications Information Clarified Typical Application C 04/15 9 - 13 16 Swapped locations of CFB and R1 18 Added H-Grade Options and Specifications 2, 3 Added H-Grade Options and Specifications Clarified Graphs to Accommodate 150C Performance 4 5, 6 3621fc Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. For more information www.linear.com/LTC3621 17 LTC3621/LTC3621-2 Typical Application 5VOUT with 400mA Burst Mode Operation, 2.25MHz L1 3.3H VIN 12V CIN 10F SW VIN R3 187k LTC3621-2 RUN FB MODE/SYNC INTVCC GND CFB 22pF VOUT COUT 5V 22F 3621 TA02 R4 25.5k C1 1F 3621 TA02 1.2VOUT, Forced Continuous Mode, 1MHz VIN L1 3.3H 2.7V TO 17V CIN 10F 1.2V SW VIN R1 604k LTC3621 RUN FB MODE/SYNC INTVCC GND COUT 22F CFB 22pF VOUT R5 604k C1 1F V 1V 3621 TA03 1.2VOUT, Synchronized to 600kHz, Forced Continuous Mode VIN 2.7V TO 17V CIN 10F L1 4.7H 1.2V SW VIN R1 604k LTC3621 RUN FB MODE/SYNC INTVCC GND CFB 22pF COUT 22F VOUT R5 604k C1 1F V 600kHz CLK 3621 TA04 Related Parts PART NUMBER DESCRIPTION COMMENTS LTC3646/ LTC3646-1 40V, 1A (IOUT), 3MHz Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4V to 40V, VOUT(MIN) = 0.6V, IQ = 140A, ISD < 8A, 3mm x 4mm DFN-14, MSOP-16E Packages LTC3600 1.5A, 15V, 4MHz Synchronous Rail-to-Rail Single Resistor Step-Down Regulator 95% Efficiency, VIN: 4V to 15V, VOUT(MIN) = 0V, IQ = 700A, ISD < 1A, 3mm x 3mm DFN-12, MSOP-12E Packages LTC3601 15V, 1.5A (IOUT) 4MHz Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4.5V to 15V, VOUT(MIN) = 0.6V, IQ = 300A, ISD < 1A, 4mm x 4mm QFN-20, MSOP-16E Packages LTC3603 15V, 2.5A (IOUT) 3MHz Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4.5V to 15V, VOUT(MIN) = 0.6V, IQ = 75A, ISD < 1A, 4mm x 4mm QFN-20, MSOP-16E Packages LTC3633/ LTC3633A 15V/20V, Dual 3A (IOUT) 4MHz Synchronous Step-Down 95% Efficiency, VIN: 3.6V to 15V/20V, VOUT(MIN) = 0.6V, IQ = 500A, ISD < 15A, DC/DC Converter 4mm x 5mm QFN-28, TSSOP-28E Packages. A Version Up to 20VIN LTC3605/ LTC3605A 15V/20V, 5A (IOUT) 4MHz Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 4V to 15V/20V, VOUT(MIN) = 0.6V, IQ = 2mA, ISD < 15A, 4mm x 4mm QFN-24 Package. A Version Up to 20VIN LTC3604 15V, 2.5A (IOUT) 4MHz Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN: 3.6V to 15V, VOUT(MIN) = 0.6V, IQ = 300A, ISD < 14A, 3mm x 3mm QFN-16, MSOP-16E Packages LTC1877 600mA (IOUT) 550kHz Synchronous Step-Down DC/DC Converter VIN: 2.7V to 10V, VOUT(MIN) = 0.8V, IO = 10A, ISD < 1A, MSOP-8 Package LT8610/LT8611 42V, 2.5A (IOUT) Synchronous Step-Down DC/DC Converter 96% Efficiency, VIN: 3.4V to 42V, VOUT(MIN) = 0.97V, IQ = 2.5A, ISD < 1A, MSOP-16E Package 18 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 For more information www.linear.com/LTC3621 (408) 432-1900 FAX: (408) 434-0507 www.linear.com/LTC3621 3621fc LT 0415 REV C * PRINTED IN USA LINEAR TECHNOLOGY CORPORATION 2013