SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154B – MARCH 1993 – REVISED FEBRUAR Y 2001
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Meet or Exceed Standards TIA/EIA-422-B
and TIA/EIA-485-A
D
Designed for Multipoint Bus Transmission
on Long Bus Lines in Noisy Environments
D
Low Supply-Current Requirement
50 mA Max
D
Driver Positive- and Negative-Current
Limiting
D
Driver Common-Mode Output Voltage
Range of –7 V to 12 V
D
Thermal Shutdown Protection
D
Driver 3-State Outputs Active-High Enable
D
Receiver Common-Mode Input Voltage
Range of –12 V to 12 V
D
Receiver Input Sensitivity . . . ±200 mV
D
Receiver Hysteresis . . . 50 mV Typ
D
Receiver High Input
Impedance ...12kΩ Min
D
Receiver 3-State Outputs Active-Low
Enable for SN75ALS1177 Only
D
Operate From Single 5-V Supply
description
The SN75ALS1177 and SN75ALS1178 dual differential drivers and receivers are integrated circuits designed
for bidirectional data communication on multipoint bus transmission lines. They are designed for balanced
transmission lines and meet standards TIA/EIA-422-B and TIA/EIA-485-A.
The SN75ALS1177 combines dual 3-state differential line drivers and dual 3-state differential input line
receivers, both of which operate from a single 5-V power supply. The drivers and receivers have active-high
and active-low enables, respectively, which can be externally connected together to function as direction
control. The SN75ALS1178 drivers each have an individual active-high enable. Fail-safe design ensures that
when the receiver inputs are open, the receiver outputs are always high.
The SN75ALS1177 and SN75ALS1178 are characterized for operation from 0°C to 70°C.
AVAILABLE OPTIONS
PACKAGED DEVICES
TAPLASTIC
DIP
(N)
PLASTIC
SMALL OUTLINE
(NS)
0°Cto70°C
SN75ALS1177N SN75ALS1177NSR
0°C
to
70°C
SN75ALS1178N SN75ALS1178NSR
The NS package is only available taped and reeled. Add the
suffix R to the device type (e.g., SN75ALS1177NSR).
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1R
RE
2R
2A
2B
GND
VCC
1D
1Y
1Z
DE
2Z
2Y
2D
SN75ALS1177 ...N OR NS PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1B
1A
1R
1DE
2R
2A
2B
GND
VCC
1D
1Y
1Z
2DE
2Z
2Y
2D
SN75ALS1178 ...N OR NS PACKAGE
(TOP VIEW)
SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Function Tables
SN75ALS1177, SN75ALS1178
(each driver)
INPUT ENABLE OUTPUTS
D DE Y Z
H H H L
L H L H
X L Z Z
SN75ALS1177
(each receiver)
DIFFERENTIAL
A–BENABLE
RE OUTPUT
Y
VID ≥ 0.2 V L H
–0.2 V < VID < 0.2 V L ?
VID ≤ –0.2 V L L
X H Z
Open L H
SN75ALS1178
(each receiver)
DIFFERENTIAL
A–BOUTPUT
Y
VID ≥ 0.2 V H
–0.2 V < VID < 0.2 V ?
VID ≤ –0.2 V L
Open H
H = High level, L = Low level,
? = Indeterminate, X = Irrelevant,
Z = High impedance (of f)
logic symbol†
SN75ALS1177 SN75ALS1178
15
1D
EN2
4
1R 3
EN
4
1DE 15
1D
†These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
EN1
12
DE
9
2D
2R 5
1Y
14
1Z
13
1A
2
1B
1
2Y
10
2Z
11
2A
6
2B
7
RE
2
2
1
1
1
1
1R 3
1Y
14
1Z
13
1A
2
1B
1
2Y
10
2Z
11
2A
6
2B
7
EN
12
2DE 9
2D
2R 5
SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
2R
2D
1R
1D
RE
DE
SN75ALS1177 SN75ALS1178
1Y
1Z
1A
1B
2Y
2Z
2A
2B
12
4
15
3
9
5
14
13
2
1
10
11
6
7
4
15
3
12
9
5
14
13
2
1
10
11
6
7
2R
2D
1R
1D
1DE
2DE
1Y
1Z
1A
1B
2Y
2Z
2A
2B
equivalent schematics
EQUIVALENT OF RECEIVER INPUTEQUIVALENT OF DRIVER OR ENABLE INPUT
Input
VCC
Input
VCC
35 kΩ NOM
17 kΩ
NOM 1.7 kΩ
NOM
288 kΩ
NOM
VCC (A)
or
GND (B)
GND
1.7 kΩ
NOM
SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
schematics of outputs
TYPICAL OF RECEIVER OUTPUTSTYPICAL OF DRIVER OUTPUTS
70 Ω NOM
VCC
GND
Output
VCC
Output
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI (DE, RE, and D inputs) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO (driver) –9 V to 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, receiver –14 V to 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver differential-input voltage range (see Note 2) –14 V to 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Receiver low-level output current 50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 3): N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 64°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. All voltage values, except differential input voltage, are with respect to the network ground terminal.
2. Differential input voltage is measured at the noninverting terminal with respect to the inverting terminal.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions
MIN NOM MAX UNIT
VCC Supply voltage 4.75 5 5.25 V
VID Differential input voltage Receiver ±12 V
VOC Common-mode output voltage Driver –7†12 V
VIC Common-mode input voltage Receiver ±12 V
VIH High-level input voltage DE, RE, D 2 V
VIL Low-level input voltage DE, RE, D 0.8 V
IOH
High level out
p
ut current
Driver –60 mA
I
OH
High
-
level
output
current
Receiver –400 µA
IOL
Low level out
p
ut current
Driver 60
mA
I
OL
Low
-
level
output
current
Receiver 8
mA
TAOperating free-air temperature 0 70 °C
†The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet fo r common-mode
output and threshold voltage level only.
SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DRIVER SECTION
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VIK Input clamp voltage II = –18 mA –1.5 V
VOH High-level output voltage VIH = 2 V, VIL = 0.8 V, IOH = –33 mA 3.3 V
VOL Low-level output voltage VIH = 2 V, VIL = 0.8 V, IOL = 33 mA 1.1 V
|VOD1|Differential output voltage IO = 0 1.5 6 V
|V
OD2
|Differential output volta
g
eVCC = 5 V, RL = 100 Ω,See Figure 1 1/2 VOD1
or 2‡V
OD2
g
RL = 54 Ω,See Figure 1 1.5 2.5 5
|VOD3|Differential output voltage See Note 4 1.5 5 V
∆|VOD|Change in magnitude of
differential output voltage (see Note 5) RL = 54 Ω or 100 Ω,See Figure 1 ±0.2 V
VOC Common-mode output voltage RL = 54 Ω or 100 Ω,See Figure 1 –1§3 V
∆|VOC|Change in magnitude of
common-mode output voltage
(see Note 5) RL = 54 Ω or 100 Ω,See Figure 1 ±0.2 V
IO(OFF) Output current with power off VCC = 0, VO = –7 V to 12 V ±100 µA
IOZ High-impedance-state output current VO = –7 V to 12 V ±100 µA
IIH High-level input current VIH = 2.7 V 100 µA
IIL Low-level input current VIL = 0.4 V –100 µA
VO = –7 V –250
IOS
Short circuit out
p
ut current
VO = VCC 250
mA
I
OS
Short
-
circuit
output
current
VO = 12 V 250
mA
VO = 0 V 150
ICC
Su
pp
ly current (total
p
ackage)
No load
Outputs enabled 35 50
mA
I
CC
Supply
current
(total
package)
No
load
Outputs disabled 20 50
mA
†All typical values are at VCC = 5 V and TA = 25°C.
‡The minimum VOD2 with a 100-Ω load is either 1/2 VOD1 or 2 V, whichever is greater.
§The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet fo r common-mode
output and threshold voltage levels only.
NOTES: 4. See TIA/EIA-485-A Figure 3.5, test termination measurement 2.
5. ∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively , that occur when the input is changed from a high
level to a low level.
switching characteristics at VCC = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, high- to low-level output RL = 60 Ω, CL1 = CL2 = 100 pF,
See Figure 3 9 15 22 ns
tPHL Propagation delay time, low- to high-level output RL = 60 Ω, CL1 = CL2 = 100 pF,
See Figure 3 9 15 22 ns
tsk Output-to-output skew RL = 60 Ω, CL1 = CL2 = 100 pF,
See Figure 3 0 2 8 ns
tPZH Output enable time to high level CL = 100 pF, See Figure 4 30 35 50 ns
tPZL Output enable time to low level CL = 100 pF, See Figure 5 5 15 25 ns
tPHZ Output disable time from high level CL = 15 pF, See Figure 4 7 15 30 ns
tPLZ Output disable time from low level CL = 15 pF, See Figure 5 7 15 30 ns
SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
RECEIVER SECTION
electrical characteristics over recommended ranges of common-mode input voltage, supply
voltage, and operating free-air temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VIT+ Positive-going input threshold voltage VO = 2.7 V, IO = –0.4 mA 0.2 V
VIT–Negative-going input threshold voltage VO = 0.5 V, IO = 8 mA –0.2‡V
Vhys Input hysteresis voltage (VIT+ – VIT–) 50 mV
VIK Enable input clamp voltage SN75ALS1177 II = –18 mA –1.5 V
VOH High-level output voltage VID = 200 mV, IOH = –400 µA,
See Figure 2 2.7 V
VOL Low-level output voltage VID = 200 mV, IOL = 8 mA,
See Figure 2 0.45 V
IOZ High-impedance-state output current SN75ALS1177 VO = 0.4 V to 2.4 V ±20 µA
II
p
Other in
p
ut at 0 V
VI = 12 V 1
mA
I
I
Other
input
at
0
V
VI = –7 V –0.8
mA
IIH High-level input current, RE SN75ALS1177 VIH = 2.7 V 20 µA
IIL Low-level input current, RE SN75ALS1177 VIL = 0.4 V –100 µA
riInput resistance 12 kΩ
IOS Short-circuit output current VO = 0 V, See Note 7 –15 –85 mA
ICC Supply current (total package) No load, Outputs enabled 35 50 mA
†All typical values are at VCC = 5 V and TA = 25°C.
‡The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet fo r common-mode
output and threshold voltage levels only.
NOTES: 6. Refer to TIA/EIA-422-B, TIA/EIA-423-A, and TIA/EIA-485-A for exact conditions.
7. Not more than one output should be shorted at a time.
switching characteristics at VCC = 5 V, TA = 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low- to high-level output CL = 15 pF, See Figure 6 15 25 37 ns
tPHL Propagation delay time, high- to low-level output CL = 15 pF, See Figure 6 15 25 37 ns
tPZH Output enable time to high level SN75ALS1177 CL = 100 pF, See Figure 7 10 20 30 ns
tPZL Output enable time to low level SN75ALS1177 CL = 100 pF, See Figure 7 10 20 30 ns
tPHZ Output disable time from high level SN75ALS1177 CL = 15 pF, See Figure 7 3.5 12 16 ns
tPLZ Output disable time from low level SN75ALS1177 CL = 15 pF, See Figure 7 5 12 16 ns
SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Figure 1. Driver Test Circuit, VOD and VOC
VOC
VOD2
RL
2
RL
2
Figure 2. Receiver Test Circuit, VOH and VOL
VOL
VOH IOH
IOL
VID
DRIVER VOLTAGE WAVEFORMS
DRIVER TEST CIRCUIT
50 Ω
Y Output
Driver
Input
tPHL
tPLH
tsk tsk
0 V
3 V
3 V
Generator
(see Note B)
CL1 = 100 pF
(see Note A)
60 Ω
CL2 = 100 pF
(see Note A)
1/2 VO
1/2 VO
VO
Z Output
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
1.5 V 1.5 V
Figure 3. Driver Propagation Delay Times
Output
0 V
VOH
tPHZ
tPZH
CL
(see Note A)
Output
RL = 500 Ω
S1
DRIVER VOLTAGE WAVEFORMSDRIVER TEST CIRCUIT
50 Ω
Input 0 V
3 V
3 V or 0 V
0.5 V
Generator
(see Note B)
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
1.5 V 1.5 V
2.3 V
Figure 4. Driver Enable and Disable Times
SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
Output
0 V
VOL
tPLZ
tPZL
Output
RL = 500 Ω
S1
DRIVER VOLTAGE WAVEFORMSDRIVER TEST CIRCUIT
50 Ω
Input 0 V
3 V
3 V or 0 V
0.5 V
VCC
Generator
(see Note B)
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
CL
(see Note A)
1.5 V 1.5 V
2.3 V
Figure 5. Driver Enable and Disable Times
RECEIVER TEST CIRCUIT
1N916 or
Equivalent
1 kΩ
1 kΩ
0 V
50 Ω
0 V
(SN75ALS1177 only)
Output
VCC
VOL
VOH
tPLH
tPHL
DRIVER VOLTAGE WAVEFORMS
Output
Input –2.5 V
2.5 V
Generator
(see Note B)
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
CL
(see Note A)
1.5 V 1.5 V
0 V 0 V
Figure 6. Receiver Propagation Delay Times
SN75ALS1177, SN75ALS1178
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS
SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
RECEIVER VOLTAGE WAVEFORMS
tPHZ
3 V
0 V
Input
tPLZ
RECEIVER TEST CIRCUIT
1N916 or
Equivalent
S2 1 kΩ
S3
1 kΩ
S1
–1.5 V
1.5 V
50 Ω
Output
VCC
Output
0 V
VOH
0.5 V
5 V
VOL
0.5 V
tPZH
tPZL S1 to –1.5 V
S2 Closed
S3 Closed
S1 to –1.5 V
S2 Closed
S3 Closed
S1 to 1.5 V
S2 Open
S3 Closed
S1 to 1.5 V
S2 Open
S3 Closed
Generator
(see Note B)
NOTES: A. CL includes probe and jig capacitance.
B. The pulse generator has the following characteristics: PRR ≤ 1 MHz, 50% duty cycle, tr ≤ 10 ns, tf ≤ 10 ns.
CL
(see Note A)
1.5 V 1.5 V
1.5 V
1.5 V
Figure 7. Receiver Output Enable and Disable Times
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
SN75ALS1177N ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN75ALS1177NE4 ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN75ALS1177NSLE OBSOLETE SO NS 16 TBD Call TI Call TI
SN75ALS1177NSR ACTIVE SO NS 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75ALS1177NSRE4 ACTIVE SO NS 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75ALS1177NSRG4 ACTIVE SO NS 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75ALS1178N ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN75ALS1178NE4 ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN75ALS1178NSLE OBSOLETE SO NS 16 TBD Call TI Call TI
SN75ALS1178NSR ACTIVE SO NS 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75ALS1178NSRG4 ACTIVE SO NS 16 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 4-Jun-2007
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
SN75ALS1177NSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
SN75ALS1178NSR SO NS 16 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN75ALS1177NSR SO NS 16 2000 346.0 346.0 33.0
SN75ALS1178NSR SO NS 16 2000 346.0 346.0 33.0
PACKAGE MATERIALS INFORMATION
www.ti.com 11-Mar-2008
Pack Materials-Page 2
IMPORTANT NOTICE
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