_______________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
19-5651; Rev 0; 12/10
General Description
The MAX5214/MAX5216 are pin-compatible, 14-bit
and 16-bit digital-to-analog converters (DACs). The
MAX5214/MAX5216 are single-channel, low-power, buff-
ered voltage-output DACs. The devices use a precision
external reference applied through the high resistance
input for rail-to-rail operation and low system power
consumption. The MAX5214/MAX5216 accept a wide
2.7V to 5.25V supply voltage range. Power consump-
tion is extremely low to accommodate most low-power
and low-voltage applications. These devices feature a
3-wire SPIK-/QSPIK-/MICROWIREK-/DSP-compatible
serial interface to save board space and to reduce
the complexity in isolated applications. The MAX5214/
MAX5216 minimize the digital noise feedthrough from
input to output with SCLK and DIN input buffers pow-
ered down after completion of each serial input frame.
On power-up, the MAX5214/MAX5216 reset the DAC
output to zero, providing additional safety for applica-
tions that drive valves or other transducers that need
to be off on power-up. The DAC output is buffered
resulting in a low supply current of 80FA (max) and
a low offset error of Q0.25mV. A zero level applied to
the CLR pin asynchronously clears the contents of the
input and DAC registers and sets the DAC output to
zero independent of the serial interface. The MAX5214/
MAX5216 are available in an ultra-small (3mm x 3mm),
8-pin FMAX® package and are specified over the
-40NC to +105NC extended industrial temperature range.
Applications
2-Wire Sensors
Communication Systems
Automatic Tuning
Gain and Offset Adjustment
Power Amplifier Control
Process Control and Servo Loops
Portable Instrumentation
Programmable Voltage and Current Sources
Automatic Test Equipment
Features
S Low-Power Consumption (80µA max)
S 14-/16-Bit Resolution in a 3mm x 3mm, 8-Pin
µMAX Package
S Relative Accuracy
±0.25 LSB INL (MAX5214, 14-Bit)
±1.0 LSB INL (MAX5216, 16-Bit)
S Guaranteed Monotonic Over All Operating Ranges
S Low Gain and Offset Error
S Wide 2.7V to 5.25V Supply Range
S Rail-to-Rail Buffered Output Operation
S Safe Power-On Reset (POR) to Zero DAC Output
S Fast 50MHz, 3-Wire, SPI/QSPI/MICROWIRE-
Compatible Serial Interface
S Schmitt-Trigger Inputs for Direct Optocoupler
Interface
S Asynchronous CLR Clears DAC Output to Code 0
S High Reference Input Resistance for Power
Reduction
S Buffered Voltage Output Directly Drives 10kI
Loads
Note: All devices are specified over the -40°C to +105°C
operating temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
Ordering Information
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
µMAX is a registered trademark of Maxim Integrated Products, Inc.
Functional Diagram
PART PIN-PACKAGE RESOLUTION
(BITS)
MAX5214GUA+ 8 FMAX 14
MAX5216GUA+ 8 FMAX 16
SERIAL-TO-
PARALLEL
CONVERTER INPUT
REGISTER
DAC
REGISTER
CLR
POR
14-/16-BIT
DAC BUFFER
CS
SCLK
DIN
GND
OUT
MAX5214
MAX5216
VDD REF
2 ______________________________________________________________________________________
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
VDD to GND .............................................................-0.3V to +6V
REF, OUT, CLR to GND ..............................-0.3V to the lower of
(VDD + 0.3V) and +6V
SCLK, DIN, CS to GND ...........................................-0.3V to +6V
Continuous Power Dissipation (TA = +70NC)
FMAX (derate at 4.8mW/NC above +70NC) .................387mW
Maximum Current into Any Input or Output .................... Q50mA
Operating Temperature Range ........................ -40NC to +105NC
Storage Temperature Range ............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
ELECTRICAL CHARACTERISTICS
(VDD = 5V, VREF = 5V, CL = 100pF, RL = 10kI, TA = -40NC to +105NC, unless otherwise noted. Typical values are at TA = +25NC.)
ABSOLUTE MAXIMUM RATINGS
PACKAGE THERMAL CHARACTERISTICS (Note 1)
FMAX
Junction-to-Ambient Thermal Resistance (BJA) ........206NC/W
Junction-to-Case Thermal Resistance (BJC) ...............42NC/W
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
STATIC ACCURACY (Note 2)
Resolution N MAX5214 14 Bits
MAX5216 16
Integral Nonlinearity INL MAX5214 (14-bit) (Note 3) -1 Q0.25 +1 LSB
MAX5216 (16-bit) (Note 3) -3 Q1+3
Differential Nonlinearity DNL MAX5214 (14-bit) (Note 3) -1 Q0.1 +1 LSB
MAX5216 (16-bit) (Note 3) -1 Q0.1 +1
Offset Error OE (Note 4) -1.25 Q0.25 +1.25 mV
Offset-Error Drift Q0.5 FV/NC
Gain Error GE (Note 4) -0.06 -0.04 0 %FS
Gain Temperature Coefficient Q2ppmFS/
NC
REFERENCE INPUT
Reference-Input Voltage Range VREF 2 VDD V
Reference-Input Impedance RREF 200 256 kI
DAC OUTPUT
Output Voltage Range
No load (typical) VDD
V
10kI load 0.2 VDD -
0.2
DC Output Impedance 0.1 I
Capacitive Load (Note 5) CLSeries resistance = 0I0.1 nF
Series resistance = 1kI15 FF
Resistive Load (Note 5) RL5kI
Short-Circuit Current VDD = 5.25V -10 Q5+10 mA
Power-Up Time From power-down mode 25 Fs
_______________________________________________________________________________________ 3
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
ELECTRICAL CHARACTERISTICS (continued)
(VDD = 5V, VREF = 5V, CL = 100pF, RL = 10kI, TA = -40NC to +105NC, unless otherwise noted. Typical values are at TA = +25NC.)
Note 2: Static accuracy tested without load.
Note 3: Linearity is tested within 20mV of GND and VDD.
Note 4: Gain and offset is tested within 100mV of GND and VDD.
Note 5: Guaranteed by design; not production tested.
Note 6: All timing specifications measured with VIL = VGND, VIH = VDD.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DIGITAL INPUTS (SCLK, DIN, CS, CLR)
Input High Voltage VIH 0.7 x
VDD V
Input Low Voltage VIL 0.3 x
VDD V
Input Leakage Current IIN VIN = 0V or VDD Q0.1 Q1FA
Input Capacitance CIN 10 pF
Hysteresis Voltage VHYS 0.15 V
DYNAMIC PERFORMANCE (Note 5)
Voltage-Output Slew Rate SR Positive and negative 0.5 V/Fs
Voltage-Output Settling Time 1/4 scale to 3/4 scale, to P 0.5 LSB, 14-bit 14 Fs
Reference -3dB Bandwidth BW Hex code = 2000 (MAX5214),
Hex code = 8000 (MAX5216) 100 kHz
Digital Feedthrough Code = 0, all digital inputs from 0V to VDD,
SCLK < 50MHz 0.5 nV·s
DAC Glitch Impulse Major code transition 2 nV·s
Output Noise 10kHz 70 nV/√Hz
Integrated Output Noise 0.1Hz to 10Hz 1.5 FVP-P
POWER REQUIREMENTS
Supply Voltage VDD 2.7 5.25 V
Supply Current IDD
No load; all digital inputs at 0V or VDD,
supply current only; excludes reference
input current, midscale
70 80 FA
Power-Down Supply Current No load, all digital inputs at 0V or VDD 0.4 2 FA
TIMING CHARACTERISTICS (Notes 5 and 6) (Figures 1 and 2)
Serial Clock Frequency fSCLK 0 50 MHz
SCLK Pulse-Width High tCH 8 ns
SCLK Pulse-Width Low tCL 8 ns
CS Fall to SCLK Fall Setup Time tCSS0 8 ns
CS Fall to SCLK Fall Hold Time tCSH0 0 ns
CS Rise to SCLK Fall Hold Time tCSH1 0 ns
CS Rise to SCLK Fall tCSA 12 ns
SCLK Fall to CS Fall tCSF 100 ns
DIN to SCLK Fall Setup Time tDS 5 ns
DIN to SCLK Fall Hold Time tDH 4.5 ns
CS Pulse-Width High tCSPW 20 ns
CLR Pulse-Width Low tCLPW 20 ns
CLR Rise to CS Fall tCSC 20 ns
4 ______________________________________________________________________________________
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
Figure 1. 16-Bit Serial-Interface Timing Diagram (MAX5214)
Figure 2. 24-Bit Serial-Interface Timing Diagram (MAX5216)
DIN15
1 2 3 4 5 16 7 8 14 15 16
DIN14 DIN13
tDS tDH
tCP
DIN12 DIN11 DIN10 DIN9 DIN8 DIN2 DIN1 DIN0 DIN15DIN
SCLK
CS
tCSH0 tCH
tCL
tCSS0
tCSA
tCLPW tCSC
tCSF
tCSPW
CLR
tCH1
DIN23 DIN22 DIN21 DIN20 DIN19 DIN18 DIN17 DIN16 DIN2 DIN1 DIN0 DIN23
1 2 3 4 5 6 7 8 22 23 24 1
DIN
SCLK
CS
tCH1
tCSA
tCSF
tCLPW tCSC
tCSPW
CLR
tDS tDH
tCP
tCH
tCL
tCSH0
tCSS0
_______________________________________________________________________________________ 5
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
INTEGRAL NONLINEARITY
vs. DIGITAL INPUT CODE
MAX5214 toc01a
DIGITAL INPUT CODE (LSB)
INL (LSB)
12,28881924096
-0.8
-0.6
-0.4
-0.2
0
0.2
0.4
0.6
0.8
1.0
MAX5214
VDD = 5V
-1.0
0 16,384
INTEGRAL NONLINEARITY
vs. DIGITAL INPUT CODE
MAX5214 toc01b
DIGITAL INPUT CODE (LSB)
INL (LSB)
49,15232,76816,384
-2.0
-1.0
0
1.0
2.0
3.0
-3.0
0 65,536
MAX5216
VDD = 5V
INTEGRAL NONLINEARITY
vs. SUPPLY VOLTAGE
MAX5214 toc02a
SUPPLY VOLTAGE (V)
INL (LSB)
4.74.23.2 3.7
-0.75
-0.50
-0.25
0
0.50
MAX
MIN
0.25
0.75
1.00
-1.00
2.7 5.2
MAX5214
SUPPLY VOLTAGE (V)
INL (LSB)
4.74.23.73.2
-2
-1
0
1
2
3
-3
2.7 5.2
INTEGRAL NONLINEARITY
vs. SUPPLY VOLTAGE
MAX5214 toc02b
MAX5216
MAX
MIN
DIFFERENTIAL NONLINEARITY
vs. DIGITAL INPUT CODE
MAX5214 toc04a
DIGITAL INPUT CODE (LSB)
INL (LSB)
12,288 16,38481924096
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
-0.5
0
MAX5214
VDD = 5V
INTEGRAL NONLINEARITY
vs. TEMPERATURE
MAX5214 toc03a
TEMPERATURE (°C)
INL (LSB)
8060-20 0 20 40
-0.75
-0.50
-0.25
0
0.25
0.50
0.75
1.00
-1.00
-40 100
MAX5214
VDD = 5V
MAX
MIN
DIFFERENTIAL NONLINEARITY
vs. DIGITAL INPUT CODE
MAX5214 toc04b
DIGITAL INPUT CODE (LSB)
INL (LSB)
49,152 65,53632,76816,384
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
-0.5
0
MAX5216
VDD = 5V
INTEGRAL NONLINEARITY
vs. TEMPERATURE
MAX5214 toc03b
TEMPERATURE (°C)
INL (LSB)
806040200-20
-2
-1
0
1
2
3
-3
-40 100
MAX
MIN
MAX5216
VDD = 5V
DIFFERENTIAL NONLINEARITY
vs. SUPPLY VOLTAGE
MAX5214 toc05a
SUPPLY VOLTAGE (V)
INL (LSB)
4.74.23.73.2
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
-0.5
2.7 5.2
MAX5214
MAX
MIN
6 ______________________________________________________________________________________
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
DIFFERENTIAL NONLINEARITY
vs. SUPPLY VOLTAGE
MAX5214 toc05b
SUPPLY VOLTAGE (V)
INL (LSB)
4.74.23.73.2
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
-0.5
2.7 5.2
MAX5216
MAX
MIN
DIFFERENTIAL NONLINEARITY
vs. TEMPERATURE
MAX5214 toc06a
TEMPERATURE (°C)
MAX
MIN
INL (LSB)
1008040 600 20-20
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
-0.5
-40
MAX5214
VDD = 5V
DIFFERENTIAL NONLINEARITY
vs. TEMPERATURE
MAX5214 toc06b
TEMPERATURE (°C)
MAX
MIN
INL (LSB)
1008040 600 20-20
-0.4
-0.3
-0.2
-0.1
0
0.1
0.2
0.3
0.4
0.5
-0.5
-40
MAX5216
VDD = 5V
OFFSET ERROR vs. SUPPLY VOLTAGE
MAX5214 toc07a
SUPPLY VOLTAGE (V)
OFFSET ERROR (mV)
5.24.74.23.73.2
0.25
0.50
0.75
1.00
1.25
0
2.7
MAX5214
OFFSET ERROR vs. TEMPERATURE
MAX5214 toc08b
TEMPERATURE (°C)
OFFSET ERROR (mV)
0.40
0.60
0.80
1.00
1.20
0
0.20
1008040 600 20-20-40
MAX5216
VDD = 5V
OFFSET ERROR vs. SUPPLY VOLTAGE
MAX5214 toc07b
SUPPLY VOLTAGE (V)
OFFSET ERROR (mV)
5.24.74.23.73.2
0.25
0.50
0.75
1.00
1.25
0
2.7
MAX5216
FULL-SCALE OUTPUT
vs. SUPPLY VOLTAGE
MAX5214 toc09a
SUPPLY VOLTAGE (V)
4.7
4.23.73.2
2.4987
2.4989
2.4991
2.4993
2.4995
2.4985
2.7
MAX5214
VREF = 2.5V
OUTPUT VOLTAGE (V)
OFFSET ERROR vs. TEMPERATURE
MAX5214 toc08a
TEMPERATURE (°C)
OFFSET ERROR (mV)
0.25
0.50
0.75
1.00
1.25
0
1008040 600 20-20-40
MAX5214
VDD = 5V
FULL-SCALE OUTPUT
vs. SUPPLY VOLTAGE
MAX5214 toc09b
SUPPLY VOLTAGE (V)
OUTPUT VOLTAGE (V)
4.7 5.24.23.73.2
2.4987
2.4989
2.4991
2.4993
2.4995
2.4985
2.7
MAX5216
VREF = 2.5V
_______________________________________________________________________________________ 7
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
MAX5214 toc11a
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
806020 400-20
62
64
66
68
70
72
74
76
78
80
60
-40 100
MAX5214
NO LOAD
VDD = VREF
VOUT = MIDSCALE
VDD = 4V
VDD = 2.7V
VDD = 5.25VVDD = 5V
MAX5214 toc11c
SUPPLY CURRENT (µA)
45
50
55
60
65
70
75
80
40
SUPPLY CURRENT vs. TEMPERATURE
TEMPERATURE (°C)
806020 400-20-40 100
VDD = 4V
MAX5214
NO LOAD
VDD = VREF
VOUT = ZEROSCALE
VDD = 5V VDD = 5.25V
VDD = 2.7V
SUPPLY CURRENT vs. TEMPERATURE
MAX5214 toc11b
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
806020 400-20
62
64
66
68
70
72
74
76
78
80
60
-40 100
MAX5216
NO LOAD
VDD = VREF
VOUT = MIDSCALE
VDD = 4V
VDD = 2.7V
VDD = 5.25VVDD = 5V
MAX5214 toc11d
SUPPLY CURRENT (µA)
45
50
55
60
65
70
75
80
40
SUPPLY CURRENT vs. TEMPERATURE
TEMPERATURE (°C)
806020 400-20-40 100
VDD = 4V
MAX5216
NO LOAD
VDD = VREF
VOUT = ZEROSCALE
VDD = 5V VDD = 5.25V
VDD = 2.7V
FULL-SCALE OUTPUT vs. TEMPERATURE
MAX5214 toc10b
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
2.4907
2.4909
2.4911
2.4913
2.4915
2.4905
1008040 600 20-20-40
MAX5216
VDD = 5V
FULL-SCALE OUTPUT vs. TEMPERATURE
MAX5214 toc10a
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
2.4982
2.4984
2.4986
2.4988
2.4990
2.4980
1008040 600 20-20-40
MAX5214
VDD = 5V
8 ______________________________________________________________________________________
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAJOR CODE TRANSITION
(0x8000 TO 0x7FFF)
MAX5214 toc15a
OUT = MIDSCALE
AC-COUPLED
1mV/div
4µs/div
MAX5216
VDD = 5V
NO LOAD
REF = 5V
MAX5214 toc12a
SUPPLY CURRENT (µA)
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
4.74.23.2 3.72.7 5.2
62
64
66
68
70
72
74
76
78
80
60
MAX5216
MAX5214
NO LOAD
VDD = VREF
VOUT = MIDSCALE
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(POWER-DOWN MODE)
MAX5214 toc13
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (µA)
4.74.23.73.2
0.20
0.40
0.60
0.80
1.00
1.20
1.40
0
2.7 5.2
NO LOAD
TA = +85°C
TA = 0°C
TA = +105°C
TA = +25°C
TA = -40°C
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SUPPLY VOLTAGE (V)
4.74.23.2 3.7
2.7 5.2
MAX5214 toc12b
SUPPLY CURRENT (µA)
45
50
55
60
65
70
75
80
40
MAX5216
MAX5214
NO LOAD
VDD = VREF
VOUT = ZEROSCALE
VOUT vs. TIME
(EXITING POWER-DOWN MODE)
MAX5214 toc14a
OUT = MIDSCALE
1V/div
0V
10µs/div
MAX5216
RL = 10kI
VDD = 5V
VREF = 5V
VOUT vs. TIME
(EXITING POWER-DOWN MODE)
MAX5214 toc14b
OUT = MIDSCALE
1V/div
10µs/div
MAX5214
RL = 10kI
VDD = 5V
VREF = 5V
0V
_______________________________________________________________________________________ 9
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
MAJOR CODE TRANSITION
(0x2000 TO 0x1FFF)
MAX5214 toc15c
1mV/div
OUT = MIDSCALE
AC-COUPLED
4µs/div
MAX5214
VDD = 5V
REF = 5V
NO LOAD
MAJOR CODE TRANSITION
(0x3FFF TO 0x8000)
MAX5214 toc15b
1mV/div
OUT = MIDSCALE
AC-COUPLED
4µs/div
MAX5216
VDD = 5V
REF = 5V
NO LOAD
MAJOR CODE TRANSITION
(0x1FFF TO 0x2000)
MAX5214 toc15d
1mV/div
OUT = MIDSCALE
AC-COUPLED
4µs/div
MAX5214
VDD = 5V
REF = 5V
NO LOAD
SETTLING TIME HIGH
MAX5214 toc16a
3.75V
1.25V
2µs/div
MAX5216
VDD = 5V
REF = 5V
SETTLING TIME LOW
MAX5214 toc16b
3.75V
1.25V
2µs/div
MAX5216
VDD = 5V
REF = 5V
SETTLING TIME HIGH
MAX5214 toc16c
3.75V
1.25V
2µs/div
MAX5214
VDD = 5V
REF = 5V
10 _____________________________________________________________________________________
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
DIGITAL FEEDTHROUGH
MAX5214 toc17
VOUT
AC-COUPLED
1mV/div
VSCLK
5V/div
40ns/div
SETTLING TIME LOW
MAX5214 toc16d
3.75V
1.25V
2µs/div
MAX5214
VDD = 5V
REF = 5V
OUTPUT VOLTAGE
vs. OUTPUT CURRENT
MAX5214 toc18
OUTPUT CURRENT (mA)
OUTPUT VOLTAGE (V)
54321
2.30
2.35
2.40
2.45
2.50
2.55
2.25
0 6
VDD = 5V
VREF = 5V
SUPPLY CURRENT
vs. DIGITAL INPUT VOLTAGE
MAX5214 toc19
DIGITAL INPUT VOLTAGE (V)
DIGITAL SUPPLY CURRENT (µA)
500
1000
1500
2000
2500
3000
3500
0
012345
VDDI = 2.7V
HIGH T0 LOW
VDDI = 2.7V
LOW T0 HIGH
VDD = 5V
LOW T0 HIGH
VDDI = 5V
HIGH T0 LOW
REFERENCE INPUT BANDWIDTH
vs. FREQUENCY
MAX5214 toc20
INPUT FREQUENCY (kHz)
ATTENUATION (dB)
10010
-15
-10
-5
0
5
-20
1 1000
______________________________________________________________________________________ 11
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
Pin Description
Pin Configuration
Detailed Description
The MAX5214/MAX5216 are pin-compatible and soft-
ware-compatible 14-bit and 16-bit DACs. The MAX5214/
MAX5216 are single-channel, low-power, high-refer-
ence input resistance, and buffered voltage-output
DACs. The MAX5214/MAX5216 minimize the digital
noise feedthrough from their inputs to their outputs by
powering down the SCLK and DIN input buffers after
completion of each data frame. The data frames are
16-bit for the MAX5214 and 24-bit for the MAX5216. On
power-up, the MAX5214/MAX5216 reset the DAC output
to zero, providing additional safety for applications that
drive valves or other transducers which need to be off on
power-up. The MAX5214/MAX5216 contain a segmented
resistor string-type DAC, a serial-in/parallel-out shift reg-
ister, a DAC register, power-on-reset (POR) circuit, CLR
to asynchronously clear the device independent of the
serial interface, and control logic. On the falling edge
of the clock (SCLK) pulse, the serial input (DIN) data is
shifted into the device, MSB first.
Output Amplifier (OUT)
The MAX5214/MAX5216 include an internal buffer on the
DAC output. The internal buffer provides improved load
regulation and transition glitch suppression for the DAC
output. The output buffer slews at 0.5V/Fs and drives
up to 10kI in parallel with 100pF. The analog supply
voltage (VDD) determines the maximum output voltage
range of the device as VDD powers the output buffer.
DAC Reference (REF)
The external reference input features a typical input
impedance of 256kI and accepts an input voltage
from +2V to VDD. Connect an external voltage supply
between REF and GND to apply an external reference.
Visit www.maxim-ic.com/products/references for a list
of available voltage-reference devices.
OUT
CLRDIN
1
2
8
7
GND
VDD
CS
SCLK
REF
µMAX
TOP VIEW
3
4
6
5
MAX5214
MAX5216
PIN NAME FUNCTION
1 REF Reference Voltage Input. Bypass REF with a 0.1FF capacitor to GND.
2CS Active-Low Chip-Select Input
3 SCLK Serial-Clock Input
4 DIN Data In
5CLR Active-Low Asynchronous Digital-Clear Input. Drive CLR low to clear the contents of the input and
DAC registers and set the DAC output to zero.
6 OUT Buffered DAC Output
7 VDD Supply Voltage. Bypass VDD with a 0.1FF capacitor to GND.
8 GND Ground
12 _____________________________________________________________________________________
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
Table 1. Operating Mode Truth Table (MAX5214)
Serial Interface
The MAX5214/MAX5216 3-wire serial interface is com-
patible with MICROWIRE, SPI, QSPI, and DSP. The
interface provides three inputs: SCLK, CS, and DIN. The
chip-select input (CS) frames the serial data loading at
DIN. Following a chip-select input high-to-low transition,
the data is shifted synchronously and latched into the
input register on each falling edge of the serial-clock
input (SCLK). Each serial word is 16-bit for the MAX5214
and 24-bit for the MAX5216. The first 2 bits are the
control bits followed by 14 data bits (MSB first) for the
MAX5214 and 22 data bits (MSB first) for the MAX5216
as shown in Tables 1 and 2. The serial input register
transfers its contents to the input registers after loading
16/24 bits of data and updates the DAC output immedi-
ately after the data is received on the 16-/24-bit falling
edge of the clock. To initiate a new data transfer, drive
CS high and keep CS high for a minimum of 20ns before
the next write sequence. The SCLK can be either high or
low between CS write pulses. Figures 1 and 2 show the
timing diagram for the complete 3-wire serial interface
transmission. The MAX5216 DAC code is unipolar binary
with VOUT = (code/65,535) x VREF. The MAX5214 DAC
code is unipolar binary with VOUT = (code/16,383) x
VREF. See Tables 1 and 2.
Table 2. Operating Mode Truth Table (MAX5216)
16-BIT WORD
FUNCTION
CONTROL
BITS DATA BITS
MSB LSB
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
0 0 X X X X X X X X X X X X X X No operation
1 0 0 X A1 A0 X X X X X X X X X X Power-down
(see Table 3)
0 1 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 Write through
1 1 Reserved, Do Not Use
24-BIT WORD
FUNCTION
CONTROL
BITS DATA BITS
MSB LSB
D23 D22 D21 D20 D19 D18 D17 D16 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5–
D0
0 0 X X X X X X X X X X X X X X X X X No operation
1 0 0 X A1 A0 X X X X X X X X X X X X X Power-down
(see Table 3)
0 1 B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 X Write through
1 1 Reserved, Do Not Use
______________________________________________________________________________________ 13
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
Writing to the Devices
1) Drive CS low, enabling the shift register.
2) Clock 16/24 bits of data into DIN (MSB first and LSB
last), observing the specified setup and hold times.
3) After clocking in the last data bit, drive CS high. CS
must remain high for 20ns before the next transmis-
sion is started.
Figure 1 shows a write operation for the transmission of
16 bits. If CS is driven high at any point prior to receiving
16 bits, the transmission is discarded.
Figure 2 shows a write operation for the transmission of
24 bits. If CS is driven high at any point prior to receiving
24 bits, the transmission is discarded.
Clear (CLR)
The MAX5214/MAX5216 feature an asynchronous active-
low CLR logic input that sets the DAC output to zero.
Driving CLR low clears the contents of both the input and
DAC registers and also aborts the on-going SPI com-
mand. To allow a new SPI command, drive CLR high.
Power-Down Mode
The MAX5214/MAX5216 feature a software-controlled
power-down mode. In power-down, the output discon-
nects from the buffer and is grounded with one of the
three selectable internal resistors. See Table 3 for the
selectable internal resistor values in power-down mode.
The selected mode takes effect on the 16th SCLK falling
edge of the MAX5214 and 24th SCLK falling edge of the
MAX5216. The serial interface remains active in power-
down mode. In order to abort the power-down mode
selection, pull CS high prior to the 16th (MAX5214) or
24th (MAX5216) SCLK falling edge. The contents of the
DAC register remain valid while in power-down mode,
allowing for the DAC to return to previous code by writing
0x8000 for the MAX5214 or 0x800000 for the MAX5216
(Table 3). A write to the write-through register causes the
device to immediately exit power-down mode and transi-
tion to the requested code (see Tables 1 and 2).
Table 3. Power-Down Modes
Table 4. MAX5216 Input Code vs. Output Voltage
Table 5. MAX5214 Input Code vs. Output Voltage
A1 A0 DESCRIPTION DAC OPERATION
CONDITION
0 0 DAC powers up and returns to its previous code setting. Normal operation
0 1 DAC powers down; OUT is high impedance.
Power-down1 0 DAC powers down; OUT connects to ground through an internal 100kI resistor.
1 1 DAC powers down; OUT connects to ground through an internal 1kI resistor.
DAC LATCH CONTENTS ANALOG OUTPUT (VOUT)
MSB g LSB
1111 1111 1111 11XX VREF x (16,383/16,383)
1000 0000 0000 00XX VREF x (8,192/16,383) = 1/2 VREF
0000 0000 0000 01XX VREF x (1/16,383)
0000 0000 0000 00XX 0V
DAC LATCH CONTENTS ANALOG OUTPUT (VOUT)
MSB g LSB
1111 1111 1111 1111 VREF x (65,535/65,535)
1000 0000 0000 0000 VREF x (32,768/65,535) = 1/2 VREF
0000 0000 0000 0001 VREF x (1/65,535)
0000 0000 0000 0000 0V
14 _____________________________________________________________________________________
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
Applications Information
Power-On Reset (POR)
When first power is applied to VDD, the input registers
are set to zero so the DAC output is set to code zero.
To optimize DAC linearity, wait until the supplies have
settled. The MAX5214/MAX5216 output voltage range is
0 to VREF.
Power Supplies and
Bypassing Considerations
Bypass VDD with high-quality 0.1µF ceramic capacitors to a
low-impedance ground as close as possible to the device.
Minimize lead lengths to reduce lead inductance.
Connect the GND to the analog ground plane.
Layout Considerations
Digital and AC transient signals on GND can create noise
at the output. Connect GND to the star ground for the
DAC system. Refer the remote DAC loads to this system
ground for the best possible performance. Use proper
grounding techniques, such as a multilayer board with a
low-inductance ground plane, or star connect all ground
return paths back to the MAX5214/MAX5216 GND.
Carefully lay out the traces between channels to reduce
AC cross-coupling. Do not use wire-wrapped boards
and sockets. Use shielding to improve noise immunity.
Do not run analog and digital signals parallel to one
another, especially clock signals. Avoid routing digital
lines underneath the MAX5214/MAX5216 package.
Definitions
Integral Nonlinearity (INL)
INL is the deviation of the measured transfer function
from a straight line drawn between two codes once offset
and gain errors have been nullified.
Differential Nonlinearity (DNL)
DNL is the difference between an actual step height and
the ideal value of 1 LSB. If the magnitude of the DNL is
greater than -1 LSB, the DAC guarantees no missing
codes and is monotonic.
Offset Error
Offset error indicates how well the actual transfer func-
tion matches the ideal transfer function at a single point.
Typically, the point at which the offset error is specified
is at or near the zero-scale point of the transfer function.
Gain Error
Gain error is the difference between the ideal and the
actual full-scale output voltage on the transfer curve,
after nullifying the offset error. This error alters the slope
of the transfer function and corresponds to the same
percentage error in each step.
Settling Time
The settling time is the amount of time required from
the start of a transition, until the DAC output settles to
the new output value within the converter’s specified
accuracy.
Digital Feedthrough
Digital feedthrough is the amount of noise that appears
on the DAC output when the DAC digital control lines
are toggled.
Digital-to-Analog Glitch Impulse
A major carry transition occurs at the midscale point
where the MSB changes from low to high and all other
bits change from high to low, or where the MSB changes
from high to low and all other bits change from low to
high. The duration of the magnitude of the switching
glitch during a major carry transition is referred to as the
digital-to-analog glitch impulse.
Digital-to-Analog Power-Up Glitch Impulse
The digital-to-analog power-up glitch is the duration of
the magnitude of the switching glitch that occurs as the
device exits power-down mode.
______________________________________________________________________________________ 15
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
Typical Operating Circuit
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
µC
CS
CLR
OUT OUTPUT
REF
SCLK
DIN
MAX6029
100nF
VDD
GND
DAC
POWER SUPPLY
4.7µF
IN OUT
100pF
MAX5214
MAX5216
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
8 FMAX U8+3 21-0036 90-0092
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
MAX5214/MAX5216
14-/16-Bit, Low-Power,
High-Performance, Buffered Single DACs
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 12/10 Initial release —
