REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R104-97. - CFS 96-11-18 Monica L. Poelking B Changes in accordance with NOR 5962-R291-97. - CFS 97-05-06 Monica L. Poelking C Incorporate Revisions A and B. Update boilerplate to MIL-PRF-38535 requirements. - LTG 01-11-01 Thomas M. Hess D Add device types 02 and 03. Add test circuit to figure 4. Add die type B to appendix A. Update boilerplate and editorial changes throughout. - LTG 04-08-02 Thomas M. Hess REV SHEET REV D D D D D D D D D D D D D D SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE APPROVED BY Monica L. Poelking DRAWING APPROVAL DATE 96-04-24 REVISION LEVEL AMSC N/A DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http://www.dscc.dla.mil CHECKED BY Thanh V. Nguyen D MICROCIRCUIT, DIGITAL, RADIATION HARDENED, ADVANCED CMOS, 8-BIT SERIALIN/PARALLEL-OUT SHIFT REGISTER, MONOLITHIC SILICON SIZE CAGE CODE A 67268 SHEET DSCC FORM 2233 APR 97 . 1 OF 5962-96556 28 5962-E357-03 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example 5962 Federal stock class designator \ H RHA designator (see 1.2.1) 96556 01 Device type (see 1.2.2) / V Device class designator (see 1.2.3) X Case outline (see 1.2.4) C Lead finish (see 1.2.5) \/ Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 54ACS164 02 54ACS164E 03 54ACS164E Circuit function Radiation hardened, 8-bit serial-in/parallelout shift register Enhanced radiation hardened, 8-bit serial-in /parallel-out shift register Enhanced radiation hardened, 8-bit serial-in /parallel-out shift register 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class M Q or V Device requirements documentation Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Certification and qualification to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter C X Descriptive designator Terminals GDIP1-T14 or CDIP2-T14 CDFP3-F14 Package style 14 14 Dual-in-line Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 2 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD).................................................................................. DC input voltage range (VIN)................................................................................ DC output voltage range (VOUT)........................................................................... DC input current, any one input (IIN) .................................................................... Latch-up immunity current (ILU) ........................................................................... Storage temperature range (TSTG)....................................................................... Lead temperature (soldering, 5 seconds)............................................................ Thermal resistance, junction-to-case (JC) .......................................................... Junction temperature (TJ) .................................................................................... Maximum package power dissipation (PD) .......................................................... -0.3 V dc to +7.0 V dc -0.3 V dc to VDD + 0.3 V dc -0.3 V dc to VDD + 0.3 V dc 10 mA 150 mA -65C to +150C +300C See MIL-STD-1835 +175C 1.0 W 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD): Device type 01.................................................................................................. Device types 02 and 03 .................................................................................... Input voltage range (VIN)...................................................................................... Output voltage range (VOUT) ................................................................................ Case operating temperature range (TC) .............................................................. Maximum input rise and fall time at VDD = 4.5 V (tr, tf)......................................... +4.5 V dc to +5.5 V dc +3.0 V dc to +5.5 V dc +0.0 V dc to VDD +0.0 V dc to VDD -55C to +125C 1 ns/V 4/ 1.5 Radiation features. 5/ Total dose: 6/ Device type 01 (dose rate = 50 - 300 rads (Si)/s)............................................ Device type 02 (dose rate = 1 - 49 rads (Si)/s)................................................ Device type 03 (dose rate = 50 - 300 rads (Si)/s)............................................ Single event phenomenon (SEP) effective: Linear energy threshold (LET) no upsets (see 4.4.4.4) ..................................... Linear energy threshold (LET) no latch-up (see 4.4.4.4)................................... Dose rate upset (20 ns pulse) (Device type 01) .................................................. Dose rate survivability (Device type 01) .............................................................. 6 > 1 x 10 Rads (Si) 6 > 1 x 10 Rads (Si) 5 > 5 x 10 Rads (Si) 2 > 80 MeV/(mg/cm ) 2 > 120 MeV/(mg/cm ) 9 > 1 x 10 Rads (Si)/s 7/ 12 > 1 x 10 Rads (Si)/s 7/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified VDD range and case temperature range of -55C to +125C unless otherwise noted. 4/ Derate system propagation delays by difference in rise time to switch point for tr or tf > 1 ns/V. 5/ Radiation testing is performed on the standard evaluation circuit. 6/ Device types 01 and 03 are tested in accordance with MIL-STD-883, method 1019, condition A. Device type 02 is tested in accordance with MIL-STD-883, method 1019, condition B. 7/ When characterized as a result of procuring activities request, the condition will be specified for device types 02 and 03. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 3 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 MIL-STD-1835 - Test Method Standard Microcircuits. Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 MIL-HDBK-780 - List of Standard Microcircuit Drawings. Standard Microcircuit Drawings. (Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.1.1 Microcircuit die. For the requirements for microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuits. The switching waveforms and test circuits shall be as specified on figure 4. 3.2.6 Irradiation test connections. The irradiation test connections shall be as specified in table III. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 4 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are described in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 40 (see MIL-PRF-38535, appendix A). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 5 TABLE IA. Electrical performance characteristics Test Symbol High level input voltage Test conditions 1/ -55C TC +125C Unless otherwise specified VIH M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ Low level input voltage VIL M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ High level output voltage Low level output voltage Input current high VOH VOL IIH Input current low IIL M, D, P, L, R, F, G, H M, D, P, L, R, F, G 3/ For all inputs affecting output under test, VIN = VDD or VSS IOH = -100 A M, D, P, L, R, F, G, H M, D, P, L, R, F, G 3/ For all inputs affecting output under test, VIN = VDD or VSS IOH = -100 A M, D, P, L, R, F, G, H M, D, P, L, R, F, G 3/ For all inputs affecting output under test, VIN = VDD or VSS IOL = 100 A M, D, P, L, R, F, G, H M, D, P, L, R, F, G 3/ For all inputs affecting output under test, VIN = VDD or VSS IOL = 100 A M, D, P, L, R, F, G, H M, D, P, L, R, F, G 3/ For input under test, VIN = VDD For all other inputs VIN = VDD or VSS M, D, P, L, R, F, G, H M, D, P, L, R, F, G 3/ For input under test, VIN = VSS For all other inputs VIN = VDD or VSS M, D, P, L, R, F, G, H M, D, P, L, R, F, G 3/ 3/ VDD Group A subgroups 02, 03 02 03 All 01, 02 03 All 01, 02 03 02, 03 02 03 All 01, 02 03 All 01, 02 03 02, 03 3.0 V 3.0 V 1, 2, 3 1 1 1, 2, 3 1 1 1, 2, 3 1 1 1, 2, 3 1 1 1, 2, 3 1 1 1, 2, 3 1 1 1, 2, 3 2.75 V 4.5 V 1 1 1, 2, 3 2.75 2.75 4.25 V 4.25 4.25 3.0 V 1 1 1, 2, 3 3/ 02 03 All 3/ 01, 02 03 02, 03 3/ 02 03 All 3/ 01, 02 03 All 3/ 01, 02 03 All 3/ Unit Device type 4.5 V 5.5 V 3.0 V 4.5 V 5.5 V Limits 2/ Min Max 2.1 2.1 2.1 3.15 3.15 3.15 3.85 3.85 3.85 V 0.9 0.9 0.9 1.35 1.35 1.35 1.65 1.65 1.65 V 0.25 V 4.5 V 1 1 1, 2, 3 0.25 0.25 0.25 V 5.5 V 1 1 1, 2, 3 0.25 0.25 +1.0 A 5.5 V 1 1 1, 2, 3 +1.0 +1.0 -1.0 A 1 1 -1.0 -1.0 01, 02 03 See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 6 TABLE IA. Electrical performance characteristics - Continued. Test Symbol Output current (source) Output current (sink) IOH 4/ IOL 4/ Test conditions 1/ -55C TC +125C unless otherwise specified For output under test VOUT = VDD - 0.4 V VIN = VDD or VSS M, D, P, L, R, F, G, H M, D, P, L, R, F, G 3/ For output under test VOUT = VDD - 0.4 V VIN = VDD or VSS M, D, P, L, R, F, G, H M, D, P, L, R, F, G 3/ For output under test VOUT = 0.4 V, VIN = VDD or VSS M, D, P, L, R, F, G, H M, D, P, L, R, F, G 3/ For output under test VOUT = 0.4 V, VIN = VDD or VSS M, D, P, L, R, F, G, H M, D, P, L, R, F, G 3/ VIN = VDD or VSS M, D, P, L, R, F, G, H M, D, P, L, R, F, G 3/ VOUT = VDD and VSS 3/ mA 1 1 1, 2, 3 -6.0 -6.0 -8.0 mA 1 1 1, 2, 3 -8.0 -8.0 6.0 mA 1 1 1, 2, 3 6.0 6.0 8.0 mA 8.0 8.0 3.0 V and 3.6 V 4.5 V and 5.5 V 3.0 V and 3.6 V 4.5 V and 5.5 V f = 1 MHz, see 4.4.1c 01, 02 03 All 01, 02 03 02, 03 All All 3.0 V 5.5 V 0.0 V 1 1 1, 2, 3 1 1 1, 2, 3 1, 2, 3 4 COUT f = 1 MHz, see 4.4.1c All 0.0 V 4 15.0 pF PSW 7/ CL = 50 pF, per switching output M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ 02, 03 02 03 All 01, 02 03 02, 03 02 03 All 01, 02 03 3.0 V and 3.6 V 4.5 V and 5.5 V 3.0 V and 3.6 V 4.5 V and 5.5 V 4, 5, 6 4 4 4, 5, 6 4 4 7, 8 7 7 7, 8 7 7 0.76 0.76 0.76 1.9 1.9 1.9 H H H H H H mW/ MHz Quiescent supply current IDDQ Short circuit output current Input capacitance Output capacitance Switching power dissipation IOS 5/ 6/ CIN 3/ M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ Functional test -6.0 02, 03 02 03 All 3/ 1, 2, 3 Group A subgroups 01, 02 03 02, 03 3/ Unit VDD 02 03 All 3/ Limits 2/ Min Max Device type 8/ See 4.4.1b M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ See 4.4.1b M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ 5.5 V 10.0 10.0 10.0 100 200 15.0 L L L L L L A mA pF mW/ MHz See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 7 TABLE IA. Electrical performance characteristics - Continued. Test Symbol Propagation delay time, CLK to any Q tPLH1 9/ Test conditions 1/ -55C TC +125C unless otherwise specified CL = 30 pF minimum See figure 4 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ VDD Group A subgroups 02, 03 3.0 V and 3.6 V 9, 10, 11 2.0 18.0 ns 9 9 9, 10, 11 9 9 9, 10, 11 2.0 2.0 2.0 2.0 2.0 2.0 18.0 18.0 14.0 14.0 14.0 22.0 ns 9 9 9, 10, 11 9 9 9, 10, 11 2.0 2.0 2.0 2.0 2.0 4.0 22.0 22.0 18.0 18.0 18.0 21.0 ns 9 9 9, 10, 11 9 9 9, 10, 11 4.0 4.0 4.0 4.0 4.0 4.0 21.0 21.0 17.0 17.0 17.0 25.0 ns 9 9 9, 10, 11 9 9 9, 10, 11 4.0 4.0 4.0 4.0 4.0 5.0 25.0 25.0 21.0 21.0 21.0 21.0 ns 9 9 9, 10, 11 9 9 9, 10, 11 5.0 5.0 5.0 5.0 5.0 5.0 21.0 21.0 17.0 17.0 17.0 25.0 ns 9 9 9, 10, 11 9 9 5.0 5.0 5.0 5.0 5.0 25.0 25.0 21.0 21.0 21.0 02 03 02, 03 02 03 02, 03 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ CL = 50 pF minimum See figure 4 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ tPHL1 9/ 02 03 All 01, 02 03 02, 03 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ CL = 30 pF minimum See figure 4 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ 02 03 02, 03 02 03 02, 03 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ CL = 50 pF minimum See figure 4 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ Propagation delay time, CLR to any Q tPHL2 9/ Unit Device type 02 03 All 01, 02 03 02, 03 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ CL = 30 pF minimum See figure 4 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ 02 03 02, 03 02 03 02, 03 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ CL = 50 pF minimum See figure 4 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ 02 03 All 01, 02 03 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ 4.5 V and 5.5 V 3.0 V and 3.6 V 4.5 V and 5.5 V 3.0 V and 3.6 V 4.5 V and 5.5 V 3.0 V and 3.6 V 4.5 V and 5.5 V 3.0 V and 3.6 V 4.5V and 5.5 V 3.0V and 3.6 V 4.5 V and 5.5 V Limits 2/ Min Max See footnotes at end of table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 8 TABLE IA. Electrical performance characteristics - Continued. Test Symbol Maximum clock frequency Setup time, data high or low before CLK Setup time, CLR inactive before CLK Hold time, data high or low after CLK CLK pulse width, high or low fMAX tS1 tS2 th 10/ tW1 tW2 CLR pulse width, low Test conditions 1/ -55C TC +125C unless otherwise specified CL = 50 pF minimum See figure 4 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ Limits 2/ Min Max Unit 9, 10, 11 83.0 MHz 9 9 9, 10, 11 9 9 9, 10, 11 83.0 83.0 83.0 83.0 83.0 4.0 ns 9 9 9, 10, 11 9 9 9, 10, 11 4.0 4.0 4.0 4.0 4.0 4.0 ns 9 9 9, 10, 11 9 9 9, 10, 11 4.0 4.0 4.0 4.0 4.0 2.0 ns 9 9 9, 10, 11 9 9 9, 10, 11 2.0 2.0 2.0 2.0 2.0 6.0 ns 9 9 9, 10, 11 9 9 9, 10, 11 6.0 6.0 6.0 6.0 6.0 6.0 ns 9 9 9, 10, 11 9 9 6.0 6.0 6.0 6.0 6.0 Device type VDD Group A subgroups 02, 03 3.0 V and 3.6 V 02 03 All 01, 02 03 02, 03 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ CL = 50 pF minimum See figure 4 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ 02 03 All 01, 02 03 02, 03 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ CL = 50 pF minimum See figure 4 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ 02 03 All 01, 02 03 02, 03 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ CL = 50 pF minimum See figure 4 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ 02 03 All 01, 02 03 02, 03 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ CL = 50 pF minimum See figure 4 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ 02 03 All 01, 02 03 02, 03 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ CL = 50 pF minimum See figure 4 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ 02 03 All 01, 02 03 M, D, P, L, R, F, G, H 3/ M, D, P, L, R, F, G 3/ 4.5 V and 5.5 V 3.0 V and 3.6 V 4.5 V and 5.5 V 3.0 V and 3.6 V 4.5 V and 5.5 V 3.0 V and 3.6 V 4.5 V and 5.5 V 3.0 V and 3.6 V 4.5 V and 5.5 V 3.0 V and 3.6 V 4.5 V and 5.5 V See footnotes on next sheet. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 9 TABLE IA. Electrical performance characteristics - Continued. 1/ Each input/output, as applicable, shall be tested at the specified temperature, for the specified limits, to the tests in table IA herein. Output terminals not designated shall be high level logic, low level logic, or open, except for the IDDQ test, the output terminals shall be open. When performing the IDDQ test, the current meter shall be placed in the circuit such that all current flows through the meter. 2/ For negative and positive voltage and current values, the sign designates the potential difference in reference to VSS and the direction of current flow respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum and maximum limits, as applicable, listed herein. 3/ Devices supplied to this drawing meet all levels M, D, P, L, R, F, G, and H of irradiation. However, device type 01 is tested in accordance with MIL-STD-883, method 1019, condition A for RHA level "H"; device type 02 is tested in accordance with MIL-STD-883, method 1019, condition B for RHA level "H"; device type 03 is tested in accordance with MIL-STD-883, method 1019, condition A for RHA level "G". Under method 1019, condition B, the devices are irradiated with a dose rate above 1 rad (Si)/sec. Pre and post irradiation values are identical unless otherwise specified in table IA. When performing post irradiation electrical measurements for any RHA level, TA=+25C. 4/ This test is guaranteed based on characterization data but not tested. 5/ This parameter is supplied as design limit but not guaranteed or tested. 6/ No more than one output should be shorted at a time for a maximum duration of one second. 7/ This value is calculated during the design/qualification process and is supplied as a design limit but is not tested. Total power consumption is determined by both idle/standby power consumption (Ps) and "at frequency" power consumption (Pf). To determine standby power consumption use the formula: PT = (n x PSW x f) + (Loads x Prdy x IOL x VOL) where n is the number of switching outputs; f is the frequency of the device; loads is the resistive power component, typically a TTL load; and Prdy is the percent duty cycle that the output is sinking current. 8/ The test vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2 herein. For VOUT measurements, L 0.5 V and H 4.0 V and are tested at VDD = 4.5 V and VDD = 5.5 V; L 0.5 V and H 2.5 V and are tested at VDD = 3.0 V and VDD = 3.6 V. 9/ For propagation delay tests, all paths must be tested. 10/ Based on characterization, hold time (th) of 0 ns can be assumed if the data setup time (tS1) is 10 ns. This is guaranteed but not tested. TABLE IB. SEP test limits. 1/ 2/ Device type All TA = Temperature 10C 3/ +25C VDD = 4.5 V Effective LET no upsets 2 [MeV/(mg/cm )] Maximum device cross section LET 80 6 x 10 cm /bit -9 Bias for latch-up test VDD = 5.5 V no latch-up LET = 3/ 4/ 2 120 1/ For SEP test conditions, see 4.4.4.4 herein. 2/ Technology characterization and model verification supplemented by in-line data may be used in lieu of end-of-line testing. Test plan must be approved by TRB and qualifying activity. 3/ Worst case temperature is TA +125C. 2 4/ Tested to a LET of 120 MeV/(mg/cm ) with no latch-up (SEL). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 10 Device type All Case outlines C and X Terminal number Terminal symbol Terminal number Terminal symbol 1 A 8 CLK 2 B 9 CLR 3 QA 10 QE 4 QB 11 QF 5 QC 12 QG 6 QD 13 QH 7 VSS 14 VDD FIGURE 1. Terminal connections. Inputs CLR L H H H H CLK X L Outputs A X X H L X B X X H X L QA L QA0 H L L QB...QH L...L QB0...QH0 QAn...QGn QAn...QGn QAn...QGn H = High voltage level L = Low voltage level X = Irrelevant = Low-to-high clock transition QA0, QB0...QH0 = The level of QA, QB ... QH, respectively, before the indicated steady-state input conditions were established. QAn... QGn = The level of QA...QG before the most recent low-to-high clock transition; indicates a one-bit shift. FIGURE 2. Truth table. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 11 FIGURE 3. Logic diagram. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 12 FIGURE 4. Switching waveforms and test circuit. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 13 NOTES: 1/ VREF = VDD/2. 2/ CL = 50 pF or CL = 30 pF minimum or equivalent (includes test jig and probe capacitance). 3/ ISRC is set to -1.0 mA and ISNK is set to 1.0 mA for tPHL and tPLH measurements. Note, either test circuit A or B may be used for these measurements. 4/ Input signal from pulse generator: VIN = 0.0 V to VDD; f 10 MHz; tr = 1.0 V/ns 0.3 V/ns; tf = 1.0 V/ns 0.3 V/ns; tr and tf shall be measured from 0.1 VDD to 0.9 VDD and from 0.9 VDD to 0.1 VDD, respectively. FIGURE 4. Switching waveforms and test circuit - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 14 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA = +125C, minimum. b. Interim and final electrical test parameters shall be as specified in table IIA herein. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table IIA herein. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). 4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.4). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 15 4.4.1 Group A inspection. a. Tests shall be as specified in table IIA herein. b. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table in figure 2 herein. For device classes Q and V subgroups 7 and 8 shall include verifying the functionality of the device. c. CIN and COUT shall be measured only for the initial test and after process or design changes which may affect capacitance. CIN shall be measured between the designated terminal and VSS at a frequency of 1 MHz. For CIN and COUT, test all applicable pins on five devices with zero failures. 4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883: a. Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. b. TA = +125C, minimum. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. 4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein. 4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). a. End-point electrical parameters shall be as specified in table IIA herein. b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes must meet the postirradiation end-point electrical parameter limits as defined in table IA at TA = +25C 5C, after exposure, to the subgroups specified in table IIA herein. 4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883, method 1019 and as specified herein. 4.4.4.1.1 Accelerated aging testing. Accelerated aging testing shall be performed on all devices requiring a RHA level greater than 5k rads (Si). The post-anneal end-point electrical parameter limits shall be as specified in table IA herein and shall be the pre-irradiation end-point electrical parameter limits at 25C 5C. Testing shall be performed at initial qualification and after any design or process changes which may affect the RHA response of the device. 4.4.4.2 Dose rate induced latchup testing. Dose rate induced latchup testing shall be performed in accordance with method 1020 of MIL-STD-883 and as specified herein (see 1.5 herein). Tests shall be performed on devices, SEC, or approved test structures at technology qualification and after any design or process changes which may affect the RHA capability of the process. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 16 4.4.4.3 Dose rate upset testing. Dose rate upset testing shall be performed in accordance with method 1021 of MIL-STD-883 and herein (see 1.5 herein). a. Transient dose rate upset testing shall be performed at initial qualification and after any design or process change which may affect the RHA performance of the devices. Test 10 devices with 0 defects unless otherwise specified. b. Transient dose rate upset testing for class Q and V devices shall be performed as specified by a TRB approved radiation hardness assurance plan and MIL-PRF-38535. TABLE IIA. Electrical test requirements. Test requirements Subgroups (in accordance with MIL-PRF-38535, table III) Subgroups (in accordance with MIL-STD-883, method 5005, table I) Device class M Device class Q Device class V Interim electrical parameters (see 4.2) 1, 7, 9 1, 7, 9 1, 7, 9 Final electrical parameters (see 4.2) 1, 2, 3, 7, 8, 9, 10, 11 1/ 1, 2, 3, 7, 8, 9, 10, 11 1/ 1, 2, 3, 7, 8, 9, 10, 11 2/ 3/ Group A test requirements (see 4.4) 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 Group C end-point electrical parameters (see 4.4) 1, 2, 3, 7, 8, 9, 10, 11 1, 2, 3, 7, 8, 9, 10, 11 1, 2, 3, 7, 8, 9, 10, 11 3/ Group D end-point electrical parameters (see 4.4) 1, 7, 9 1, 7, 9 1, 7, 9 Group E end-point electrical parameters (see 4.4) 1, 7, 9 1, 7, 9 1, 7, 9 1/ PDA applies to subgroups 1 and 7. 2/ PDA applies to subgroups 1, 7, and delta's. 3/ Delta limits, as specified in table IIB herein, shall be required where specified, and the delta values shall be completed with reference to the zero hour electrical parameters. TABLE IIB. Burn-in and operating life test, delta parameters (+25C). Parameters Symbol Delta limits Output voltage low VOL 100 mV Output voltage high VOH 100 mV STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 17 4.4.4.4 Single event phenomena (SEP). SEP testing shall be required on class V devices (see 1.5 herein). SEP testing shall be performed on a technology process on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or latchup characteristics. The recommended test conditions for SEP are as follows: a. The ion beam angle of incidence shall be between normal to the die surface and 60 to the normal, inclusive (i.e. 0 angle 60). No shadowing of the ion beam due to fixturing or package related effects is allowed. b. The fluence shall be 100 errors or 10 ions/cm . 6 2 5 2 2 c. The flux shall be between 10 and 10 ions/cm /s. The cross-section shall be verified to be flux independent by measuring the cross-section at two flux rates which differ by at least an order of magnitude. d. The particle range shall be 20 micron in silicon. e. The test temperature shall be +25C for the upset measurements and the maximum rated operating temperature 10C for the latchup measurements. f. Bias conditions shall be defined by the manufacturer for the latchup measurements. g. Test four devices with zero failures. h. For SEP test limits, see table IB herein. TABLE III. Irradiation test connections. Device types Open Ground 3.0 V VDD 5.5 V 01, 02, 03 3, 4, 5, 6, 10, 11, 12, 7, 8 1, 2, 9, 14 13 NOTE: Each pin except 7 and 14 will have a resistor of 2.49 k 5% for irradiation testing. 4.5 Methods of inspection. Methods of inspection shall be specified as follows: 4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit VSS terminal. Currents given are conventional current and positive when flowing into the referenced terminal. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, and logistics purposes. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractorprepared specification or drawing. 6.1.2 Substitutability. Device class Q devices will replace device class M devices. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 18 6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal. 6.3 Record of users. Military and industrial users shall inform Defense Supply Center Columbus (DSCC) when a system application requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronics devices (FSC 5962) should contact DSCC-VA, telephone (614) 692-0544. Comments. Comments on this drawing should be directed to DSCC-VA, P.O. Box 3990, Columbus, Ohio 43218-3990, or telephone (614) 692-0547. 6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. 6.6 Sources of supply. 6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this drawing. 6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by DSCC-VA. 6.7 Additional information. A copy of the following additional data shall be maintained and available from the device manufacturer: a. RHA upset levels. b. Test conditions (SEP). c. Number of upsets (SEP). d. Number of transients (SEP). e. Occurrence of latchup (SEP). STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 19 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96556 A.1 SCOPE A.1.1 Scope. This appendix establishes minimum requirements for microcircuit die to be supplied under the Qualified Manufacturers List (QML) Program. QML microcircuit die meeting the requirements of MIL-PRF-38535 and the manufacturers approved QM plan for use in monolithic microcircuits, multi-chip modules (MCMs), hybrids, electronic modules, or devices using chip and wire designs in accordance with MIL-PRF-38534 are specified herein. Two product assurance classes consisting of military high reliability (device class Q) and space application (device class V) are reflected in the Part or Identification Number (PIN). When available, a choice of Radiation Hardiness Assurance (RHA) levels are reflected in the PIN. A.1.2 PIN. The PIN is as shown in the following example: 5962 H Federal stock class designator \ 96556 RHA designator (see A.1.2.1) 01 V 9 B Device type (see A.1.2.2) Device class designator (see A.1.2.3) Die code Die details (see A.1.2.4) / \/ Drawing number A.1.2.1 RHA designator. Device classes Q and V RHA identified die meet the MIL-PRF-38535 specified RHA levels. A dash (-) indicates a non-RHA die. A.1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 01 54ACS164 02 54ACS164E 03 54ACS164E Circuit function Radiation hardened, 8-bit serial-in/parallel-out shift register Enhanced radiation hardened, 8-bit serial-in /parallel-out shift register Enhanced radiation hardened, 8-bit serial-in /parallel-out shift register A.1.2.3 Device class designator. Device class Q or V Device requirements documentation Certification and qualification to the die requirements of MIL-PRF-38535 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 20 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96556 A.1.2.4 Die details. The die details designation is a unique letter which designates the die's physical dimensions, bonding pad location(s) and related electrical function(s), interface materials, and other assembly related information, for each product and variant supplied to this appendix. A.1.2.4.1 Die physical dimensions. Die type Figure number 01 02 03 A-1 B-1 B-1 A.1.2.4.2 Die bonding pad locations and electrical functions. Die type Figure number 01 02 03 A-1 B-1 B-1 A.1.2.4.3 Interface materials. Die type Figure number 01 02 03 A-1 B-1 B-1 A.1.2.4.4 Assembly related information. Die type Figure number 01 02 03 A-1 B-1 B-1 A.1.3 Absolute maximum ratings. See paragraph 1.3 herein for details. A.1.4 Recommended operating conditions. See paragraph 1.4 herein for details. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 21 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96556 A.2 APPLICABLE DOCUMENTS. A.2.1 Government specifications, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARD MIL-STD-883 - Test Method Standard Microcircuits. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http://assist.daps.dla.mil/quicksearch/ or www.dodssp.daps.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) A.2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. A.3 REQUIREMENTS A.3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. A.3.2 Design, construction and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and the manufacturer's QM plan, for device classes Q and V and herein. A.3.2.1 Die physical dimensions. The die physical dimensions shall be as specified in A.1.2.4.1 and on figures A-1 and B-1. A.3.2.2 Die bonding pad locations and electrical functions. The die bonding pad locations and electrical functions shall be as specified in A.1.2.4.2 and on figures A-1 and B-1. A.3.2.3 Interface materials. The interface materials for the die shall be as specified in A.1.2.4.3 and on figures A-1 and B-1. A.3.2.4 Assembly related information. The assembly related information shall be as specified in A.1.2.4.4 and on figures A-1and B-1. A.3.2.5 Truth table. The truth table shall be as defined in paragraph 3.2.3 herein. A.3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be as defined in paragraph 3.2.6 herein. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 22 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96556 A.3.3 Electrical performance characteristics and post-irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post-irradiation parameter limits are as specified in table IA of the body of this document. A.3.4 Electrical test requirements. The wafer probe test requirements shall include functional and parametric testing sufficient to make the packaged die capable of meeting the electrical performance requirements in table IA. A.3.5 Marking. As a minimum, each unique lot of die, loaded in single or multiple stack of carriers, for shipment to a customer, shall be identified with the wafer lot number, the certification mark, the manufacturer's identification and the PIN listed in A.1.2 herein. The certification mark shall be a "QML" or "Q" as required by MIL-PRF-38535. A.3.6 Certification of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see A.6.4 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this appendix shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and the requirements herein. A.3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuit die delivered to this drawing. A.4 VERIFICATION A.4.1 Sampling and inspection. For device classes Q and V, die sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modifications in the QM plan shall not affect the form, fit, or function as described herein. A.4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and as defined in the manufacturer's QM plan. As a minimum, it shall consist of: a. Wafer lot acceptance for class V product using the criteria defined in MIL-STD-883, method 5007. b. 100% wafer probe (see paragraph A.3.4 herein). c. 100% internal visual inspection to the applicable class Q or V criteria defined in MIL-STD-883, method 2010 or the alternate procedures allowed in MIL-STD-883, method 5004. A.4.3 Conformance inspection. A.4.3.1 Group E inspection. Group E inspection is required only for parts intended to be identified as radiation assured (see A.3.5 herein). RHA levels for device classes Q and V shall be as specified in MIL-PRF-38535. End point electrical testing of packaged die shall be as specified in table IIA herein. Group E tests and conditions are as specified in paragraphs 4.4.4 herein. A.5 DIE CARRIER A.5.1 Die carrier requirements. The requirements for the die carrier shall be accordance with the manufacturer's QM plan or as specified in the purchase order by the acquiring activity. The die carrier shall provide adequate physical, mechanical and electrostatic protection. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 23 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96556 A.6 NOTES A.6.1 Intended use. Microcircuit die conforming to this drawing are intended for use in microcircuits built in accordance with MIL-PRF-38535 or MIL-PRF-38534 for government microcircuit applications (original equipment), design applications, and logistics purposes. A.6.2 Comments. Comments on this appendix should be directed to DSCC-VA, P.O. Box 3990, Columbus, Ohio, 43218-3990 or telephone (614) 692-0547. A.6.3 Abbreviations, symbols and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-38535 and MIL-HDBK-1331. A.6.4 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535. The vendors listed within QML-38535 have submitted a certificate of compliance (see A.3.6 herein) to DSCC-VA and have agreed to this drawing. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 24 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96556 Die physical dimensions. Die size: Die thickness: 111x 81 mils. 17 1 mils Die bonding pad locations and electrical functions. NOTE: Pad numbers reflect terminal numbers when placed in case outlines C and X (see figure 1). FIGURE A-1. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 25 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96556 Interface materials. Top metallization: Si Al Cu Backside metallization: None 9.0kA - 12.5kA Glassivation. Type: Thickness: Substrate: Phosphorous Doped SiO2 9.0kA - 11.0kA Epitaxial Layer on Single Crystal Silicon Assembly related information. Substrate potential: Tied to VDD Special assembly Instructions: Do not wire bond the six probe ID pads FIGURE A-1 - Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 26 PPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96556 Die physical dimensions. Die size: Die thickness: 111x 81 mils. 17 1 mils Die bonding pad locations and electrical functions. NOTE: Pad numbers reflect terminal numbers when placed in case outline X (see figure 1). FIGURE B-1 STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 27 APPENDIX A APPENDIX A FORMS A PART OF SMD 5962-96556 Interface materials. Top metallization: Si Al Cu Backside metallization: None 9.0kA - 12.5kA Glassivation. Type: Thickness: Substrate: Nitride 9.0kA - 11.0kA Epitaxial Layer on Single Crystal Silicon Assembly related information. Substrate potential: Tied to VSS Special assembly Instructions: Do not wire bond the six probe ID pads Bond Pad #7 (VSS) first FIGURE B-1- Continued. STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 DSCC FORM 2234 APR 97 SIZE 5962-96556 A REVISION LEVEL D SHEET 28 STANDARD MICROCIRCUIT DRAWING BULLETIN DATE: 04-08-02 Approved sources of supply for SMD 5962-96556 are listed below for immediate acquisition information only and shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accepted by DSCC-VA. This information bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. Standard microcircuit drawing PIN 1/ Vendor CAGE Number Vendor similar PIN 2/ 5962H9655601VCA 65342 UT54ACS164PVAH 5962H9655601VXA 65342 UT54ACS164UVAH 5962H9655601VCC 65342 UT54ACS164PVCH 5962H9655601VXC 65342 UT54ACS164UVCH 5962H9655601QCA 65342 UT54ACS164PQAH 5962H9655601QXA 65342 UT54ACS164UQAH 5962H9655601QCC 65342 UT54ACS164PQCH 5962H9655601QXC 65342 UT54ACS164UQCH 5962H9655601V9A 65342 UT54ACS164-V-DIE 5962H9655601Q9A 65342 UT54ACS164-Q-DIE 5962H9655602VXA 65342 UT54ACS164EUVAH 5962H9655602VXC 65342 UT54ACS164EUVCH 5962H9655602QXA 65342 UT54ACS164EUQAH 5962H9655602QXC 65342 UT54ACS164EUQCH 5962H9655602V9B 65342 UT54ACS164E-V-DIE 5962H9655602Q9B 65342 UT54ACS164E-Q-DIE See footnotes at end of table. 1 of 2 STANDARD MICROCIRCUIT DRAWING BULLETIN - Continued. Standard microcircuit drawing PIN 1/ Vendor CAGE Number Vendor similar PIN 2/ 5962G9655603VXA 65342 UT54ACS164EUVAG 5962G9655603VXC 65342 UT54ACS164EUVCG 5962G9655603QXA 65342 UT54ACS164EUQAG 5962G9655603QXC 65342 UT54ACS164EUQCG 5962G9655603V9B 65342 UT54ACS164E-V-DIE 5962G9655603Q9B 65342 UT54ACS164E-Q-DIE 1/ The lead finish shown for each PIN representing a hermetic package is the most readily available from the manufacturer listed for that part. If the desired lead finish is not listed contact the vendor to determine its availability. 2/ Caution. Do not use this number for item acquisition. Items acquired to this number may not satisfy the performance requirements of this drawing. Vendor CAGE number Vendor name and address 65342 Aeroflex Colorado Springs, Inc. 4350 Centennial Boulevard Colorado Springs, Colorado 80907-3486 The information contained herein is disseminated for convenience only and the Government assumes no liability whatsoever for any inaccuracies in the information bulletin. 2 of 2