Supertex inc. HV9919B
Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Features
Hysteretic control with high-side current sensing
Wide input voltage range: 4.5 to 40V
>90% Efciency
Typical ±5% LED current accuracy
Up to 2.0MHz switching frequency
Adjustable constant LED current
Analog or PWM control signal for PWM dimming
Over-temperature protection
-40ºC to +125ºC operating temperature range
Applications
Low voltage industrial and architectural lighting
General purpose constant current source
Signage and decorative LED lighting
Indicator and emergency lighting
General Description
The HV9919B is a PWM controller IC designed to drive high
brightness LEDs using a buck topology. It operates from an
input voltage of 4.5 to 40VDC and employs hysteretic control
with a high-side current sense resistor to set the constant
output current.
The operating frequency range can be set by selecting the
proper inductor. Operation at high switching frequency is
possible since the hysteretic control maintains accuracy even
at high frequencies. This permits the use of small inductors
and capacitors minimizing space and cost in the overall
system.
LED brightness control is achieved with PWM dimming from
an analog or PWM input signal. Unique PWM circuitry allows
true constant color with a high dimming range. The dimming
frequency is programmed using a single external capacitor.
The HV9919B comes in a small, 8-Lead DFN package and is
ideal for industrial and general lighting applications.
Typical Application Circuit
Hysteretic, Buck, High Brightness LED Driver
with High-Side Current Sensing
CIN
0 - 2.0V
HV9919B
VIN
VDD
GATE
GND
CS
RAMP
ADIM
DIM
RSENSE L
2
HV9919B
Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
-G indicates package is RoHS compliant (‘Green’)
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Parameter Value
VIN, CS to GND -0.3 to +45V
VDD, GATE, RAMP, DIM, ADIM to GND -0.3 to +6.0V
CS to VIN -1.0 to +0.3V
Continuous power dissipation, (TA = +25°C) 1.6W
Operating temperature range -40°C to +125°C
Junction temperature +150°C
Storage temperature range -65°C to +150°C
Sym Description Min Typ Max Units Conditions
VIN Input DC supply voltage range 4.5 - 40 V DC input voltage
VDD Internally regulated voltage 4.5 - 5.5 V VIN = 6.0 to 40V
IIN Supply current - - 1.5 mA GATE open
IIN, SDN Shutdown supply current - - 900 µA DIM < 0.7V
IIN, LIM Current limit - 30 - mA VIN = 4.5V, VDD = 0V
- 8.0 - VIN = 4.5V, VDD = 4.0V
fOSC Oscillator frequency - - 2.0 MHz ---
UVLO VDD Undervoltage lockout threshold - - 4.5 V VDD rising
ΔUVLO VDD Undervoltage lockout hysteresis - 500 - mV VDD falling
Ordering Information
Device
Package Options
8-Lead DFN
3.00x3.00mm body,
0.80mm height (max),
0.65mm pitch
HV9919B HV9919BK7-G
Pin Description
Product Marking
8-Lead DFN (K7)
8-Lead DFN (K7)
(top view)
Electrical Characteristics
(VIN = 12V, VDIM = VDD, VRAMP = GND, CVDD = 1.0µF, RCS = 0.5Ω, TA = TJ = -40OC to +125OC* unless otherwise noted)
8
7
6
5
1
2
3
4
CS
VIN
RAMP
ADIM
GATE
GND
VDD
DIM
GND
9919
YWLL
Y = Last Digit of Year Sealed
W = Code for Week Sealed
L = Lot Number
= “Green” Packaging
Thermal Resistance
Package θja
8-Lead DFN (K7) 60OC/W
Mounted on FR-4 board, 25mm x 25mm x 1.57mm
* Guaranteed by design and characterization, 100% tested at TA = 25OC. Typical characteristics are given at TA = 25OC.
3
HV9919B
Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Sym Description Min Typ Max Units Conditions
Sense Comparator
VCS(HI) Sense voltage threshold high 213 230 246 mV (VIN - VCS) rising
VCS(LO) Sense voltage threshold low 158 170 182 mV (VIN - VCS) falling
tDPDH Propagation delay to output high - 70 - ns Falling edge of
(VIN - VCS) = VRS(LO) - 70mV
tDPDL Propagation delay to output low - 70 - ns Rising edge of
(VIN - VCS) = VRS(HI) + 70mV
ICS Current-sense input current - - 1.0 µA (VIN - VCS) = 200mV
ICS(HYS) Current-sense threshold hysteresis - 56 70 mV ---
DIM Input
VIH Pin DIM input high voltage 2.2 - - V ---
VIL Pin DIM input low voltage - - 0.7 V ---
tON Turn-on time - 100 - ns DIM rising edge to
VGATE = 0.5 x VDD, CGATE = 2.0nF
tOFF Turn-off time - 100 - ns DIM falling edge to
VGATE = 0.5 x VDD, CGATE =2.0nF
Gate Driver
IGATE
GATE current, source0.3 0.5 - A VGATE = GND
GATE current, sink0.7 1.0 - A VGATE = VDD
TRISE GATE output rise time - 40 55 ns CGATE= 2.0nF
TFALL GATE output fall time - 17 25 ns CGATE= 2.0nF
VGATE(HI) GATE high output voltage VDD -0.5 - - V IGATE = 10mA
VGATE(LO) GATE low output voltage - - 0.5 V IGATE = -10mA
Over-Temperature Protection
TOT Over temperature trip limit128 140 - ºC ---
∆THYST Temperature hysteresis- 60 - ºC ---
Analog Control of PWM Dimming
fRAMP Dimming frequency 130 - 300 Hz CRAMP = 47nF
550 - 1250 CRAMP = 10nF
VLOW RAMP threshold, Low - 0.1 - V ---
VHiGH RAMP threshold, High 1.8 - 2.1 V ---
VOS ADIM offset voltage -35 - +35 mV ---
* Guaranteed by design and characterization, 100% tested at TA = 25OC. Typical characteristics are given at TA = 25OC.
Guaranteed by design and characterization.
Electrical Characteristics
(VIN = 12V, VDIM = VDD, VRAMP = GND, CVDD = 1.0µF, RCS = 0.5Ω, TA = TJ = -40OC to +125OC* unless otherwise noted)
4
HV9919B
Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Application Information
Block Diagram
CURRENT
SENSE
COMPARATOR
UVLO
COMPARATOR
GATE
DRIVER
VIN VDD
CS
RAMP
ADIM
GND
DIM
GATE
HV9919B
PWM RAMP
0.1~1.9V
-
+
+
-
BANDGAP
REF
+
-
REGULATOR
General Description
The HV9919B is a step-down, constant current, high-bright-
ness LED (HB LED) driver. The device operates from a 4.5
to 40V input voltage range and provides the gate drive out-
put to an external N-channel MOSFET. A high-side current
sense resistor sets the output current and a dedicated PWM
dimming input (DIM) allows for a wide range of diming duty
ratios. The PWM dimming could also be achieved by apply-
ing a DC voltage between 0 and 2.0V to the analog dimming
input (ADIM). In this case, the dimming frequency can be
programmed using a single capacitor at the RAMP pin. The
high-side current setting and sensing scheme minimizes the
number of external components while delivering LED cur-
rent with a ±8% accuracy, using a 1% sense resistor.
Undervoltage Lockout (UVLO)
The HV9919B includes a 3.7V under-voltage lockout (UVLO)
with 500mV hysteresis. When VIN falls below 3.7V, GATE
goes low, turning off the external n-channel MOSFET. GATE
goes high once VIN is 4.5V or higher.
5.0V Regulator
VDD is the output of a 5.0V regulator capable of sourcing
8.0mA. Bypass VDD to GND with a 1.0μF capacitor.
DIM Input
The HV9919B allows dimming with a PWM signal at the DIM
input. A logic level below 0.7V at DIM forces the GATEOUTPUT
low, turning off the LED current. To turn the LED current on,
the logic level at DIM must be at least 2.2V.
ADIM and RAMP Inputs
The PWM dimming scheme can be also implemented by ap-
plying an analog control signal to ADIM pin. If an analog con-
trol signal of 0~2.0V is applied to ADIM, the device compares
this analog input to a voltage ramp to pulse-width-modulate
the LED current. Connecting an external capacitor to RAMP
programs the PWM dimming ramp frequency.
fPWM = 1
CRAMP • 120kΩ
DIM and ADIM inputs can be used simultaneously. In such
case, fPWM(MAX) must be selected lower than the frequency of
the dimming signal at DIM. The smaller dimming duty cycle
of ADIM and DIM will determine the GATE signal.
When the analog control of PWM dimming feature is not
used, RAMP must be wired to GND, and ADIM should be
connected to VDD.
5
HV9919B
Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
One possible application of the ADIM feature of the HV9919B
may include protection of the LED load from over-tempera-
ture by connecting an NTC thermistor at ADIM, as shown in
Figure 1.
Figure 1
Setting LED Current with External Resistor RSENSE
The output current in the LED is determined by the external
current sense resistor (RSENSE) connected between VIN and
CS. Disregarding the effect of the propagation delays, the
sense resistor can be calculated as:
RSENSE1(VRS(HI) + VRS(LO) ) = 200mV
2 ILED ILED
Selecting Buck Inductor L
The HV9919B regulates the LED output current using an
input comparator with hysteresis (Figure 2). As the current
through the inductor ramps up and the voltage across the
sense resistor reaches the upper threshold, the voltage
at GATE goes low, turning off the external MOSFET. The
MOSFET turns on again when the inductor current ramps
down through the freewheeling diode until the voltage across
the sense resistor equals the lower threshold. Use the fol-
lowing equation to determine the inductor value for a desired
value of operating frequency fS:
L = (VIN - VOUT )VOUT - (VIN - VOUT )tDPDL - VOUT tDPDH
fSVIN∆IO ∆IO
∆IO
where:
∆IO = VRS(HI) - VRS(LO)
RSENSE
and tDPDL, tDPDH are the propagation delays. Note, that the cur-
rent ripple ∆I in the inductor L is greater than ∆IO. This ripple
can be calculated from the following equation:
∆I = ∆IO +
(VIN - VOUT)tDPDL + VOUTtDPDH
L L
For the purpose of the proper inductor selection, note that
the maximum switching frequency occurs at the highest VIN
and VOUT = VIN/2.
Figure 2
t
t
I
LED
V
DIM
V
RS(HI)
R
SENSE
V
RS(LO)
R
SENSE
t
DPDL
t
DPDH
T
S
=
1/f
S
ΔI ΔI
O
NTC
VDD
ADIM
GND
HV9919B
6
HV9919B
Supertex inc. 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com
Pin # Pin Description
1 CS Current sense input. Senses LED string current.
2 VIN Input voltage 4.5 to 40V DC.
3 RAMP Analog PWM dimming ramp output.
4 ADIM Analog 0~2.0V signal input for analog control of PWM dimming.
5 DIM PWM signal input.
6 VDD Internally regulated supply voltage. Connect a capacitor from VDD to ground.
7 GND Device ground.
8 GATE Drives gate of external MOSFET.
TAB GND Must be wired to pin 7 on PCB.
Pin Description
MOSFET Selection
MOSFET selection is based on the maximum input operat-
ing voltage VIN, output current ILED, and operating switching
frequency. Choose a MOSFET that has a higher breakdown
voltage than the maximum operation voltage, low RDS(ON),
and low total charge for better efciency. MOSFET threshold
voltage must be adequate if operated at the low end of the
input-voltage operating range.
Freewheeling Diode Selection
The forward voltage of the freewheeling diode should be
as low as possible for better efciency. A Schottky diode
is a good choice as long as the breakdown voltage is high
enough to withstand the maximum operating voltage. The
forward current rating of the diode must be at least equal to
the maximum LED current.
LED Current Ripple
The LED current ripple is equal to the inductor current ripple.
In cases when a lower LED current ripple is needed, a ca-
pacitor can be placed across the LED terminals.
PCB Layout Guidelines
Careful PCB layout is critical to achieve low switching losses
and stable operation. Use a multilayer board whenever pos-
sible for better noise immunity. Minimize ground noise by
connecting high-current ground returns, the input bypass
capacitor ground lead, and the output lter ground lead to
a single point (star ground conguration). The fast di/dt loop
is formed by the input capacitor CIN, the free-wheeling diode
and the MOSFET. To minimize noise interaction, this loop
area should be as small as possible. Place RSENSE as close
as possible to the input lter and VIN. For better noise immu-
nity, a Kelvin connection is strongly recommended between
CS and RSENSE. Connect the exposed tab of the IC to a large-
area ground plane for improved power dissipation.
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
©2011 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited.
Supertex inc.
1235 Bordeaux Drive, Sunnyvale, CA
94089
Tel: 408-222-8888
www
.supertex.com
7
(The package drawing(s) in this data sheet may not reect the most current specications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
HV9919B
8-Lead DFN Package Outline (K7)
3.00x3.00mm body, 0.80mm height (max), 0.65mm pitch
Symbol A A1 A3 b D D2 E E2 e L L1 θ
Dimension
(mm)
MIN 0.70 0.00
0.20
REF
0.25 2.85* 1.60 2.85* 1.35
0.65
BSC
0.30 0.00* 0O
NOM 0.75 0.02 0.30 3.00 - 3.00 - 0.40 - -
MAX 0.80 0.05 0.35 3.15* 2.50 3.15* 1.75 0.50 0.15 14O
JEDEC Registration MO-229, Variation WEEC-2, Issue C, Aug. 2003.
* This dimension is not specied in the JEDEC drawing.
Drawings not to scale.
Supertex Doc. #: DSPD-8DFNK73X3P065, Version C041009.
Seating
Plane
θ
Top View
Side View
Bottom View
A
A1
D
E
D2
e
b
E2
A3
L
L1
View B
View B
Note 1
(Index Area
D/2 x E/2)
Note 3
Note 2
Note 1
(Index Area
D/2 x E/2)
1
1
88
Notes:
1. A Pin 1 identier must be located in the index area indicated. The Pin 1 identier can be: a molded mark/identier; an embedded metal marker; or
a printed indicator.
2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present.
3. The inner tip of the lead may be either rounded or square.
Doc.# DSFP-HV9919B
B082911