Ultra-Low Lux, Low Power, Integrated Digital Ambient Light Sensor with Interrupt Function ISL29033 Features The ISL29033 is an integrated ambient and infrared light to digital converter with I2C (SMBus Compatible) interface. Its advanced, self-calibrated photodiode array emulates human eye response with excellent IR rejection. The on-chip 16-bit ADC is capable of rejecting 50Hz and 60Hz flicker caused by artificial light sources. The lux range select feature allows users to program the lux range for optimized counts/lux. Power consumption can be reduced to less than 0.3A when powered down. * Ambient Light Sensing The ISL29033 supports a software and hardware interrupt that remains asserted until the host clears it through the I2C interface. The function of ADC conversion continues without stopping after interrupt is asserted. * Light Sensor Close to Human Eye Response * Simple Output Code Directly Proportional to Lux * Variable Conversion Resolution Up to 16 Bits * Adjustable Sensitivity Up to 520 Counts Per Lux * Measurement Range: 0.0019 to 8,000Lux with Four Selectable Ranges * Program Interrupt Feature - Excellent Light Sensor IR and UV Rejection * 75A Max Operating Current - 0.3A Max Shutdown Current Designed to operate on supplies from 2.25V to 3.63V with an I2C supply from 1.7V to 3.63V, the ISL29033 is specified for operation over the -40C to +85C ambient temperature range. * 6 Ld 2.0mmx2.1mmx0.7mm ODFN Package Applications * Display and Keypad Dimming Adjustment for: - Mobile Devices: Smart Phone, PDA, GPS - Computing Devices: Notebook PC, Webpad - Consumer Devices: LCD-TV, Digital Picture Frame, Digital Camera * Industrial and Medical Light Sensing Related Literature * See AN1422 "Light Sensor Applications" VDD 1 COMMAND REGISTER PHOTODIODE ARRAY LIGHT DATA PROCESS INTEGRATION ADC DATA REGISTER I2C/SMBus IREF 5 SCL 6 SDA INTERRUPT REGISTER fOSC 3 2 4 REXT GND INT FIGURE 1. BLOCK DIAGRAM September 30, 2011 FN7656.1 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011. All Rights Reserved Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries. I2C Bus is a registered trademark owned by NXP Semiconductors Netherlands, B.V. All other trademarks mentioned are the property of their respective owners. ISL29033 Pin Configuration Pin Descriptions ISL29033 (6 LD ODFN) TOP VIEW VDD 1 GND 2 REXT 3 PD* PIN NUMBER PIN NAME 6 SDA 5 SCL 4 INT DESCRIPTION PD PD Thermal Pad (connect to GND, or float) 1 VDD Positive supply: 2.25V to 3.63V 2 GND Ground 3 REXT External resistor pin for ADC reference; connect this pin to ground through a (nominal) 499k resistor. 4 INT Interrupt pin; low for interrupt alarming. INT pin is open drain. INT remains asserted until the interrupt flag status bit is reset. 5 SCL I2C serial clock 6 SDA I2C serial data *EXPOSED PAD CAN BE CONNECTED TO GND OR ELECTRICALLY ISOLATED Ordering Information PART NUMBER (Notes 1, 2, 3, 4) TEMP. RANGE (C) ISL29033IROZ-T7 -40 to +85 ISL29033IROZ-EVALZ PACKAGE TAPE AND REEL (Pb-free) 6 Ld ODFN PKG. DWG. # L6.2x2.1 Evaluation Board NOTES: 1. Please refer to TB347 for details on reel specifications. 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL29033. For more information on MSL please see Tech Brief TB477. 4. The part marking is located on the bottom of the part. 2 FN7656.1 September 30, 2011 ISL29033 Absolute Maximum Ratings (TA = +25C) Thermal Information VDD Supply Voltage between VDD and GND . . . . . . . . . . . . . . . . . . . . . .4.0V Thermal Resistance (Typical) I2C Bus Pin Voltage (SCL, SDA). . . . . . . . . . . . . . . . . . . . . . . . . -0.2V to 4.0V I2C Bus Pin Current (SCL, SDA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <10mA REXT Pin Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.2V to VDD + 0.5V INT Pin Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to VDD + 0.5V INT Pin Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <10mA ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV JA (C/W) 6 Ld ODFN (Note 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88 Maximum Die Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +90C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40C to +100C Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.25V to 3.63V CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTE: 5. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with "direct attach" features. See Tech Brief TB477. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications specified. PARAMETER VDD = 3.0V, TA = +25C, REXT = 499k 1% tolerance, 16-bit ADC operation, unless otherwise DESCRIPTION CONDITION MIN (Note 6) VDD Power Supply Range IDD Supply Current IDD1 Supply Current when Powered Down VI2C Supply Voltage Range for I2C Interface 1.7 fOSC Internal Oscillator Frequency 600 tINT ADC Integration/Conversion Time FI2C I2C Clock Rate Range MAX (Note 6) UNIT 3.63 V 65 75 A 0.01 0.3 A 3.63 V 740 kHz TYP 2.25 Software disabled or auto power-down 16-bit ADC data DATA_0 Count Output when Dark E = 0 lux, Range 1 (125 lux) DATA_F Full Scale ADC Code DATA DATA Count Output Variation Over Three Light Sources: Fluorescent, Incandescent and Sunlight Ambient Light Sensing DATA_1 Light Count Output with LSB of 0.0019 lux/count E = 37.5 lux, Fluorescent light (Note 7), Ambient light sensing, Range 1 (125 lux) DATA_2 Light Count Output with LSB of 0.0075 lux/count E = 37.5 lux, Fluorescent light (Note 7), Ambient light sensing, Range 2 (500 lux) DATA_3 DATA_4 670 100 ms 1 to 400 kHz 1 5 Counts 65535 Counts 10 16000 20000 % 24000 Counts 5000 Counts Light Count Output with LSB of 0.03 lux/count E = 37.5 lux, Fluorescent light (Note 7), Ambient light sensing, Range 3 (2k lux) 1250 Counts Light Count Output with LSB of 0.12 lux/count E = 37.5 lux, Fluorescent light (Note 7), Ambient light sensing, Range 4 (8k lux) 312 Counts DATA_IR1 Infrared Count Output E = 20 lux Solar light (Note 8), Ambient light sensing, Range 1 (125 lux) DATA_IR2 Infrared Count Output E = 20 lux Solar light (Note 8), Ambient light sensing, Range 2 (500 lux) 3 16000 20000 5000 24000 Counts Counts FN7656.1 September 30, 2011 ISL29033 Electrical Specifications VDD = 3.0V, TA = +25C, REXT = 499k 1% tolerance, 16-bit ADC operation, unless otherwise specified. (Continued) PARAMETER DESCRIPTION CONDITION MIN (Note 6) TYP MAX (Note 6) UNIT DATA_IR3 Infrared Count Output E = 20 lux Solar light (Note 8), Ambient light sensing, Range 3 (2000 lux) 1250 Counts DATA_IR4 Infrared Count Output E = 20 lux Solar light (Note 8), Ambient light sensing, Range 4 (8000 lux) 312 Counts VREF Voltage of REXT Pin 0.52 V VIL SCL and SDA Input Low Voltage VIH SCL and SDA Input High Voltage ISDA SDA Current Sinking Capability VOL = 0.4V 4 5 mA IINT INT Current Sinking Capability VOL = 0.4V 4 5 mA Electrical Specifications unless otherwise specified. PARAMETER 0.55 1.25 V V VDD = 3.0V, TA = +25C, REXT = 1M 1% tolerance, 16-bit ADC operation, DESCRIPTION CONDITION MIN (Note 6) VDD Power Supply Range IDD Supply Current IDD1 Supply Current when Powered Down VI2C Supply Voltage Range for I2C Interface 1.7 fOSC Internal Oscillator Frequency 305 tINT ADC Integration/Conversion Time FI2C I2C Clock Rate Range MAX (Note 6) UNIT 3.63 V 42 50 A 0.01 0.3 A 3.63 V 385 kHz TYP 2.25 Software disabled or auto power-down 16-bit ADC data 200 ms 1 to 400 kHz DATA_0 Count Output when Dark DATA_F Full Scale ADC Code DATA DATA Count Output Variation Over Three Light Sources: Fluorescent, Incandescent and Sunlight Ambient Light Sensing DATA_1 Light Count Output with LSB of 0.00095 lux/count E = 18.75 lux, Fluorescent light (Note 7), Ambient light sensing, Range 1 (62.5 lux) DATA_2 Light Count Output with LSB of 0.000375 lux/count E = 18.75 lux, Fluorescent light (Note 7), Ambient light sensing, Range 2 (250 lux) 5000 Counts DATA_3 Light Count Output with LSB of 0.015 lux/count E = 18.75 lux, Fluorescent light (Note 7), Ambient light sensing, Range 3 (1k lux) 1250 Counts DATA_4 Light Count Output with LSB of 0.6 lux/count E = 18.75 lux, Fluorescent light (Note 7), Ambient light sensing, Range 4 (4k lux) 312 Counts DATA_IR1 Infrared Count Output E = 10 lux Solar light (Note 8), Ambient light sensing, Range 1 (62.5 lux) DATA_IR2 Infrared Count Output E = 10 lux Solar light (Note 8), Ambient light sensing, Range 2 (250 lux) 5000 Counts DATA_IR3 Infrared Count Output E = 10 lux Solar light (Note 8), Ambient light sensing, Range 3 (1000 lux) 1250 Counts DATA_IR4 Infrared Count Output E = 10 lux Solar light (Note 8), Ambient light sensing, Range 4 (4000 lux) 312 Counts 0.52 V VREF Voltage of REXT Pin 4 E = 0 lux, Range 1 (125 lux) 340 1 10 Counts 65535 Counts 10 15000 15000 20000 20000 % 25000 25000 Counts Counts FN7656.1 September 30, 2011 ISL29033 Electrical Specifications unless otherwise specified. (Continued) PARAMETER VDD = 3.0V, TA = +25C, REXT = 1M 1% tolerance, 16-bit ADC operation, DESCRIPTION CONDITION MIN (Note 6) TYP MAX (Note 6) 0.55 UNIT VIL SCL and SDA Input Low Voltage VIH SCL and SDA Input High Voltage ISDA SDA Current Sinking Capability VOL = 0.4V 4 5 mA IINT INT Current Sinking Capability VOL = 0.4V 4 5 mA 1.25 V V NOTES: 6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. 7. A 550nm green LED is used in production test. The 550nm LED irradiance is calibrated to produce the same DATA count as a fluorescent light with illuminance at the stated lux. 8. An 850nm IR LED is used in production test. The 850nm LED irradiance is calibrated to produce the same DATA_IR count as solar light with illuminance at the stated lux. I2C Electrical Specifications and 1M 1% tolerance. PARAMETER For SCL and SDA (Figure 2), unless otherwise noted, VDD = 3V, TA = +25C, REXT = 499k 1% DESCRIPTION CONDITION MIN (Note 6) TYP MAX (Note 6) UNIT 3.63 V VI2C Supply Voltage Range for I2C Interface fSCL SCL Clock Frequency 400 kHz VIL SCL and SDA Input Low Voltage 0.55 V VIH SCL and SDA Input High Voltage Vhys Hysteresis of Schmitt Trigger Input VOL Low-level Output Voltage (Open-drain) at 4mA Sink Current Ii 1.7 Input Leakage for each SDA, SCL Pin 1.25 V 0.05VDD V -10 0.4 V 10 A tSP Pulse Width of Spikes that must be Suppressed by the Input Filter 50 ns tAA SCL Falling Edge to SDA Output Data Valid 900 ns Ci Capacitance for each SDA and SCL Pin 10 pF tHD:STA Hold Time (Repeated) START Condition After this period, the first clock pulse is generated. 600 ns tLOW LOW Period of the SCL Clock Measured at the 30% of VDD crossing 1300 ns tHIGH HIGH Period of the SCL Clock 600 ns tSU:STA Set-up Time for a Repeated START Condition 600 ns tHD:DAT Data Hold Time 30 ns tSU:DAT Data Set-up Time 100 ns tR Rise Time of both SDA and SCL Signals (Note 9) 20 + 0.1xCb ns tF Fall Time of both SDA and SCL Signals (Note 9) 20 + 0.1xCb ns Set-up Time for STOP Condition 600 ns Bus Free Time Between a STOP and START Condition 1300 ns tSU:STO tBUF Cb Rpull-up Capacitive Load for Each Bus Line SDA and SCL System Bus Pull-up Resistor 5 400 Maximum is determined by tR and tF 1 pF k FN7656.1 September 30, 2011 ISL29033 I2C Electrical Specifications and 1M 1% tolerance. (Continued) PARAMETER For SCL and SDA (Figure 2), unless otherwise noted, VDD = 3V, TA = +25C, REXT = 499k 1% DESCRIPTION CONDITION MIN (Note 6) TYP MAX (Note 6) UNIT tVD;DAT Data Valid Time 0.9 s tVD:ACK Data Valid Acknowledge Time 0.9 s VnL Noise Margin at the LOW Level 0.1VDD V VnH Noise Margin at the HIGH Level 0.2VDD V NOTE: 9. Cb is the capacitance of the bus in pF. Principles of Operation Ambient Light Photodiodes and ADC There are four operational modes in ISL29033: Programmable ALS once with auto power-down, programmable IR sensing once with auto power-down, programmable continuous ALS sensing, and programmable continuous IR sensing. These four modes can be programmed in series to fulfill the application needs. The detailed program configuration is shown in "BLOCK DIAGRAM" on page 1. The ISL29033 contains two photodiode arrays that convert light into current. The spectral response for ambient light sensing and infrared (IR) sensing is shown in Figure 8 in the "Typical Performance Curves" section on page 12. After light is converted to current during the light signal process, the current output is converted to digital by a built-in 16-bit Analog-to-Digital Converter (ADC). An I2C command reads the ambient light or IR intensity in counts. The converter is a charge-balancing integrating type 16-bit ADC. The chosen method for conversion is best for converting small current signals in the presence of an AC periodic noise. A 100ms integration time, for instance, highly rejects 50Hz and 60Hz power line noise simultaneously. See "Integration and Conversion Time" on page 9. The built-in ADC offers user flexibility in integration time or conversion time. There are two timing modes: Internal Timing Mode and External Timing Mode. In Internal Timing Mode, integration time is determined by an internal oscillator (fOSC) and the n-bit (n = 4, 8, 12, 16) counter inside the ADC. In External Timing Mode, integration time is determined by the time between two consecutive I2C External Timing Mode commands. A good balance of integration time and resolution (depending on application) is required for optimal results. The ADC has I2C programmable range select to dynamically accommodate various lighting conditions. For very dim conditions, the ADC can be configured at its lowest range (Range 1) in the ambient light sensing. Low-Power Operation The ISL29033 initial operation is at the power-down mode after a supply voltage is provided. The data registers contain the default value of 0. When the ISL29033 receives an I2C command to do a one-time measurement from an I2C master, it starts ADC conversion with light sensing. It goes to power-down mode automatically after one conversion is finished and keeps the conversion data available for the master to fetch anytime afterwards. The ISL29033 continuously does ADC conversion with light sensing if it receives an I2C command of continuous measurement. It continuously updates the data registers with the latest conversion data. It goes to power-down mode after it receives the I2C command of power-down. When the part is programmed for ambient light sensing, the ambient light with wavelength within the "Ambient Light Sensing" spectral response curve in Figure 8 is converted into current. With ADC, the current is converted to an unsigned n-bit (up to 16 bits) digital output. When the part is programmed for infrared (IR) sensing, the IR light with wavelength within the "IR Sensing" spectral response curve in Figure 8 is converted into current. With ADC, the current is converted to an unsigned n-bit (up to 16 bits) digital output. Interrupt Function The active low interrupt pin is an open drain pull-down configuration. The interrupt pin serves as an alarm or monitoring function to determine whether the ambient light level exceeds the upper threshold or goes below the lower threshold. Note that the function of ADC conversion continues without stopping after interrupt is asserted. If the user needs to read the ADC count that triggers the interrupt, reading should be done before the data registers are refreshed by subsequent conversions. The user can also configure the persistency of the interrupt pin. This reduces the possibility of false triggers, such as noise or sudden spikes in ambient light conditions. An unexpected camera flash, for example, can be ignored by setting the persistency to eight integration cycles. ALS Ranges Considerations When measuring ALS counts higher than 30000 counts on Range 1 of the 16-bit ADC, switch to Range 2 (change [1 to 0] bits of Register 1 from 00 to 01), and re-measure the ALS counts and other data to change to Range 3 and Range 4. This recommendation pertains only to applications in which light incident on the sensor is IR-heavy and is distorted by tinted glass that increases the ratio of infrared to visible light. VDD Power-up and Power Supply Considerations Upon power-up, ensure a VDD slew rate of 0.5V/ms or greater. After power-up, or if the power supply temporarily deviates from 6 FN7656.1 September 30, 2011 ISL29033 specification (2.25V to 3.63V), the following step is recommended: write 0x00 to register 0x00. Wait a few seconds, and then rewrite all registers to the desired values. A hardware reset method can be used, if preferred, instead of writing to the test registers. For this method, set VDD = 0V for 1 second or more, power backup at the required slew rate, and write the registers to the desired values. or the number of clock cycles in the previous integration period (Figure 2). The ISL29033 I2C interface slave address is internally hard-wired as 1000100. When 1000100x, with x as R or W, is sent after the Start condition, the device compares the first 7 bits of this byte to its address, and matches. Figure 3 shows a sample one-byte read, and Figure 4 shows a sample one-byte write. The I2C bus master always drives the SCL (clock) line, while either the master or the slave can drive the SDA (data) line. Every I2C transaction begins with the master asserting a start condition (SDA falling while SCL remains high). The following byte is driven by the master and includes the slave address and the read/write bit. The receiving device is responsible for pulling SDA low during the acknowledgement period. Every I2C transaction ends with the master asserting a stop condition (SDA rising while SCL remains high). Power-Down To put the ISL29033 into a power-down state, the user can set [7 to 5] bits to 0 in Register 0. Or more simply, set all of Register 0 to 0x00. I2C Interface There are eight 8-bit registers available inside the ISL29033. The two command registers define the operation of the device. The command registers do not change until the registers are overwritten. The two 8-bit data read-only registers are for the ADC output. The data registers contain the ADC's latest digital output, For more information about the I2C standard, please consult the PhilipsTM I2C specification documents. FIGURE 2. I2C TIMING DIAGRAM I2C DATA DEVICE ADDRESS START REGISTER ADDRESS W A DEVICE ADDRESS STOP START DATA BYTE0 A I2C SDA IN A6 A5 A4 A3 A2 A1 A0 W A R7 R6 R5 R4 R3 R2 R1 R0 A A6 A5 A4 A3 A2 A1 A0 W SDA DRIVEN BY ISL29033 A I2C SDA OUT A SDA DRIVEN BY MASTER A SDA DRIVEN BY MASTER SDA DRIVEN BY MASTER A D7 D6 D5 D4 D3 D2 D1 D0 I2C CLK 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 FIGURE 3. I2C READ TIMING DIAGRAM SAMPLE 7 FN7656.1 September 30, 2011 ISL29033 I2C DATA DEVICE ADDRESS START A REGISTER ADDRESS FUNCTIONS W A W A R7 R6 R5 R4 R3 R2 R1 R0 A B7 B6 B5 B4 B3 B2 B1 B0 A SDA DRIVEN BY MASTER A SDA DRIVEN BY MASTER STOP A I2C SDA IN A6 A5 A4 A3 A2 A1 A0 A I2C SDA OUT SDA DRIVEN BY MASTER A I2C CLK IN 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 1 9 2 3 5 4 6 7 9 8 FIGURE 4. I2C WRITE TIMING DIAGRAM SAMPLE TABLE 1. REGISTER SET BIT ADDR REG NAME 7 6 5 4 3 2 1 0 DEFAULT 00h COMMANDI OP2 OP1 OP0 0 0 FLAG PRST1 PRST0 00h 01h COMMANDII 0 0 0 0 RES1 RES0 RANGE1 RANGE0 00h 02h DATALSB D7 D6 D5 D4 D3 D2 D1 D0 00h 03h DATAMSB D15 D14 D13 D12 D11 D10 D9 D8 00h 04h INT_LT_LSB TL7 TL6 TL5 TL4 TL3 TL2 TL1 TL0 00h 05h INT_LT_MSB TL15 TL14 TL13 TL12 TL11 TL10 TL9 TL8 00h 06h INT_HT_LSB TH7 TH6 TH5 TH4 TH3 TH2 TH1 TH0 FFh 07h INT_HT_MSB TH15 TH14 TH13 TH12 TH11 TH10 TH9 TH8 FFh Register Set TABLE 2. OPERATION MODE There are eight registers available in the ISL29033. Table 1 summarizes their functions. BITS 7 TO 5 OPERATION 000 Power-down the device Command Register I 00 (Hex) 001 Reserved (Do not use) The first command register has the following functions: 010 Reserved (Do not use) 100 Reserved (Do not use) 101 ALS continuous 110 IR continuous 111 Reserved (Do not use) 1. Operation Mode: Bits 7, 6, and 5. These three bits determine the operation mode of the device (Table 2). Interrupt flag: Bit 2. This is the status bit of the interrupt (Table 3). The bit is set to logic high when the interrupt thresholds have been triggered (out of threshold window), and to logic low when not yet triggered. When activated and the interrupt is triggered, the INT pin goes low, and the interrupt status bit goes high until the status bit is polled through the I2C read command. Both the INT output and the interrupt status bit are automatically cleared at the end of the 8-bit (00h) command register transfer. 8 TABLE 3. INTERRUPT FLAG BIT 2 OPERATION 0 Interrupt is cleared or not triggered yet 1 Interrupt is triggered FN7656.1 September 30, 2011 ISL29033 2. Interrupt Persist: Bits 1 and 0. The interrupt pin and the interrupt flag are triggered or set when the data sensor reading is out of the interrupt threshold window after m consecutive number of integration cycles (Table 4). The interrupt persist bits determine m. TABLE 7. DATA REGISTERS ADDRESS (HEX) 02 D0 is LSB for 4-, 8-, 12- or 16-bit resolution; D3 is MSB for 4-bit resolution; D7 is MSB for 8-bit resolution 03 D15 is MSB for 16-bit resolution; D11 is MSB for 12-bit resolution TABLE 4. INTERRUPT PERSIST BIT 1:0 NUMBER OF INTEGRATION CYCLES 00 1 01 4 10 8 11 16 Interrupt Registers (04, 05, 06 and 07 Hex) Registers 04 and 05 hex set the low (LO) threshold for the interrupt pin and the interrupt flag. Register 04 hex is the LSB, and Register 05 hex is the MSB. By default, the interrupt threshold LO is 00 hex for both LSB and MSB. Command Register II 01 (Hex) The second command register has the following functions: 1. Resolution: Bits 3 and 2. Bits 3 and 2 determine the ADC resolution and the number of clock cycles per conversion (Table 5). Changing the number of clock cycles does more than just change the resolution of the device; it also changes the integration time, which is the period during which the analog-to-digital (A/D) converter samples the photodiode current signal for a measurement. TABLE 5. ADC RESOLUTION DATA WIDTH BITS 3:2 CONTENTS NUMBER OF CLOCK CYCLES n-BIT ADC 00 216 = 65,536 16 01 212 = 4,096 12 10 28 = 256 8 11 24 = 16 4 2. Range: Bits 1 and 0. The Full Scale Range (FSR) can be adjusted through the I2C by using Bits 1 and 0. Table 6 lists the possible values of FSR for the 499k REXT resistor. TABLE 6. RANGE/FSR LUX BITS 1:0 k RANGE(k) FSR (LUX) @ ALS SENSING 00 1 Range1 125 01 2 Range2 500 10 3 Range3 2,000 11 4 Range4 8,000 Registers 06 and 07 hex set the high (HI) threshold for the interrupt pin and the interrupt flag. Register 06 hex is the LSB, and Register 07 hex is the MSB. By default, the interrupt threshold HI is FF hex for both LSB and MSB. Calculating Lux The ISL29033 ADC output codes, DATA, are directly proportional to lux in ambient light sensing, as shown in Equation 1. E cal = x DATA (EQ. 1) In this equation, Ecal is the calculated lux reading. The constant, a, is determined by the full scale range and the ADC maximum output counts. The constant is independent of the light sources (fluorescent, incandescent and sunlight) because the light source IR component is removed during the light signal process. The constant can also be viewed as the sensitivity (the smallest lux measurement the device can measure), as shown in Equation 2. Range ( k ) = --------------------------Count max (EQ. 2) In this equation, Range(k) is as defined in Table 6. Countmax is the maximum output counts from the ADC. The transfer function used for n-bits ADC is as shown in Equation 3: Range ( k ) E cal = -------------------------- x DATA n 2 (EQ. 3) In this equation, n = 4, 8, 12 or 16 and is the number of ADC bits programmed in the command register. The number 2n represents the maximum number of counts possible from the ADC output. Data is the ADC output stored in data Registers 02 hex and 03 hex. Data Registers (02 Hex and 03 Hex) Integration and Conversion Time The device has two 8-bit read-only registers to hold the data from LSB to MSB for the ADC (Table 7). The most significant bit (MSB) is accessed at 03 hex, and the least significant bit (LSB) is accessed at 02 hex. For 16-bit resolution, the data is from D0 to D15; for 12-bit resolution, the data is from D0 to D11; for 8-bit resolution, the data is from D0 to D7. The registers are refreshed after every conversion cycle. ADC resolution and fOSC determine the integration time, tint, as shown in Equation 4. 9 R EXT n n 1 t int = 2 x ------------ = 2 x ----------------------------------------------655kHz x 499k f OSC (EQ. 4) In this equation, n is the number of bits of resolution, and n = 4, 8, 12 or 16. Therefore, 2n is the number of clock cycles. The value of n can be programmed at the command register, Register 01 (hex), Bits 3 and 2 (Table 8). FN7656.1 September 30, 2011 ISL29033 TABLE 8. INTEGRATION TIME OF n-BIT ADC REXT (k) n = 16-BIT (ms) n = 12-BIT (ms) n = 8-BIT (s) n = 4-BIT (s) 499 100 6.25 391 24 1000 200 12.5 782 48 External Scaling Resistor REXT for fOSC and Range The ISL29033 uses an external resistor, REXT, to fix its internal oscillator frequency, fOSC, and the light sensing range, Range. The fOSC and Range are inversely proportional to REXT. For ease of use, the proportionality constant is referenced to 499k. Calculation for Range is shown in Equation 5 and for fOSC in Equation 6. 499k Range = ------------------- x Range ( k ) R EXT (EQ. 5) 499k f OSC = ------------------- x 655 kHz R EXT (EQ. 6) Noise Rejection In general, integrating-type ADCs have excellent noise rejection characteristics for periodic noise sources for which frequency is an integer multiple of the conversion rate. For example, a 60Hz AC unwanted signal's sum from 0ms to k*16.66ms (k = 1,2...ki) is zero. Similarly, setting the device's integration time to be an integer multiple of the periodic noise signal greatly improves the light sensor output signal in the presence of noise. ADC Output in IR Sensing The ISL29033 ADC output codes, DATA, are directly proportional to the IR intensity received in IR sensing, as shown in Equation 7. DATA IR = x E IR (EQ. 7) In this equation, EIR is the received IR intensity. The constant, b, changes with the spectrum of background IR noise, such as 10 sunlight and incandescent light. The constant, b, also changes with ADC range and resolution selections. Suggested PCB Footprint It is important that users check Tech Brief 477, "Surface Mount Assembly Guidelines for Optical Dual FlatPack No Lead (ODFN) Package" before starting ODFN product board mounting: http://www.intersil.com/data/tb/TB477.pdf Layout Considerations The ISL29033 is relatively insensitive to layout. Like other I2C devices, it is intended to provide excellent performance even in significantly noisy environments. Attention to a few considerations will ensure best performance. Route the supply and I2C traces as far as possible from all sources of noise. Use two power-supply decoupling capacitors, 1F and 0.1F, placed close to the device. Typical Circuit A typical application for the ISL29033 is shown in Figure 5. The ISL29033 I2C address is internally hardwired as 1000100. The device can be tied onto a system's I2C bus together with other I2C compliant devices. Soldering Considerations Convection heating is recommended for reflow soldering; direct-infrared heating is not recommended. The plastic ODFN package does not require a custom reflow soldering profile; it is qualified to +260C. A standard reflow soldering profile with a +260C maximum is recommended. ALS Sensor Window Layout Special care should be taken to ensure that the sensor, as shown in the sensor location outline (Figure 6), is uniformly illuminated. Shadows from off-angle window openings can affect uniform illumination, which in turn can affect measurement results. FN7656.1 September 30, 2011 ISL29033 1.7V TO 3.63V R1 10k R2 10k I2C MASTER R3 RES1 MICROCONTROLLER SDA SCL INT 2.25V TO 3.63V I2C SLAVE_0 1 2 C2 0.1F 3 SDA GND SCL REXT INT I2C SLAVE_n SDA SDA 5 SCL SCL 4 ISL29033 REXT 499k FIGURE 5. ISL29033 TYPICAL CIRCUIT SENSOR OFFSET C1 1F VDD I2C SLAVE_1 6 1 6 2 5 0.40 0.54 4 3 0.37 FIGURE 6. 6 LD ODFN SENSOR LOCATION OUTLINE 11 FN7656.1 September 30, 2011 ISL29033 Typical Performance Curves VDD = 3.0V, REXT = 499k 1.0 1.0 FLUORESCENT 0.8 0.7 0.6 HALOGEN 0.5 INCANDESCENT SUN 0.4 HUMAN EYE 0.9 NORMALIZED RESPONSE NORMALIZED INTENSITY 0.9 0.3 0.2 0.1 IR SENSING 0.8 ALS 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 350 550 750 0.0 300 950 400 500 FIGURE 7. SPECTRUM OF FOUR LIGHT SOURCES NORMALIZED BY LUMINOUS INTENSITY (LUX) ERROR PERCENT FULL SCALE (%) 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 20 30 ANGULAR OFFSET () 40 900 1000 1100 4 3 2 MAX 1 0 -1 MIN -2 -3 -4 -5 0 20 40 60 80 100 120 LUX METER (LUX) FIGURE 10. LINEARITY OVER RANGE 1 20 70000 18 ADC READING (COUNTS) 16 14 12 500k 10 8 6 4 2 0 800 5 FIGURE 9. ANGULAR SENSITIVITY ADC READING (COUNTS) NORMALIZED SENSITIVITY 0.9 10 700 FIGURE 8. NORMALIZED SPECTRAL RESPONSE FOR AMBIENT LIGHT SENSING 1.0 0 600 WAVELENGTH (nm) WAVELENGTH (nm) 50000 40000 0.005 0.01 0.015 LUX METER (LUX) FIGURE 11. LOW LUX AT GREEN LED (500k) 12 0.02 HALOGEN 30000 INCANDESCENT LIGHT 20000 10000 0 0 FLUORESCENT LIGHT 60000 0 10 20 30 40 50 60 70 80 90 100 LUX READING (LUX) FIGURE 12. LIGHT SOURCES AT RANGE 1, 500k REXT FN7656.1 September 30, 2011 ISL29033 VDD = 3.0V, REXT = 499k (Continued) 10 45 8 40 ADC READING (COUNTS) ALS OUTPUT CHANGE FROM +25C MEASUREMENT (%) Typical Performance Curves 6 4 2 500k, 30LUX NORMALIZED 0 -2 -4 -6 35 30 25 15 10 5 -8 -10 -60 -40 -20 0 20 40 TEMPERATURE (C) 60 80 0 100 0.005 0.010 0.015 0.020 FIGURE 14. LOW LUX AT GREEN LED (1M) 10 ALS OUTPUT CHANGE FROM +25C MEASUREMENT (%) 70000 FLUORESCENT LIGHT 60000 50000 40000 HALOGEN 30000 20000 INCANDESCENT LIGHT 10000 0 10 20 30 40 8 6 4 2 -2 -4 -6 -8 -10 -60 50 1M, 20 LUX NORMALIZED 0 -40 -20 LUX READING (LUX) 0 20 40 60 80 100 TEMPERATURE (C) FIGURE 16. 1M ALS COUNTS, 30 LUX NORMALIZED FIGURE 15. LIGHT SOURCES AT RANGE 1, 1M REXT 90 80 70 500k 60 IDD (A) ADC READING (COUNTS) 0 LUX METER (LUX) FIGURE 13. 500k ALS COUNT, 30 LUX NORMALIZED 0 1M 20 50 40 1M 30 20 10 0 2.25 2.75 3.25 3.75 VDD (V) FIGURE 17. SUPPLY CURRENT vs VDD ALS SENSING 13 FN7656.1 September 30, 2011 ISL29033 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you have the latest Rev. DATE REVISION CHANGE 9/21/2011 FN7656.1 Changed Title on page 1 from "Integrated Digital Ambient Light Sensor with Interrupt Function" to "Ultra-Low Lux, Low Power, Integrated Digital Ambient Light Sensor with Interrupt Function" 8/25/2011 FN7656.0 Initial Release Products Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks. Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a complete list of Intersil product families. For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on intersil.com: ISL29033 To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff FITs are available from our website at http://rel.intersil.com/reports/search.php For additional products, see www.intersil.com/product_tree Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted in the quality certifications found at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 14 FN7656.1 September 30, 2011 ISL29033 Package Outline Drawing L6.2x2.1 6 LEAD OPTICAL DUAL FLAT NO-LEAD PLASTIC PACKAGE (ODFN) Rev 3, 5/11 2.10 A 6 PIN #1 INDEX AREA B 6 PIN 1 INDEX AREA 1 0.65 1.35 2.00 1.30 REF 4 6X 0.300.05 (4X) 0.10 0.10 M C A B 0.65 TOP VIEW 6x0.35 0.05 BOTTOM VIEW 2.50 PACKAGE OUTLINE 2.10 SEE DETAIL "X" 0.65 (4x0.65) 0.10 C MAX 0.75 C BASE PLANE SEATING PLANE 0.08 C SIDE VIEW (1.35) (6x0.30) C (6x0.20) 0 . 2 REF 5 0 . 00 MIN. 0 . 05 MAX. (6x0.55) TYPICAL RECOMMENDED LAND PATTERN DETAIL "X" NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to ASME Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal 0.05 4. Dimension applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. Tiebar shown (if present) is a non-functional feature. 6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 15 FN7656.1 September 30, 2011