www.irf.com 1
06/29/06
IRF7413ZPbF
HEXFET® Power MOSFET
Notes through are on page 10
Benefits
lUltra-Low Gate Impedance
lVery Low RDS(on)
lFully Characterized Avalanche Voltage
and Current
l100% Tested for RG
lLead-Free
Applications
lControl FET for Notebook Processor
Power
lControl and Synchronous Rectifier
MOSFET for Graphics Cards and POL
Converters in Computing, Networking
and Telecommunication Systems
Top View
8
1
2
3
45
6
7
D
D
D
DG
S
A
S
S
A
SO-8
Absolut e Maximum Rati ngs
Parameter Units
VDS Dr ain-t o-Source Vo ltage V
VGS Gat e- to-S ource Voltag e
ID @ TA = 25 °C Co nti n uous D r ai n C ur r e nt, VGS @ 10V
ID @ TA = 70 °C
Co nti n uous D r ai n C ur r e nt, V
GS
@ 10V
A
IDM
Pulsed Dr ain Cur r ent
c
PD @TA = 25°C Power Dissipation W
PD @TA = 70°C Power Dissipation
Linear D erati ng Factor W/°C
TJ Operating Jun ction and °C
TSTG Stor ag e Tem per atur e Ra ng e
Thermal Resistance
Parameter Typ. Max. Units
RθJL Junc ti on-to-Drain Lead ––– 20 °C /W
RθJA
Junction-to-Ambient
f
––– 50
-5 5 t o + 15 0
2.5
0.02
1.6
Max.
13
10
100
± 20
30
VDSS RDS(on) max ID
30V 10m
:
@VGS = 10V 13A
PD - 95335C
IRF7413ZPbF
2www.irf.com
Static @ TJ = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units
BVDSS Drain-to-S ource Breakdown Voltage 30 ––– ––– V
∆ΒVDSS/∆TJ B rea k do w n Vo ltage T e m p. Co ef fi c ie nt ––– 0. 02 5 ––– V /° C
RDS(on) Static Dr ain-to-Source On-Resistance ––– 8.0 10 mΩ
––– 10.5 13
VGS(th) Gate Threshold Voltage 1.35 1.80 2.25 V
∆VGS(th)/∆TJGate Threshold Voltag e Coefficient ––– -5.0 ––– mV/°C
IDSS Drain- to-Source Leakage Current ––– ––– 1.0 µA
––– ––– 150
IGSS Gate-to-Source Forward Leakage ––– ––– 100 nA
Gate-to-Source Reverse Leakage ––– ––– -100
gfs Forward Transconductance 62 ––– ––– S
QgTotal Gate Charge ––– 9.5 14
Qgs1 Pre-Vth Gate-to-Source Charge ––– 3.0 –––
Qgs2 P os t -V t h G at e-to- S ou r ce C ha rge ––– 1.0 –– – nC
Qgd Ga te - to -D rai n C ha rge ––– 3.0 –– –
Qgodr Gate Charge Overdrive ––– 2.5 ––– See Fig. 16
Qsw Switch Charge (Qgs2 + Qgd) ––– 4.0 –––
Qoss Output Charge ––– 5.6 ––– nC
RGGate Resistance ––– 2.3 4.5 Ω
td(on) Tur n -O n Del ay T i m e ––– 8.7 –– –
trRi s e Ti m e ––– 6.3 –– –
t
Turn-Off Delay Time ––– 11 ––– ns
tfF al l Ti m e ––– 3.8 –– –
Ciss Input Capacitance ––– 1210 –––
Coss Output Capacitance ––– 270 ––– pF
C
rss
Reverse Trans fer Capac itance ––– 1 40 –––
Ava l an ch e C h ar acter i sti cs
Parameter Units
EAS Single Pulse Ava lanche Energy
d
mJ
IAR Avalanche Current
c
A
Diode Characteristics
Parameter Min. Typ. M a x . Units
I
S
Co nt in uous S o urc e Cu rr en t –– – ––– 3.1
(Body Diode) A
ISM Pulsed Source Current ––– ––– 100
(Body Diode)
c
VSD Di od e Fo r war d Vol ta ge ––– ––– 1.0 V
trr Reverse Recovery Time ––– 24 36 ns
Qrr Reverse Recovery Charge ––– 16 24 nC
ton Forwa rd Tu rn-On Time I ntr insic t u rn -o n time is ne glig ible (turn-o n is domin ate d b y LS+LD )
–––
ID = 10 A
VGS = 0V
VDS = 15V
VGS = 4. 5V , I D = 10 A
e
VGS = 4. 5V
Typ.
–––
VDS = VGS, ID = 250µ A
Clamped Inductive Load
VDS = 15V, ID = 10A
VDS = 24V, VGS = 0V, TJ = 125°C
TJ = 25°C, IF = 10A, VDD = 15V
di /dt = 100A/µs
e
TJ = 25°C, IS = 10A , VGS = 0V
e
show ing the
integral reverse
p- n ju nc t io n di od e.
MOSFET symbol
VDS = 15V, VGS = 0V
VDD = 16 V, VGS = 4.5V
ID = 10 A
VDS = 15V
VGS = 20 V
VGS = -20 V
VDS = 24V, VGS = 0V
Conditions
VGS = 0V , ID = 25 0µ A
Re fe ren c e to 25° C, I D = 1mA
VGS = 10 V, ID = 13A
e
Conditions
Max.
32
10
ƒ = 1.0MHz
IRF7413ZPbF
www.irf.com 3
Fig 4. Normalized On-Resistance
vs. Temperature
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.1 110
VDS, Dr ain-to-S ource Voltage ( V)
1
10
100
1000
ID, Drain-to-Source Current (A)
2.5V
20µs PU LSE WID TH
Tj = 150°C
VGS
TOP 10V
8.0V
4.5V
4.0V
3.5V
3.0V
2.8V
BOTTOM 2.5V
0.1 110
VDS, Dr ain-to-S ource Voltage ( V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
2.5V
20µs PULSE WIDTH
Tj = 25°C
VGS
TOP 10V
8.0V
4.5V
4.0V
3.5V
3.0V
2.8V
BOTTOM 2.5V
2 3 4 5 6
VGS, Gate-to-Sour ce Voltage (V )
1
10
100
1000
ID, Drain-to-Source Current (Α)
TJ = 25°C
TJ = 150°C
VDS = 10V
20µs PULSE WIDTH
-60 -40 -20 020 40 60 80 100 120 140 160
TJ , Junct ion Tem perature (°C )
0.5
1.0
1.5
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID = 13A
VGS = 10V
IRF7413ZPbF
4www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
110 100
VDS, Drai n-to- Source Voltage (V )
100
1000
10000
C, Capacitance(pF)
VGS = 0V, f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
Crss
Ciss
0.2 0.4 0.6 0.8 1.0 1.2 1.4
VSD, Source-to- Drain Voltage (V)
0.10
1.00
10.00
100.00
1000.00
ISD, Reverse Drain Current (A)
TJ = 25°C
TJ = 150°C
VGS = 0V
0 1 10 100 1000
VDS, Dr ain-to-S ource Voltage ( V)
0.1
1
10
100
1000
ID, Drain-to-Source Current (A)
1msec
10msec
OPERATION IN THIS AREA
LIMITED BY RDS(on)
100µsec
TA = 25°C
Tj = 150°C
Single Pulse
0481216
QG Total G ate Char ge (nC)
0.0
2.0
4.0
6.0
8.0
10.0
12.0
VGS, Gate-to-Source Voltage (V)
VDS= 24V
VDS= 15V
ID= 10A
IRF7413ZPbF
www.irf.com 5
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
Fig 9. Maximum Drain Current vs.
Ambient Temperature Fig 10. Threshold Voltage vs. Temperature
-75 -50 -25 025 50 75 100 125 150
TJ , Temperature ( °C )
0.5
1.0
1.5
2.0
2.5
VGS(th) Gate threshold Voltage (V)
ID = 250µA
1E-006 1E-005 0.0001 0.001 0.01 0.1 110 100
t1 , Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
100
Thermal Response ( Z thJA )
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty factor D =
t / t
2. Peak T
= P x Z + T
1 2
JDM thJA A
P
t
t
DM
1
2
τJ
τJ
τ1
τ1τ2
τ2τ3
τ3
R1
R1R2
R2R3
R3
Ci= i/Ri
Ci= τi/Ri
τ
τ
C
τ4
τ4
R4
R4Ri (°C/W) τi (sec)
1.8556 0.000337
2.4927 0.012752
25.570 0.691000
20.340 21.90000
25 50 75 100 125 150
TA , Ambient Temperature ( °C)
0
2
4
6
8
10
12
14
ID, Drain Current (A)
IRF7413ZPbF
6www.irf.com
D.U.T. VD
S
ID
IG
3mA
VGS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
Fig 13. Gate Charge Test Circuit
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
R
G
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-V
DD
DRIVER
A
15V
20V
VGS
25 50 75 100 125 150
Start ing TJ , Junct ion Tem peratur e (°C )
0
20
40
60
80
100
120
140
EAS , Single Pulse Avalanche Energy (mJ)
ID
TOP 3.1A
3.9A
BOTTOM 10A
Fig 14a. Switching Time Test Circuit
Fig 14b. Switching Time Waveforms
VGS
VDS
9
0%
10%
td(on) td(off)
trtf
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
VDD
VDS
LD
D.U.T
+
-
IRF7413ZPbF
www.irf.com 7
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
R
e-Applied
V
oltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
* VGS = 5V for Logic Level Devices
*
+
-
+
+
+
-
-
-
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T
Fig 16. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1 Qgs2 Qgd Qgodr
IRF7413ZPbF
8www.irf.com
Control FET
Special attention has been given to the power losses
in the switching elements of the circuit - Q1 and Q2.
Power losses in the high side switch Q1, also called
the Control FET, are impacted by the Rds(on) of the
MOSFET, but these conduction losses are only about
one half of the total losses.
Power losses in the control switch Q1 are given
by;
Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput
This can be expanded and approximated by;
P
loss =Irms 2×Rds(on)
()
+I×Qgd
ig
×Vin ×f
⎛
⎝
⎜ ⎞
⎠
⎟ +I×Qgs2
ig
×Vin ×f
⎛
⎝
⎜ ⎞
⎠
⎟
+Qg×Vg×f
()
+Qoss
2×Vin ×f
⎛
⎝ ⎞
⎠
This simplified loss equation includes the terms Qgs2
and Qoss which are new to Power MOSFET data sheets.
Qgs2 is a sub element of traditional gate-source
charge that is included in all MOSFET data sheets.
The importance of splitting this gate-source charge
into two sub elements, Qgs1 and Qgs2, can be seen from
Fig 16.
Qgs2 indicates the charge that must be supplied by
the gate driver between the time that the threshold
voltage has been reached and the time the drain cur-
rent rises to Idmax at which time the drain voltage be-
gins to change. Minimizing Qgs2 is a critical factor in
reducing switching losses in Q1.
Qoss is the charge that must be supplied to the out-
put capacitance of the MOSFET during every switch-
ing cycle. Figure A shows how Qoss is formed by the
parallel combination of the voltage dependant (non-
linear) capacitances Cds and Cdg when multiplied by
the power supply input buss voltage.
Synchronous FET
The power loss equation for Q2 is approximated
by;
P
loss =P
conduction +P
drive +P
output
*
P
loss =Irms
2×Rds(on)()
+Qg×Vg×f
()
+Qoss
2×Vin ×f
⎛
⎝
⎜ ⎞
⎠ +Qrr ×Vin ×
f
(
)
*dissipated primarily in Q1.
For the synchronous MOSFET Q2, Rds(on) is an im-
portant characteristic; however, once again the im-
portance of gate charge must not be overlooked since
it impacts three critical areas. Under light load the
MOSFET must still be turned on and off by the con-
trol IC so the gate drive losses become much more
significant. Secondly, the output charge Qoss and re-
verse recovery charge Qrr both generate losses that
are transfered to Q1 and increase the dissipation in
that device. Thirdly, gate charge will impact the
MOSFETs’ susceptibility to Cdv/dt turn on.
The drain of Q2 is connected to the switching node
of the converter and therefore sees transitions be-
tween ground and Vin. As Q1 turns on and of f there is
a rate of change of drain voltage dV/dt which is ca-
pacitively coupled to the gate of Q2 and can induce
a voltage spike on the gate that is sufficient to turn
the MOSFET on, resulting in shoot-through current .
The ratio of Qgd/Qgs1 must be minimized to reduce the
potential for Cdv/dt turn on.
Power MOSFET Selection for Non-Isolated DC/DC Converters
Figure A: Qoss Characteristic
IRF7413ZPbF
www.irf.com 9
SO-8 Package Details
SO-8 Part Marking
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IRF7413ZPbF
10 www.irf.com
Notes:
Repetitive rating; pulse width limited by max. junction temperature.
Starting TJ = 25°C, L = 0.62mH, RG = 25Ω, IAS = 10A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
When mounted on 1 inch square copper board.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 06/2006
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. O U TLIN E C O NFORMS TO EIA-481 & EIA-541.
FEED DIRECTION
TE RM I NAL NUM BE R 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
N
OTES:
1
. CONTROLLING DIMENSION : MILLIMETER.
2
. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3
. OUTLINE CONFORMS T O EIA-481 & EI A -541.
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
SOIC-8L
Lead Free and RoHS Compliance Document
http://www.irf.com/ehs/
Contents:
1. Composition
2. Solder Reflow
3. TIn Whisker Report
4. RoHS Certification
5. Independent Laboratory Analysis
SOIC-8L
Component Material
Name Material
Mass (gr/ea) Element Name
Composition
Substance
Mass (per
device) g
Material
Analysis
Weight (%)
% of Total
Weight
Chip Silicon 0.00262 Si 0.00262 100% 3.2%
SiO2 0.03550 71% 44.0%
Epoxy 0.00888 18% 11.0%
Other 0.00568 11% 7.0%
Cu 0.02363 97% 29.3%
Other 0.00063 3% 0.8%
Epoxy 0.00017 9% 0.2%
Ag 0.00088 46% 1.1%
Aromatic Amine 0.00088 46% 1.1%
Wire bond Gold 0.00030 Au 0.00030 100% 0.4%
Lead Finish Tin / Lead 0.00146 Sn 0.00146 100% 1.8%
Total Weight (g) 0.08063
Die Attach Silver Epoxy 0.00193
Data for IR products and services contained in this document was derived under specific operating and environmental conditions. The actual results
obtained by any other party implementing such products or services will depend on a large number of factors and may vary significantly. IR makes no
representation that these results can be expected or obtained by any other party. The information contained in this document is provided without any
warranty, either expressed or implied, and IR specifically disclaims any and all liability, including but not limited to consequential or indirect damages.
IR reserves the right to make changes without further notice to any products and services contained herein.
MSL2 at 260 C
This part is compliant with EU Directive 2002/95/EC (RoHS) and does not contain lead, mercury,
cadmium (0.01%), hexavalent chromium, PBB or PBDE in concentrations greater than 0.1%, except as
permitted by Annex (7).
Encapsulant Epoxy Resin 0.05006
Lead Frame Copper 0.02426
260 DEGREE REFLOW PROFILE
0
50
100
150
200
250
300
TIME
DEGREE CELCIUS
60 to 180 sec
150 C to 200 C
60 to 150 sec
> 217 C
10 to 30
sec
> 255 C
SOIC-8L Tin Whisker Report
Objective: The purpose is to evaluate the Tin whisker growth for various test conditions on PbF products
Part No: IRF7530
Package Type: Micro-8 Micro-8 used for SOIC-8L
Test Room Temperature
Stora
g
eTemperature
Humidit
y
Unbias Temperature Cycling
Test Conditions 30+/-2
o
C, 60+/-3%RH 60+/-5
o
C, 87+3/-2%RH -55 to 85
o
C
Test Status/Readpoint NWF NWF NWF
Examples:
Whisker Length (
µ
m) 000
Abbreviation NWF WFA WFO
Whisker length
pass/fail criterion
No Whiskers Found
Whisker length less
than 10 um is
considered insignificant
Whiskers found within
acceptable range
Whisker length less
than 40 um is
considered pass
Whiskers found over
acceptable range
Whisker length
exceeding 40 um is
considered fail
Sn Plating descriptions:
Plating thickness (
µ
in): >300
Annealing conditions: 150
o
C for 1 hour
Plating finish: 100% Sn Matte
Sample size: 3 pieces per test
Reflow: 1X @ 255
o
C
Data for IR products and services contained in this document was derived under specific operating and environmental conditions. The actual
results obtained by any other party implementing such products or services will depend on a large number of factors and may vary significantly. IR
makes no representation that these results can be expected or obtained by any other party. The information contained in this document is
provided without any warranty, either expressed or implied, and IR specifically disclaims any and all liability, including but not limited to
consequential or indirect damages. IR reserves the right to make changes without further notice to any products and services contained herein.
International Rectifier components and their homogeneous sub-components manufactured under
the Lead Free Program
(1)
are in compliance with European Union Directive 2002/95/EC (RoHS
Directive) of the European Parliament and of the Council of 27 January 2003. IR parts that have
been identified as RoHS compliant do not exceed the maximum limit for following 6 designated
substances.
Substance Maximum Limit (ppm)
Cadmium (Cd) 100
Lead (Pb) 1000
(2)
Mercury (Hg) 1000
Hexavalent Chromium (Cr
6+
) 1000
Poly Brominated Biphenyls (PBB) 1000
Poly Brominated Diphenyl Ethers (PBDE) 1000
(1)
Part numbers typically contain a “PBF” suffix
(2)
Maximum limit (ppm) does not apply to applications for which exemptions have been
granted by the RoHS Directive
Our statements in this letter regarding RoHS compliance and lead content do not extend to, or
apply to any product subjected to unintended contamination, misuse, neglect, accident, improper
installation, or to use in violation of instructions furnished by IR. We additionally note that IR
products in certain specific large outline packages could contain high temperature solder die
attach material having greater than 85% lead content, which is considered exempt from ELV
Directive, Article 4(2)(a) by Annex II and RoHS Directive, Article 4(1) by Annex (7).
Authorized signatures for International Rectifier:
Name: Greg Takagi Date:
Position: Director, Global Environmental Health and Safety
Name: Danny Narabal Date:
Position: Director, Package Engineering
The information contained in this letter is being provided for informational purposes only and to clarify
certain information concerning IR products. Nothing provided in this letter is (i) a representation, warranty
or agreement to indemnification by IR, (ii) a statement which may form the basis of reliance by IR, (iii) a
modification of an y of the terms and conditions of sale agreed to in writing between IR and its customers
with respect to any IR products, whether previously sold or to be sold in the future.
ELEMENTAL CONTAMINATION TEST RESULTS
Analysis Technique:
Analysis was performed on twelve (12) IC samples to determine the amount of elemental
contamination (Cd, Pb, Hg, and As), PVC and PVC blends, asbestos, hexavalent chromium, and
organic bromide compounds present in the samples.
Analysis Technique:
Each sample set was ground to pass a 200 mesh screen. Individual samples were analyzed in
accordance with the document labeled “Plastics - Determination of cadmium - Wet
decomposition method”, EN1122, ICS 83.080.01, Method “A”. Individual were weighed to
+0.01 mg. followed by analysis using ISO 3613: 2000(E), “Chromate Conversion Coatings on
Zinc, Cadmium, Aluminum-Zinc Alloys and Zinc-Aluminum alloys---Test Methods.” Each sample
set was ground to pass a 200 mesh screen. Individual samples were analyzed in accordance
with the document labeled “Interim Method for the Determination of Asbestos in Bulk Insulation
Samples”, EPA-600/M4-82-020, Dec. 1982. Samples were measured utilizing a Leica DMLM
compound binocular microscope.
Each sample set was prepared for reflectance mode FTIR utilizing a BioRad FTS6000 FTIR
system coupled to a UMA 500 FTIR microsco pe. The FTIR spe ctra for reference areas were
collected on adjacent clea r areas of a control wafer. Infrared spectra were then collected at 8 cm-
1 resolution with 1024 scans co-added together prior to Fourier Transformation.
Individual samples were analyzed in accordance with EPA-600 Method 1614 draft method, in
conjunction with the appropriate prepa ration technique.
Elemental Results:
As Cd Hg Pb
Sample Name ppm (wt.) ppm (wt.) ppm (wt.) ppm (wt.)
Blank <1.0 <1.0 <1.0 <1.0
IRF4905PBF (TO-220) <1.0 <1.0 <1.0 4.1
IRFP450PBF (TO-247) <1.0 <1.0 <1.0 11.6
IRF740SPBF (D2-PAK) <1.0 <1.0 <1.0 14600
IRFR3707ZPBF (D-PAK) <1.0 <1.0 <1.0 4864
IRLL2705PBF (SOT-223) <1.0 <1.0 <1.0 11100
IRF6603 (DirectFET) <1.0 <1.0 <1.0 19.2
IRLML6401TRPBF (Micro-3) <1.0 <1.0 <1.0 6.4
IRLMS6802TRPBF (Micro-6) <1.0 <1.0 <1.0 9.5
IRF7821PBF(SO-8) <1.0 <1.0 <1.0 7.6
IR2153PBF (8L PDIP) <1.0 <1.0 <1.0 9.4
IRF7503TRPBF (Micro-8) <1.0 <1.0 <1.0 15.8
IR3086AMPBF (20L MLPQ) <1.0 <1.0 <1.0 8.9
The re-analysis of the IRF740SPBF, IRFR3707ZPBF, IRLL2705PBF indicate that the high Pb is
coming from a single internal layer and is exempt per the specifications
Report Date: 14-Jul-2005
Work Order: 05-03284-01
Testin
g
p
erformed b
y
:
Air Liquide - Balazs Analytical Services
46409 Landing Parkway, Fremont CA 94538
Telephone (510) 657-0600 Fax (510) 657-2292
Web htt
p
://www.balazs.com
Results:
PBB/PDBE Cr(VI) PVC Asbestos
Sample Name ppm (wt.) ppm (wt.) ppm (wt.) P/NP
Blank <10. <1.0 <1.0 NP
IRF4905PBF (TO-220) <10. <1.0 <1.0 NP
IRFP450PBF (TO-247) <10. <1.0 <1.0 NP
IRF740SPBF (D2-PAK) <10. <1.0 <1.0 NP
IRFR3707ZPBF (D-PAK) <10. <1.0 <1.0 NP
IRLL2705PBF (SOT-223) <10. <1.0 <1.0 NP
IRF6603 (DirectFET) <10. <1.0 <1.0 NP
IRLML6401TRPBF (Micro -3) <10. <1.0 <1.0 NP
IRLMS6802TRPBF (Micro-6) <10. <1.0 <1.0 NP
IRF7821PBF(SO-8) <10. <1.0 <1.0 NP
IR2153PBF (8L PDIP) <10. <1.0 <1.0 NP
IRF7503TRPBF (Micro-8) <10. <1.0 <1.0 NP
IR3086AMPBF (20L MLPQ) <10. <1.0 <1.0 NP