0.5 CMOS 1.65 V TO 3.6 V Dual SPDT/2:1 MUX ADG836 FEATURES ADG836 0.5 typical on resistance 0.8 maximum on resistance at 125C 1.65 V to 3.6 V operation Automotive temperature range: -40C to +125C High current carrying capability: 300 mA continuous Rail-to-rail switching operation Fast-switching times <20 ns Typical power consumption (<0.1 W) S1A D1 S1B IN1 IN2 S2A D2 APPLICATIONS SWITCHES SHOWN FOR A LOGIC 1 INPUT Cellular phones PDAs MP3 players Power routing Battery-powered systems PCMCIA cards Modems Audio and video signal routing Communication systems 04308-001 S2B Figure 1. GENERAL DESCRIPTION PRODUCT HIGHLIGHTS The ADG836 is a low voltage CMOS device containing two independently selectable single-pole, double-throw (SPDT) switches. This device offers ultralow on resistance of less than 0.8 over the full temperature range. The ADG836 is fully specified for 3.3 V, 2.5 V, and 1.8 V supply operation. 1. <0.8 over full temperature range of -40C to +125C. 2. Single 1.65 V to 3.6 V operation. 3. Compatible with 1.8 V CMOS logic. 4. High current handling capability (300 mA continuous current at 3.3 V). 5. Low THD + N (0.02% typ). 6. 3 mm x 3 mm LFCSP package and 10-lead MSOP package. Each switch conducts equally well in both directions when on, and has an input signal range that extends to the supplies. The ADG836 exhibits break-before-make switching action. The ADG836 is available in a 10-lead MSOP and a 3 mm x 3 mm 12-lead LFCSP. Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c) 2005 Analog Devices, Inc. All rights reserved. ADG836 TABLE OF CONTENTS Specifications..................................................................................... 3 Typical Performance Characteristics ..............................................8 Absolute Maximum Ratings............................................................ 6 Test Circuits..................................................................................... 11 ESD Caution.................................................................................. 6 Outline Dimensions ....................................................................... 13 Pin Configurations ........................................................................... 7 Ordering Guide .......................................................................... 13 REVISION HISTORY 4/05--Rev. 0 to Rev. A Updated Format..................................................................Universal Changes to Table 1............................................................................ 3 Changes to Table 2............................................................................ 4 Changes to Table 3............................................................................ 5 Changes to Ordering Guide .......................................................... 13 Revision 0: Initial Version Rev. A | Page 2 of 16 ADG836 SPECIFICATIONS VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT (ON)) LEAKAGE CURRENTS Source Off Leakage IS (OFF) +25C Temperature1 -40C to +85C -40C to +125C 0 V to VDD 0.5 0.65 0.04 0.75 0.8 0.075 0.08 0.15 0.16 0.1 Unit V typ max typ max typ max 0.2 nA typ Channel On Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH 0.2 nA typ CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tON 4 tOFF Break-Before-Make Time Delay (tBBM) Charge Injection Off Isolation Channel-to-Channel Crosstalk Total Harmonic Distortion (THD + N) Insertion Loss -3 dB Bandwidth CS (OFF) CD, CS (ON) POWER REQUIREMENTS IDD 2 VDD = 2.7 V, VS = 0 V to VDD, IS = 100 mA; Figure 19 VDD = 2.7 V, VS = 0.65 V, IS = 100 mA VDD = 2.7 V, VS = 0 V to VDD IS = 100 mA VDD = 3.6 V VS = 0.6 V/3.3 V, VD = 3.3 V/0.6 V; Figure 20 VS = VD = 0.6 V or 3.3 V; Figure 21 2 0.8 V min V max VIN = VINL or VINH 0.1 A typ A max pF typ 40 -67 ns typ ns max ns typ ns max ns typ ns min pC typ dB typ -90 dB typ -67 dB typ 0.02 % -0.05 57 25 75 dB typ MHz typ pF typ pF typ RL = 50 , CL = 35 pF VS = 1.5 V/0 V; Figure 22 RL = 50 , CL = 35 pF VS = 1.5 V; Figure 22 RL = 50 , CL = 35 pF VS1 = VS2 = 1.5 V; Figure 23 VS = 1.5 V, RS = 0 , CL = 1 nF; Figure 24 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 25 S1A-S2A/S1B-S2B, RL = 50 , CL = 5 pF, f = 100 kHz; Figure 28 S1A-S1B/S2A-S2B, RL = 50 , CL = 5 pF, f = 100 kHz; Figure 27 RL = 32 , f = 20 Hz to 20 kHz, VS = 2 V p-p RL = 50 , CL = 5 pF; Figure 26 RL = 50 , CL = 5 pF; Figure 26 0.003 A typ A max 0.005 21 26 4 7 17 28 29 8 9 5 1 1 Test Conditions/Comments 4 Temperature range for Y version is -40C to +125C. Guaranteed by design, not subject to production test. Rev. A | Page 3 of 16 VDD = 3.6 V Digital inputs = 0 V or 3.6 V ADG836 VDD = 2.5 V 0.2 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT (ON)) LEAKAGE CURRENTS Source Off Leakage IS (OFF) Channel On Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tON Temperature1 +25C -40C to +85C -40C to +125C Unit 0 V to VDD 0.65 0.72 0.04 0.8 0.88 0.08 0.085 0.23 0.24 0.16 0.2 0.2 nA typ nA typ 1.7 0.7 V min V max 0.1 A typ A max pF typ 0.005 4 23 29 tOFF 5 7 Break-before-Make Time Delay (tBBM) 17 30 31 8 9 5 Charge Injection Off Isolation Channel-to-Channel Crosstalk 30 -67 -90 -67 Total Harmonic Distortion (THD + N) Insertion Loss -3 dB Bandwidth CS (OFF) CD, CS (ON) POWER REQUIREMENTS IDD 0.022 -0.06 57 25 75 0.003 1 1 2 V typ max typ max typ max 4 Temperature range for Y version is -40C to +125C. Guaranteed by design, not subject to production test. Rev. A | Page 4 of 16 ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ Test Conditions/Comments VDD = 2.3 V, VS = 0 V to VDD, IS = 100 mA; Figure 19 VDD = 2.3 V, VS = 0.7 V, IS = 100 mA VDD = 2.3 V, VS = 0 V to VDD, IS = 100 mA VDD = 2.7 V VS = 0.6 V/2.4 V, VD = 2.4 V/0.6 V; Figure 20 VS = VD = 0.6 V or 2.4 V; Figure 21 VIN = VINL or VINH RL = 50 , CL = 35 pF VS = 1.5 V/0 V; Figure 22 RL = 50 , CL = 35 pF VS = 1.5 V; Figure 22 RL = 50 , CL = 35 pF VS1 = VS2 = 1.5 V; Figure 23 VS = 1.25 V, RS = 0 , CL = 1 nF; Figure 24 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 25 S1A-S2A/S1B-S2B, RL = 50 , CL = 5 pF, f = 100 kHz; Figure 28 dB typ S1A-S1B/S2A-S2B, RL = 50 , CL = 5 pF, f = 100 kHz; Figure 27 % RL = 32 , f = 20 Hz to 20 kHz, VS = 1.5 V p-p dB typ RL = 50 , CL = 5 pF; Figure 26 MHz typ RL = 50 , CL = 5 pF; Figure 26 pF typ pF typ VDD = 2.7 V A typ Digital inputs = 0 V or 2.7 V A max ADG836 VDD = 1.65 V 1.95 V, GND = 0 V, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) LEAKAGE CURRENTS Source Off Leakage IS (OFF) Channel On Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH CIN, Digital Input Capacitance DYNAMIC CHARACTERISTICS2 tON +25C Temperature1 -40C to +85C -40C to +125C 0 V to VDD 1 1.4 2 2.2 4 2.2 4 0.1 typ 0.2 nA typ 0.2 nA typ VDD = 1.95 V VS = 0.6 V/1.65 V, VD = 1.65 V/0.6 V; Figure 20 VS = VD = 0.6 V or 1.65 V; Figure 21 A typ A max pF typ VIN = VINL or VINH 0.1 RL = 50 , CL = 35 pF VS = 1.5 V/0 V; Figure 22 RL = 50 , CL = 35 pF VS = 1.5 V; Figure 22 RL = 50 , CL = 35 pF VS1 = VS2 = 1 V; Figure 23 VS = 1 V, RS = 0 V, CL = 1 nF; Figure 24 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 25 S1A-S2A/S1B-S2B; RL = 50 , CL = 5 pF, f = 100 kHz; Figure 28 S1A-S1B/S2A-S2B; RL = 50 , CL = 5 pF, f = 100 kHz; Figure 27 RL = 32 , f = 20 Hz to 20 kHz, VS = 1.2 V p-p RL = 50 , CL = 5 pF; Figure 26 RL = 50 , CL = 5 pF; Figure 26 0.005 4 Break-Before-Make Time Delay (tBBM) Charge Injection Off Isolation 20 -67 Channel-to-Channel Crosstalk -90 dB typ -67 dB typ Total Harmonic Distortion, THD 0.14 % Insertion Loss -3 dB Bandwidth -0.08 57 dB typ MHz typ pF typ pF typ 38 39 10 11 25 75 0.003 1.0 VDD = 1.8 V, VS = 0 V to VDD, IS = 100 mA; Figure 19 VDD = 1.65 V, VS = 0 V to VDD, IS = 100 mA; Figure 19 VDD = 1.65 V, VS = 0.7 V, IS = 100 mA V min V max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ CS (OFF) CD, CS (ON) POWER REQUIREMENTS IDD Test Conditions/Comments 0.65 VDD 0.35 VDD 5 2 V typ max max 28 37 7 9 21 tOFF 1 Unit 4 Temperature range for Y version is -40C to +125C. Guaranteed by design, not subject to production test. Rev. A | Page 5 of 16 A typ A max VDD = 1.95 V Digital inputs = 0 V or 1.95 V ADG836 ABSOLUTE MAXIMUM RATINGS TA = 25C, unless otherwise noted. Table 4. Parameter VDD to GND Analog Inputs1 Digital Inputs1 Peak Current, S or D 3.3 V Operation 2.5 V Operation 1.8 V Operation Continuous Current, S or D 3.3 V Operation 2.5 V Operation 1.8 V Operation Operating Temperature Range Automotive (Y Version) Storage Temperature Range Junction Temperature MSOP Package JA Thermal Impedance JC Thermal Impedance LFCSP Package JA Thermal Impedance (3-Layer Board) IR Reflow, Peak Temperature <20 sec 1 Rating -0.3 V to +4.6 V -0.3 V to VDD + 0.3 V -0.3 V to 4.6 V or 10 mA, whichever occurs first 500 mA 460 mA 420 mA (pulsed at 1ms, 10% duty cycle max) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. Table 5. Truth Table Logic 0 1 300 mA 275 mA 250 mA Switch A Off On -40C to +125C -65C to +150C 150C 206C/W 44C/W 61.1C/W 235C Overvoltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Rev. A | Page 6 of 16 Switch B On Off ADG836 IN1 1 11 N1 10 D1 12 NC PIN CONFIGURATIONS 10 D1 ADG836 9 S1B GND 3 TOP VIEW (Not to Scale) 8 VDD S1A 1 7 S2B GND 2 ADG836 8 VDD 6 D2 S2A 3 TOP VIEW (Not to Scale) 7 S2B Figure 2. 10-Lead MSOP (RM-10) 04308-003 9 S1B D2 6 NC = NO CONNECT NC 4 IN2 5 PIN 1 INDICATOR IN2 5 S2A 4 04308-002 S1A 2 Figure 3. 12-Lead LFCSP (CP-12) Table 6. Terminology VDD IDD GND S D IN VD (VS) RON RFLAT (ON) RON IS (OFF) ID (OFF) ID, IS (ON) VINL VINH IINL (IINH) CS (OFF) CD (OFF) CD, CS (ON) CIN tON tOFF tBBM Charge Injection Off Isolation Crosstalk -3 dB Bandwidth On Response Insertion Loss THD + N Most positive power supply potential. Positive supply current. Ground (0 V) reference. Source terminal. May be an input or output. Drain terminal. May be an input or output. Logic control input. Analog voltage on terminals D, S. Ohmic resistance between D and S. Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. On resistance match between any two channels. Source leakage current with the switch off. Drain leakage current with the switch off. Channel leakage current with the switch on. Maximum input voltage for Logic 0. Minimum input voltage for Logic 1. Input current of the digital input. Off switch source capacitance. Measured with reference to ground. Off switch drain capacitance. Measured with reference to ground. On switch capacitance. Measured with reference to ground. Digital input capacitance. Delay time between the 50% and the 90% points of the digital input and switch on condition. Delay time between the 50% and the 90% points of the digital input and switch off condition. On or off time measured between the 80% points of both switches when switching from one to another. A measure of the glitch impulse transferred from the digital input to the analog output during on-off switching. A measure of unwanted signal coupling through an off switch. A measure of unwanted signal, which is coupled through from one channel to another, as a result of parasitic capacitance. The frequency at which the output is attenuated by 3 dB. The frequency response of the on switch. The loss due to the on resistance of the switch. The ratio of the harmonics amplitude plus noise of a signal to the fundamental. Rev. A | Page 7 of 16 ADG836 TYPICAL PERFORMANCE CHARACTERISTICS 0.60 1.2 TA = 25C VDD = 3.3V 0.55 VDD = 3V 1.0 VDD = 2.7V ON RESISTANCE () ON RESISTANCE () 0.50 0.45 0.40 VDD = 3.3V VDD = 3.6V 0.35 0.8 +125C +85C 0.6 0.4 +25C 0.30 -40C 0.20 0 0.5 1.0 1.5 2.0 VD, VS (V) 2.5 3.0 04308-007 0.2 04449-0-004 0.25 0 0 3.5 1.0 1.5 2.0 2.5 3.0 VD, VS (V) Figure 4. On Resistance vs. VD (VS) VDD = 2.7 to 3.6 V Figure 7. On Resistance vs. VD (VS) for Different Temperature, 3.3 V 0.8 1.2 TA = 25C VDD = 2.5V 0.7 1.0 VDD = 2.3V ON RESISTANCE () ON RESISTANCE () 0.5 0.6 0.5 VDD = 2.5V VDD = 2.7V 0.4 +125C 0.8 +85C 0.6 +25C 0.4 -40C 0.2 0 0.5 1.0 1.5 0 2.5 2.0 04308-008 0.2 04308-005 0.3 0 0.5 1.0 Figure 5. On Resistance vs. VD (VS) VDD = 2.5 V to 0.2 V 1.4 TA = 25C 2.5 -40C VDD = 1.8V 1.6 2.0 Figure 8. On Resistance vs. VD (VS) for Different Temperature, 2.5 V 1.8 1.2 VDD = 1.65V +25C +125C ON RESISTANCE () 1.4 1.2 VDD = 1.8V 1.0 0.8 0.6 1.0 0.8 0.7 +85C 0.5 VDD = 1.95V 0.2 0.2 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 04308-009 0.4 04308-006 ON RESISTANCE () 1.5 VD, VS (V) VD, VS (V) 0 0 2.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 VD, VS (V) VD, VS (V) Figure 6. On Resistance vs. VD (VS) VDD = 1.8 3.6 Figure 9. On Resistance vs. VD (VS) for Different Temperature, 1.8 V Rev. A | Page 8 of 16 ADG836 80 90 VDD = 3.3V ID, IS (ON) 70 40 60 20 QINJ (pC) 0 50 40 VCC = 3.3V -20 VCC = 2.5V 30 IS (OFF) -40 20 04308-010 -60 -80 0 20 40 60 80 100 VCC = 1.8V 04308-013 CURRENT (nA) TA = 25C 80 60 10 0 120 0 0.5 1.0 1.5 TEMPERATURE (C) 2.0 2.5 3.0 3.5 VS (V) Figure 10. Leakage Current vs. Temperature, 3.3 V Figure 13. Charge Injection vs. Source Voltage 60 35 VDD = 2.5V 50 30 40 25 VDD = 2.5V ID, IS (ON) TIME (ns) 20 10 0 -10 40 60 80 100 VDD = 2.5V VDD = 1.8V 5 04308-011 -40 20 15 tOFF -30 0 VDD = 3V 10 IS (OFF) -20 20 0 -40 120 04308-014 30 CURRENT (nA) VDD = 1.8V tON VDD = 3V -20 0 TEMPERATURE (C) 20 40 60 80 100 120 TEMPERATURE (C) Figure 11. Leakage Current vs. Temperature, 2.5 V Figure 14. ton/toff Times vs. Temperature 50 1 VDD = 1.8V 0 40 -1 -2 ATTENUATION (dB) IS, ID (ON) 20 10 0 0 20 40 60 80 100 -4 -5 TA = 25C VCC = 3.3V/2.5V/1.8V -6 -7 -8 -9 -11 04308-015 -10 -20 -3 -10 IS (OFF) 04308-012 CURRENT (nA) 30 -12 -13 0.01 120 TEMPERATURE (C) 0.1 1 10 FREQUENCY (MHz) Figure 15. Bandwidth Figure 12. Leakage Current vs. Temperature, 1.8 V Rev. A | Page 9 of 16 100 1000 ADG836 0 -10 VDD = 2.5V TA = 25C S1A-D1 32V LOAD 0.08 1.5V p-p TA = 25C VCC = 3.3V/2.5V/1.8V -30 THD + N (%) ATTENUATION (dB) -20 0.10 -40 -50 0.06 0.04 -60 04308-016 -80 0.01 0.1 1 10 100 0 20 1000 Figure 16. Off Isolation vs. Frequency S1A-S1B -20 ATTENUATION (dB) TA = 25C VCC = 3.3V/2.5V/1.8V -40 S1A-S2A -50 -60 -70 04308-017 -80 -90 0.1 1 10 100 200 500 1k 2k 5k Figure 18. Total Harmonic Distortion + Noise -10 -100 0.01 50 FREQUENCY (Hz) FREQUENCY (MHz) -30 04308-018 0.02 -70 100 1000 FREQUENCY (MHz) Figure 17. Crosstalk vs. Frequency Rev. A | Page 10 of 16 10k 20k ADG836 TEST CIRCUITS IDS ID (ON) ID (OFF) S A D S NC A D A RON = V1/IDS Figure 19. On Resistance Figure 20. Off Leakage Figure 21. On Leakage VDD 0.1F VDD S1B S1A VS VOUT D RL 50 IN 50% VIN CL 35pF 50% 90% 90% GND tON tOFF 04308-022 VOUT Figure 22. Switching Times, tON, tOFF VDD 0.1F 50% VDD S1B S1A VS VIN VOUT VOUT D 80% CL 35pF RL IN 80% tBBM tBBM 04308-023 50 50% 0V GND Figure 23. Break-Before-Make Time Delay, tBBM VDD SW ON S1B NC D VS SW OFF VIN S1A VOUT 1nF IN VOUT VOUT QINJ = CL x VOUT GND Figure 24. Charge Injection Rev. A | Page 11 of 16 04308-024 VS D 04308-019 S VD 04308-020 VD VS 04308-021 IS (OFF) V1 ADG836 VDD VDD 0.1F 0.1F NETWORK ANALYZER S1B S1A 50 VS RL 50 VOUT 50 OFF ISOLATION = 20 LOG RL 50 VS 04308-025 GND D S1B D RL 50 VDD S1A VOUT 50 GND VOUT VS CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG VOUT VS Figure 27. Channel-to-Channel Crosstalk (S1A-S1B) Figure 25. Off Isolation VDD 0.1F NETWORK ANALYZER VOUT NETWORK ANALYZER VDD 50 S1B 50 S1A S2A D2 NC S2B VS RL 50 GND INSERTION LOSS = 20 LOG VOUT VOUT WITH SWITCH 50 VS S1A D1 S1B CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG NC VOUT VS VOUT WITHOUT SWITCH Figure 28. Channel-to-Channel Crosstalk (S1A-S2A) Figure 26. Bandwidth Rev. A | Page 12 of 16 50 04308-028 D 04308-026 NC NETWORK ANALYZER 04308-027 VDD ADG836 OUTLINE DIMENSIONS 3.00 BSC 10 6 4.90 BSC 3.00 BSC 1 5 PIN 1 0.50 BSC 0.95 0.85 0.75 1.10 MAX 0.15 0.00 0.27 0.17 SEATING PLANE 0.80 0.60 0.40 8 0 0.23 0.08 COPLANARITY 0.10 COMPLIANT TO JEDEC STANDARDS MO-187-BA Figure 29. 10-Lead Mini Small Outline Package [MSOP] (RM-10) Dimensions shown in millimeters 3.00 BSC SQ 0.60 MAX 0.45 PIN 1 INDICATOR 0.75 0.55 0.35 9 2.75 BSC SQ TOP VIEW 10 11 12 8 12 MAX 1.00 0.85 0.80 SEATING PLANE *1.45 1 1.30 SQ 1.15 2 7 6 EXPOSED PAD (BOTTOM VIEW) PIN 1 INDICATOR 5 4 3 0.25 MIN 0.50 BSC 0.80 MAX 0.65 TYP 0.05 MAX 0.02 NOM 0.20 REF 0.30 0.23 0.18 COPLANARITY 0.08 *COMPLIANT TO JEDEC STANDARDS MO-220-VEED-1 EXCEPT FOR EXPOSED PAD DIMENSION. Figure 30. 12-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 3 x 3 mm Body, Very Thin Quad (CP-12-1) Dimensions shown in millimeters ORDERING GUIDE Model ADG836YRM ADG836YRM-REEL ADG836YRM-REEL7 ADG836YRMZ2 ADG836YRMZ-REEL2 ADG836YRMZ-REEL72 ADG836YCP-REEL ADG836YCP-REEL7 1 2 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description Mini Small Outline Package (MSOP) Mini Small Outline Package (MSOP) Mini Small Outline Package (MSOP) Mini Small Outline Package (MSOP) Mini Small Outline Package (MSOP) Mini Small Outline Package (MSOP) Lead Frame Chip Scale Package (LFCSP_VQ) Lead Frame Chip Scale Package (LFCSP_VQ) Branding on this package is limited to three characters due to space constraints. Z = Pb-free part. Rev. A | Page 13 of 16 Package Option RM-10 RM-10 RM-10 RM-10 RM-10 RM-10 CP-12-1 CP-12-1 Branding1 S9A S9A S9A S05 S05 S05 S9A S9A ADG836 NOTES Rev. A | Page 14 of 16 ADG836 NOTES Rev. A | Page 15 of 16 ADG836 NOTES (c) 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C04308-0-4/05(A) Rev. A | Page 16 of 16