SN54LVTH244A, SN74LVTH244A 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS586J - DECEMBER 1996 - REVISED OCTOBER 2003 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 20 2Y4 1A1 1OE VCC 1 SN54LVTH244A . . . FK PACKAGE (TOP VIEW) 19 2OE 18 1Y1 2 3 1A2 2Y3 1A3 2Y2 1A4 17 2A4 16 1Y2 4 5 15 2A3 14 1Y3 6 7 13 2A2 12 1Y4 8 9 10 11 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1Y1 2A4 1Y2 2A3 1Y3 2Y1 GND 2A1 1Y4 2A2 1 VCC SN74LVTH244A . . . RGY PACKAGE (TOP VIEW) SN54LVTH244A . . . J OR W PACKAGE SN74LVTH244A . . . DB, DW, NS, OR PW PACKAGE (TOP VIEW) 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND D 2A1 D D 1OE D Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 500 mA Per JESD 17 ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) GND D D Bus Hold on Data Inputs Eliminates the Input and Output Voltages With 3.3-V VCC) Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25C Support Unregulated Battery Operation Down to 2.7 V Ioff and Power-Up 3-State Support Hot Insertion 2OE D Support Mixed-Mode Signal Operation (5-V description/ordering information These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. ORDERING INFORMATION QFN - RGY SN74LVTH244ARGYR Tube SN74LVTH244ADW Tape and reel SN74LVTH244ADWR SOP - NS Tape and reel SN74LVTH244ANSR LVTH244A SSOP - DB Tape and reel SN74LVTH244ADBR LXH244A TSSOP - PW Tape and reel SN74LVTH244APWR LXH244A VFBGA - GQN LXH244A LVTH244A SN74LVTH244AGQNR VFBGA - ZQN (Pb-free) -55C to 125C TOP-SIDE MARKING Tape and reel SOIC - DW 40C to 85C -40C ORDERABLE PART NUMBER PACKAGE TA Tape and reel SN74LVTH244AZQNR LXH244A CDIP - J Tube SNJ54LVTH244AJ SNJ54LVTH244AJ CFP - W Tube SNJ54LVTH244AW SNJ54LVTH244AW LCCC - FK Tube SNJ54LVTH244AFK SNJ54LVTH244AFK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright (c) 2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SN54LVTH244A, SN74LVTH244A 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS586J - DECEMBER 1996 - REVISED OCTOBER 2003 description/ordering information (continued) The 'LVTH244A devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, the devices pass data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. SN74LVTH244A . . . GQN OR ZQN PACKAGE (TOP VIEW) 1 2 3 terminal assignments 4 1 2 3 4 A A 1A1 1OE VCC 2OE B B 1A2 2A4 2Y4 1Y1 C C 1A3 2Y3 2A3 1Y2 D D 1A4 2A2 2Y2 1Y3 E E GND 2Y1 2A1 1Y4 FUNCTION TABLE (each buffer) INPUTS 2 OE A OUTPUT Y L H H L L L H X Z POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN54LVTH244A, SN74LVTH244A 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS586J - DECEMBER 1996 - REVISED OCTOBER 2003 logic diagram (positive logic) 1OE 1A1 1A2 1A3 1A4 1 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 Pin numbers shown are for the DB, DW, FK, J, NS, PW, RGY, and W packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Voltage range applied to any output in the high state, VO (see Note 1) . . . . . . . . . . . . . -0.5 V to VCC + 0.5 V Current into any output in the low state, IO: SN54LVTH244A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74LVTH244A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Current into any output in the high state, IO (see Note 2): SN54LVTH244A . . . . . . . . . . . . . . . . . . . . . . 48 mA SN74LVTH244A . . . . . . . . . . . . . . . . . . . . . . 64 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Package thermal impedance, JA (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70C/W (see Note 3): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58C/W (see Note 3): GQN/ZQN package . . . . . . . . . . . . . . . . . . . . . . . . . . . 78C/W (see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60C/W (see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83C/W (see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This current flows only when the output is in the high state and VO > VCC. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 4. The package thermal impedance is calculated in accordance with JESD 51-5. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SN54LVTH244A, SN74LVTH244A 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS586J - DECEMBER 1996 - REVISED OCTOBER 2003 recommended operating conditions (see Note 5) SN54LVTH244A SN74LVTH244A MIN MAX MIN MAX 2.7 3.6 2.7 3.6 UNIT VCC Supply voltage VIH High-level input voltage VIL Low-level input voltage 0.8 0.8 VI Input voltage 5.5 5.5 V IOH High-level output current -24 -32 mA IOL Low-level output current 48 64 mA t/v Input transition rise or fall rate 10 10 ns/V t/VCC Power-up ramp rate 200 TA Operating free-air temperature -55 2 Outputs enabled 2 V -40 V s/V 200 125 V 85 C NOTE 5: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN54LVTH244A, SN74LVTH244A 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS586J - DECEMBER 1996 - REVISED OCTOBER 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54LVTH244A PARAMETER VIK VOH TEST CONDITIONS VCC = 2.7 V, II = -18 mA VCC = 2.7 V to 3.6 V, IOH = -100 A VCC = 2.7 V, IOH = -8 mA MIN SN74LVTH244A MAX VOL VCC = 3 V TYP VCC-0.2 2.4 2.4 II Data inputs Ioff 0.2 0.2 IOL = 24 mA 0.5 0.5 IOL = 16 mA 0.4 0.4 IOL = 32 mA 0.5 0.5 IOL = 48 mA 0.55 VI = 5.5 V 50 10 VI = VCC or GND 1 1 1 1 VI = 0 -5 VI = 0.8 V VI = 2 V Data inputs VCC = 3.6 VI = VCC V, 75 75 -75 -75 500 -750 VI = 0 to 3.6 V IOZH VCC = 3.6 V, VO = 3 V IOZL VCC = 3.6 V, VO = 0.5 V IOZPU VCC = 0 to 1.5 V, VO = 0.5 V to 3 V, OE = don't care IOZPD VCC = 1.5 V to 0, VO = 0.5 V to 3 V, OE = don't care ICC VCC = 3.6 V, IO = 0, VI = VCC or GND Outputs high Outputs low Outputs disabled A A -5 100 VI or VO = 0 to 4.5 V VCC = 3 V II(hold) I(h ld) V 0.55 VCC = 3.6 V, VCC = 0, V 2 IOL = 100 A VCC = 0 or 3.6 V, VCC = 3 3.6 6V UNIT V 2 IOL = 64 mA Control inputs MAX -1.2 VCC-0.2 IOH = -32 mA VCC = 2 2.7 7V MIN -1.2 IOH = -24 mA VCC = 3 V TYP A A 5 5 A -5 -5 A 100 100 A 100 100 A 0.39 0.19 14 5 0.39 0.19 0.2 0.2 mA ICC VCC = 3 V to 3.6 V, One input at VCC - 0.6 V, Other inputs at VCC or GND Ci VI = 3 V or 0 3 3 pF Co VO = 3 V or 0 7 7 pF mA On products compliant to MIL-PRF-38535, this parameter is not production tested. All typical values are at V CC = 3.3 V, TA = 25C. This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another. This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V CC or GND. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 SN54LVTH244A, SN74LVTH244A 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS586J - DECEMBER 1996 - REVISED OCTOBER 2003 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) SN54LVTH244A PARAMETER tPLH tPHL tPZH tPZL tPHZ tPLZ 6 FROM (INPUT) TO (OUTPUT) A Y OE Y OE Y VCC = 3.3 V 0.3 V SN74LVTH244A VCC = 3.3 V 0.3 V VCC = 2.7 V VCC = 2.7 V MAX MIN TYP MAX 3.8 4.1 1.1 2.3 3.5 3.8 0.5 3.8 3.9 1.3 2.1 3.3 3.6 0.8 5 6 1.1 2.5 4.5 5.3 0.8 5 5.4 1.4 2.7 4.4 4.9 1.3 5.5 5.8 1.9 2.8 4.4 4.5 1.2 4.7 4.8 1.8 2.9 4.4 4.4 MIN MAX 0.5 MIN All typical values are at VCC = 3.3 V, TA = 25C. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MIN UNIT MAX ns ns ns SN54LVTH244A, SN74LVTH244A 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS586J - DECEMBER 1996 - REVISED OCTOBER 2003 PARAMETER MEASUREMENT INFORMATION 6V 500 From Output Under Test S1 Open GND CL = 50 pF (see Note A) 500 TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 6V GND 2.7 V LOAD CIRCUIT Timing Input 1.5 V 0V tw tsu th 2.7 V 1.5 V Input 2.7 V 1.5 V Data Input 1.5 V 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 2.7 V 2.7 V 1.5 V Input Output Control 1.5 V 0V tPLH tPHL 1.5 V Output Waveform 1 S1 at 6 V (see Note B) 1.5 V VOL tPHL VOH Output 1.5 V tPLZ 3V 1.5 V tPZH tPLH 1.5 V VOL Output Waveform 2 S1 at GND (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 0V tPZL VOH Output 1.5 V VOL + 0.3 V VOL tPHZ 1.5 V VOH - 0.3 V VOH 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. E. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 PACKAGE OPTION ADDENDUM www.ti.com 28-Aug-2012 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp ACTIVE LCCC FK 20 1 TBD Call TI Call TI 5962-9584401QRA ACTIVE CDIP J 20 1 TBD Call TI Call TI 5962-9584401QSA ACTIVE CFP W 20 1 TBD Call TI Call TI 5962-9584401V2A ACTIVE LCCC FK 20 1 TBD 5962-9584401VRA ACTIVE CDIP J 20 1 TBD POST-PLATE N / A for Pkg Type A42 N / A for Pkg Type Call TI N / A for Pkg Type 5962-9584401VSA ACTIVE CFP W 20 1 TBD SN74LVTH244ADB ACTIVE SSOP DB 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244ADBE4 ACTIVE SSOP DB 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244ADBG4 ACTIVE SSOP DB 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244ADBLE OBSOLETE SSOP DB 20 SN74LVTH244ADBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244ADBRE4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244ADBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244ADW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244ADWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244ADWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244ADWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244ADWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244ADWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Call TI Samples (Requires Login) 5962-9584401Q2A TBD (3) Call TI PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 28-Aug-2012 Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish (3) LIFEBUY BGA MICROSTAR JUNIOR GQN 20 1000 TBD SN74LVTH244ANSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244ANSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244APW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244APWE4 ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244APWG4 ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244APWLE OBSOLETE TSSOP PW 20 SN74LVTH244APWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244APWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244APWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74LVTH244ARGYR ACTIVE VQFN RGY 20 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74LVTH244ARGYRG4 ACTIVE VQFN RGY 20 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SN74LVTH244AZQNR ACTIVE BGA MICROSTAR JUNIOR ZQN 20 1000 Green (RoHS & no Sb/Br) SNJ54LVTH244AFK ACTIVE LCCC FK 20 1 TBD SNJ54LVTH244AJ ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type SNJ54LVTH244AW ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type (1) Call TI SNAGCU Level-1-240C-UNLIM Call TI Level-1-260C-UNLIM POST-PLATE N / A for Pkg Type The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. Addendum-Page 2 Samples (Requires Login) SN74LVTH244AGQNR TBD SNPB MSL Peak Temp PACKAGE OPTION ADDENDUM www.ti.com 28-Aug-2012 (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54LVTH244A, SN54LVTH244A-SP, SN74LVTH244A : * Catalog: SN74LVTH244A, SN54LVTH244A * Enhanced Product: SN74LVTH244A-EP, SN74LVTH244A-EP * Military: SN54LVTH244A * Space: SN54LVTH244A-SP NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product * Enhanced Product - Supports Defense, Aerospace and Medical Applications * Military - QML certified for Military and Defense Applications * Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device SN74LVTH244ADBR SN74LVTH244ADWR SN74LVTH244AGQNR Package Package Pins Type Drawing SSOP SOIC BGA MI CROSTA R JUNI OR SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 GQN 20 1000 330.0 12.4 3.3 4.3 1.5 8.0 12.0 Q1 SN74LVTH244ANSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74LVTH244APWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 SN74LVTH244APWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 SN74LVTH244APWRG4 TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 SN74LVTH244ARGYR VQFN RGY 20 3000 330.0 12.4 3.8 4.8 1.6 8.0 12.0 Q1 ZQN 20 1000 330.0 12.4 3.3 4.3 1.6 8.0 12.0 Q1 SN74LVTH244AZQNR BGA MI CROSTA R JUNI OR Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74LVTH244ADBR SSOP DB 20 2000 367.0 367.0 38.0 SN74LVTH244ADWR SOIC DW 20 2000 367.0 367.0 45.0 SN74LVTH244AGQNR BGA MICROSTAR JUNIOR GQN 20 1000 340.5 338.1 20.6 SN74LVTH244ANSR SO NS 20 2000 367.0 367.0 45.0 SN74LVTH244APWR TSSOP PW 20 2000 364.0 364.0 27.0 SN74LVTH244APWR TSSOP PW 20 2000 367.0 367.0 38.0 SN74LVTH244APWRG4 TSSOP PW 20 2000 367.0 367.0 38.0 SN74LVTH244ARGYR VQFN RGY 20 3000 367.0 367.0 35.0 SN74LVTH244AZQNR BGA MICROSTAR JUNIOR ZQN 20 1000 340.5 338.1 20.6 Pack Materials-Page 2 MECHANICAL DATA MSSO002E - JANUARY 1995 - REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0-8 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as "components") are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. 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