ANALOG DEVICES Low Profile Synchro/Resolver-to-Digital Converter $DC1700/1702/1704 SERIES FEATURES Internal Microtransformers for 60Hz, 400Hz and 2.6kHz References Low Profile (0.4) 10-, 12- or 14-Bit Resolution for 360 High Tracking Rates (75 revs/sec) Voltage Scaling with External Resistors (Unique Feature) DC Voltage Output Proportional to Angular Velocity Low Cost Lightweight 3o0z. (85 grams) MIL Spec/Hi Rel Options Available APPLICATIONS Servo Mechanisms Retransmission Systems Coordinate Conversion Antenna Monitoring Simulation Industrial Controls Fire Control Systems Machine Tool Control Systems GENERAL DESCRIPTION The $DC1700, $DC1702 and SDC1704 are modular, contin- uous tracking Synchro/Resolver-to-Digital Converters which employ a type 2 servo loop. They are intended for use in both Industrial and Military applications. The input signals can be either 3 wire synchro plus reference or 4 wire resolver plus reference, depending on the option. The outputs will be presented in TTL compatible, parallel natural binary. One of the outstanding features of the converters is the use of precision Scott T and reference microtransformers. This bas made it possible to include the transformers within the module, even on the 60Hz option, and yet still maintain the profile height of 0.4". Particular attention has been paid in the design, to achieving the highest tracking rates and accelerations possible, com- patible with the resolution and carrier frequency used, while at the same time obtaining a high overall accuracy. When SDCs are used in control loops, it is often useful to have a voltage which is proportional to angular velocity. This voltage is available and has been brought out on all the SDC1700 converters. SONTAG. Loge Yond HTH Se RUE mBSTAL GuTHLT NO ANALN VELEN Oe piatiny, SuThAt TION myMcURe f yor ~ Extended temperature range versions of all the converters are available. MODELS AVAILABLE The three Synchro-to-Digital Converters described in this data sheet differ primarily in the areas of resolution, accu- racy and dynamic performance as follows: Model SDC1702XYZ is a 10-bit converter which has an overall accuracy of +22 arc-minutes and a resolution of 21 arc-minutes. Model SDC1700XYZ is a 12-bit converter with an overall accuracy of +8.5 arc-minutes and a resolution of 5.3 arc- minutes. Model SDC1704XYZ is a 14-bit converter with an overall accuracy of +2.2 arc-minutes +1LSB and a resolution of 1.3 arc-minutes. The XYZ code defines the option thus: (X) signifies the operating temperature range, (Y) signifies the reference fre- quency, (Z) signifies the input voltage and range, and whether it will accept synchro or resolver format. More information about the option code is given under the heading of Ordering Information. NOTE For all the standard options, no external transformers are needed with these converters. SYNCHRO & RESOLVER CONVERTERS VOL. Il, 13-49SPECIF ICATIONS (typical @ +25C unless otherwise noted) MODELS SDC1702 SDC1700 SDC1704 ACCURACY! (max error) 60Hz 400Hz 2.6kHz RESOLUTION OUTPUT (In Parallel) SIGNAL AND REFERENCE FREQUENCY SIGNAL VOLTAGE (Line-to-Line} Low Level High Level SIGNAL IMPEDANCES Low Level High Level REFERENCE VOLTAGE Low Level High Level REFERENCE IMPEDANCE TRANSFORMER ISOLATION TRACKING RATE (min) 60Hz 400Hz 2.6kHz Accel,' Constant K, 60Hz 400Hz 2.6kHz +22 arc-minutes 22 arc-minutes +22 arc-minutes 10 Bits. (1LSB = 21 arc-mins) 10 Bits (Natural Binary) 60Hz, 400Hz, 2.6kHz 11.8V rms 9O0V rns 26kQ. (Resistive) 200kS (Resistive) 26V (1.1.8V Signal) 115V (90V Signal) 270k&. (115V Signal) 56kS. (26V Reference) (impedance is Resistive) S00V de 5 Revolutions Per Second 36 Revolutions Per Second 75 Revolutions Per Second 1880/sec? 110,000/sec? 518,000/sec? +8.5 arc-minutes +8.5 arc-minutes +8.5 arc-minutes 1? Bits (1LSB = 5.3 arc-mins) 12 Bits (Natural Binary) 2.9 are-minutes +1LSB +2.2 arc-minutes +1LSB +2.9 arc-minutes +1LSB 14 Bits (1LSB = 1.3 arc-mins) 14 Bits (Natural Binary) 500/sec 12 Revolutions Per Second 25 Revolutions Per Second 520/sec? 36,000/sec? 170,000/sec? STEP RESPONSE (179 Step) (For 1LSB Error) 60Hz 1,5sec * * 400Hz 125ms * * 2.6kHz 50ms * * POWER LINES +15V @ 25mA +5% * 15V @ 30mA +5% +5V @ 70mMA * +5V @ 85mA POWER DISSIPATION 1.1 Watts * 1.3 Watts DATA LOGIC OUTPUT? 2TTL Loads SDC17026YZ 2TTL Loads SDC17006YZ 2TTL Loads on (TTL Compatible) 4TTL Loads SDC17025YZ 4TTL Loads $DC17005YZ All Options BUSY LOGIC OUTPUT, POSITIVE PULSE (1 TTL Load) 60Hz 9.0ps * 9.0ps 400Hz 2.0us > 430% * 2.0us > +30% 2,.6kHz 2.0ps * 1.3us MAX DATA TRANSFER TIME 60Hz 40us * 35s 400Hz 5.0us * 3.Ops 2.6kHz 1.8us * 0.8yts INHIBIT INPUT (To Inhibit) WARM UP TIME Logic 0 1 TEL Load 1 sec to Rated Accuracy Logic 0 2 TTL Loads * TEMPERATURE RANGE Operating 0 to 470C Standard -55C to +105C Extended Storage -55C to +125C * * DIMENSIONS 3.125" x 2.625 x 0.4" * * (79.4 x 66.7 x 10.2mrn) WEIGHT 3 ozs. (85 grams) * * NOTES *Specifications same as SDC1702. Specified over the appropriate operating temperature range of the option and for: (a) + 10% signal and reference amplitude variation (b) 10% signal and reference Harmonic Distortion (c) 5% power supply variation (d) +10% variation in reference frequency. 7 It is recommended that buffers should be used if the above converters are required to drive over a distance greater than 6. Specifications subject to change without notice. VOL. H, 13-50 SYNCHRO & RESOLVER CONVERTERSDATA. TRANSFER (AIl Models) The readiness of the converters for data transfer is indicated by the state of the BUSY pin. The voltage appearing on the BUSY pin consists of a train of pulses, at TTL levels, of length according to the model and option (see specification table). The converter is busy when the BUSY pin is at a TTL High level. These pulses corres- pond to those delivered by the VCO to increment or decre- ment the up-down counter (see schematic diagram). Thus the pulses will occur for increasing and decreasing counts. The most suitable time for transferring data is when the BUSY is at a logic Lo state, and the times allowable for data transfer are shown in the specification, Even at the maximum speed of the option, these times will be sufficient to transfer data before the next BUSY pulse occurs. V DISTANCE DEFENDS I ' ON VELOCITY ZA, YY Data Transfer Diagram WIDTH DEPENDS ON OPTION AND MODEL (SEE SPEC) BUSY DATA 7% VALID 7 DATA TRANSFER DIAGRAM Taking the INHIBIT to a logic Lo state prevents the VCO (BUSY) pulses from updating the up-down counter. How- ever, if applied during a BUSY pulse, the INHIBIT will not become effective until the end of the BUSY pulse. The best method of transferring the data is by applying the INHIBIT (taking it to a logic Lo state), waiting for at least the width of a BUSY pulse, transferring the data and releasing the INHIBIT. Note that sustained application of the INHIBIT opens the internal control loop and the converter may take on ap- preciable time to recover to full accuracy when the loop is restored. INTERFACING WITH A COMPUTER It is recommended that external latches are used to enable data to be transferred onto a computer data bus. One method is shown in the diagram. Using this method will mean that the latches are constantly updated by the BUSY signal, while at the same time enabling inputs to be made to the computer by means of normal data transfer procedures. The AC1755 mounting card contains these external components. $001700/2/4 I pusy THTETTTATIT TO LATCHES 4 7473 74173 : TRISTATE ENABLE LATCHES TO COMPUTER INPUT PORT Suggested External Computer Interface Circuitry THEORY OF OPERATION If the unit is a Synchro-to-Digital Converter, then the 3 wire synchro output will be connected to $1, $2 and $3 on the module and the Scott T transformer pair will convert these signals into resolver format. Vi = K Eo Sin wt Sin 6 V2 = K Eg Sin wt Cos @ ie., Where @ is the angle of the Synchro Shaft. If the unit is a Resolver-to-Digital Converter, then the 4 wire resolver output will be connected to $1, $2, $3 and S4 on the module and the microtransformer will act purely as an isolator. To understand the conversion process, then assume that the current word state of the up-down counter is . The V, is multiplied by Cos and V2 is multiplied by Sin to give K Eg Sin wt Sin @ Cos and K Eg Sin wt Cos @ Sin } a REF ~ HI a v1 ERROR _t FLo AMP HIGH SPEED PHASE S10 MICRO- DIGITAL SENSITIVE TRANS- | V2 SIN/COS DETECTOR $2 FORMERS MULTIPLIER $3 & tg (oicitaL) A SIN (6-91 $4 O-|-- HIGH UP-DOWN FREQUENCY |__ INHIBIT O- COUNTER aoe co SHAPING [~ } } -- Busy VEL DIGITAL OUTPUT WORD Functional Diagram of the SDC1700/2/4 Converters SYNCHRO & RESOLVER CONVERTERS VOL. Il, 13-51These signals are subtracted by the error amplifier to give: K Eg Sin wt (Sin 0 Cos # - Cos 6 Sin 4) or K Eg Sin wrt Sin (6 - ) A phase sensitive detector, integrator and Voltage Controlled Oscillator (VCO) form a closed loop system which seeks to null Sin (6 - ). When this is accomplished, the word state of the up-down counter (), equals within the rated accuracy of the con- verter, the synchro shaft angle 6. CONNECTING THE CONVERTER The electrical connections to the converter are straightfor- ward. The power lines, which raust not be reversed, are 15V and 5V. They must be connected to the t15V and 5V pins with the common connection to the ground pin GND. It is suggested that 0.1uF and 6.8uF capacitors be placed in parallel from +15V to GND, from -15V to GND and from +5V to GND. The digital output is taken from pins 1 through to 10 for the SDC1702 1 through to 12 for the SDC1700 1 through to 14 for the SDC1704 Pin 1 represents the MSB in each casc. The reference con- nections are made to pins R,,; and Ryo. In the case of a Synchro, the signals are connected to S1, $2 and S3 according to the folicwing convention: Eg; 53 = Ento Ru Sit wt Sin 0 Es3 _ s2 = Exo .- Ruy 5m wt Sin (0 + 120 ) Eso 51 = Egio pur Sin wt Sin (@ + 240) For a resolver, the signals are connected to S1, S2, $3 and S4" according to the following convention: Es; 53 = Eato Ruy Sin wt Sin 0 Es2 54 = Egni RLo Sin wt Cos 6 The analog voltage representing velocity is available between VEL and GND. The BUSY and INHIBIT pin (Gif used}, should be con- nected as described under the heading Data Transfer. NOTE: If the INHIBIT pin is used (i.2., driven to 0 volts), the control loop will be opened and a finite time will be required (see spec) for the converter to recover. OUTLINE DIMENSIONS AND PIN CONNECTION DIAGRAM Dimensions are shown in inches and (mm), 2 0.4 _ 625 (66.7) ~ I 2.625 (66.7) 02) SDC1704 = PINS 0.04 0.001 (10, T_ 0.2 (5.1) 20,03) Dia. (1) BRASS HAAD GOLD PLA S4 PIN PRESENT FOR RESOLVER ONLY IRC) 12 WW 40 a 3.128 (79.41 ; 6 4 3 2 1 TOP VIEW 0.1 2.5} GRID ABOVE DIAGRAM ILLUSTRATES CONNECTIONS FOa $0C1704, FOR SOC1700, PINS 13 AND 14 ARE OMITTED. PIN 12 1S LSB. FOR SDC1702, PINS 11, 12, 13, 14 ARE OMITTED. PIN 10 IS LSB. MATING SOCKET: CAMBION 450-33 88-01-03 VOL. Il, 13-52, SYNCHRO & RESOLVER CONVERTERS RESISTIVE SCALING OF INPUTS A unique feature of the SDC1700 series of converters is that the inputs can be resistively scaled to accommodate any range of input signal and reference voltages. This means that a standard converter can be used with a personality card in systems where a wide range of input and reference voltages are encountered. In addition it should be noted that a 400Hz unit will operate from a 2.6kHz reference. It will however have the velocity and acceleration character- istics as specified for the 400Hz converter. A 60Hz converter will operate from a 400Hz reference and will have the veloc- ity and acceleration characteristics as specified for the 60Hz converter. To calculate the values of the external scaling resistors for a synchro converter, add 1.11kQ in series with $1, $2 and $3 per extra volt in the case of the signal, and 2.2kQ2 in the case of the reference. In the case of a resolver converter add 2,22kQ per extra volt in series with $1 and S2 for the signal and 2,2kQ2 per extra volt in series with Ryy for the reference. For example, assume that we have an 11.8 volt line to line signal/26.0 volt reference converter, and we wish to use a 60 volt line to line signal with a 115 volt reference. Thus in each signal input line, the extra voltage capability required is: 60 - 11.8 = 48.2 volts Therefore each resistor needs to have a value of 48,2 x 1.11 = 53.5kQ. In the case of the reference, the extra volt- age capability required is: 115 - 26.0 = 89 volts Therefore the resistor needs to have a value of: 89.0 x 2.2 = 195.8kQ Thus the inputs can be scaled as in the diagram below. O--W-F-0 583 OV Lt R2 INPUT 4 O--W7-0 S2 spc O-WA--0 51 11.8V SIGNAL 26VREF oJ Pio 115Vace F OPO Bt RI, R2, R3 = 53.5ks Rp = 195.8k2 TE IN THE CASE OF Rt, R2 AND R3, THE RATIO ERRORS BETWEEN THE RESISTANCES IS MORE IMPORTANT THAN THE ABSOLUTE RESISTANCE VALUES. IN GENERAL A 1% RATIO ERROR WILL GIVE RISE TO AN EXTRA INACCURACY OF 17 ARC-MINUTES WHILE A RATIO ERROR OF 0.1% WILL GIVE RISE TO AN EXTRA INACCURACY OF 1.7 ARC-MINUTES. THE ABSOLUTE VALUE OF Rp IS NOT CRITICAL, BIT WEIGHT TABLE Bit Number Weight in Degrees 1 (MSB) 180.0000 2 90,0000 3 45.0000 4 22.5000 5 11.2500 6 5.6250 7 2.8125 8 1.4063 9 0.7031 10 (LSB for SDC1702) 0.3516 11 0.1758 12 (LSB for SDC1700) 0.0879 13 0.0439 14 (LSB for SDC1704) 0.0220VELOCITY PIN This pin provides a voltage output which is proportional to the angular velocity of the input. The voltage goes negative for an increasing digital angle and goes positive for a de- creasing digital angle. The characteristics of the velocity pin output are given in the table below. Scaling of Output Voltage for One Fifth max Velocity 2Volts (Nominal) 0.05%/C of Output 0 to +70C +50uv/C -55C to +105C 100uV/C G/sec to 800/sec SDC1704 - 400Hz 1% O/sec to 100 /sec SDC1704 _, SOHz 1% | O/sec to 800 /sec SDC1700/2 , t00Hz 2% O/see to 100 /sec SDC1700/2 60Hz 1.5% @1600/sec SDC1700/2/4 400Hz 2mV rms @2D0 /sec SDC1700/2/4 50Hz 2mV rms Output Voltage Temp. Coeff. Output Voltage Drift (All Models) Linearity: Noise: (0 to 20Hz) Impedance (Output) 12 max Current Available imA The velocity voltage can be used in closed loop servo systems for stabilization instead of a tachometer. The SDC1700/2/4 velocity outputs do not have the disad- vantages of being inefficient at low speeds and do not need gearing required by tachometers. In addition, the output is available at no extra cost. For other velocity output scaling and linearity consult the factory. Two examples of the use of the velocity pin are shown in the diagram below. DEMANDED VELOCITY $0C1700/2/4 REF { FINE DATA COARSE DATA Diagrarn showing a velocity feed forward application. The SDC is used to produce the demanded velocity fram Synchro form inputs. AERIAL, 2 SPEED NTING SYNCHRO ETc. DEMAND { REF INPUT @ SENSITIVE MOTOR DETECTOR FREQUENCY PA SHAPING ' 1 ' REF ' I me VELoctry i 7 VOLTAGE REF SD1700 FROM 89C GEARING rE 1 $DC1702 4 S$DC1704 t TO LOAD Diagram showing the velocity voltage being used to stabilize an electro-mechanical control loop APPLICATIONS OF SYNCHRO-TO-DIGITAL CONVERTERS SDCs can be used in a variety of ways in control loops as well as for the conversion of angular data into a form which is readily acceptable to digital displays or computers. The diagram below shows an SDC being used in a digitally controlled feedback loop. DEMANDED DIGITAL ANGLE (0) DIGITAL SUBTRACTION ia., COMPUTER SSTEM i> DIGITAL FEEDBACK VEL VELOC city Soc1700/2/4 VOLTAGE FROM soc 1 Ww TO LOAD An SOC Being Used in a Digitally Controlled Feedback Loop Such loops as shown in the diagram above require the high dynamic performance of the SDC1700 series converters. It should be noted that in this application, the SDC1700 series will replace conventional tachometers and phase sensitive detectors while at the same time provide digital position feedback. Many synchro systems employ a two speed, geared arrange- ment utilizing one synchro for the fine shaft and one for the coarse. An example of this type is shown below. INPUT MECHANICAL ANGI GEARING 1 1 RATION 1 ' 1 Ne Ue J---4 | MODULO 360 1 1 wv COARSE CX 1 FINE CX . (SLOW) (FAST) REF REF (CT) AEF UP TO 7 BITS COARSE 1 UP TO 14 BITS { FINE TSL1612 TWO SPEED PROCESSOR + uP To 1981TS OUTPUT Diagram Showing Coarse/Fine Synchro Processor System In the above example, two tracking SDCs are being used to provide data for coarse/fine (two speed) data transmission systems. The TSL1612 is a processor which combines the outputs of two SDCs to provide one output word of up to 19 bits in length. The TSL1612 is available for any ratio between 2:1 and 36:1 and provides automatic compensation for misalignment of the coarse synchro relative to its shaft. It also corrects for any overlap between the digits of the coarse and fine shafts. SYNCHRO & RESOLVER CONVERTERS VOL. Il, 13-53MEAN TIME BETWEEN FAILURES (M.T.B-F.) The estimated mean time between failures is given as follows: $DC1700/2 174,000 Hours SDC1704 167,000 Hours Further information relating to M.T.B.F. and to the quality control and test procedures employed by us can be obtained from the factory on request. TRANSFER FUNCTION The transfer function of the S$DC1700/2 and SDC1704, 400Hz versions, is given below. For the transfer functions of the other models or for a de- tailed analysis of those given here, please contact us. $DC1700/2 400Hz 8 8.8X 107 (1+6.8X 10s) 91 3 48.04. X 107s? +6.1X 10s+8.8X 107 SDC1704 400Hz 80 2,95 X 107 (1+.8.2X 1079s) 91 3 48.05 X 1075? + 1.95 X 1055+ 2.95 X 107 CARD MOUNTING All the converters can be mounted on an AC1755 mounting card. This card contains the latches described under the Data Transfer heading, which are necessary to transfer the data on to a computer bus system, and sockets for the converter. The latches have a tri-state output to facilitate ease of use. The AC1755 also contains facilities for the inclusion of in- put signal and reference scaling resistors as described under the heading Resistive Scaling of Inputs. The card uses a 22/22 0.156 pitch edge connector. The pin out is shown below, If it is not required to use the external latches, they can be jumpered on the board. AC1755 MOUNTING CARD Dimensions shown in inches and (mm). 0.4 (10.16) A.B (118.3) nnn ] , bod First Angle | | ! | . * ' ! 0. Projection ' i huge Ueceeeeeeseseeeee ! ul i on | ti aclipy seve 6) ganNnOOnANAANAAL v [67 wo)! sorrom ore en) EDGE CONNECTIONS AC1755 Edge Pin Edge Pin Number Function Letter Function 1 R (Lo) A Tri-State Enable 2 R (Hi) F +15V 3 83 H +15V 4 $2 J -15V 5 $1 K -15V 6 84 L GND 8 VEL M GND 13 BUSY N +5V 15 INHIBIT P +5V 16 BIT 14 T BIT 7 17 BIT 13 uv BIT 6 18 BIT 12 v BIT 5 19 BIT 11 Ww BIT 4 20 BIT 10 x BIT 3 21 BIT 9 Y BIT 2 22 BIT 8 Zz BIT 1 NOTE: SDC1702 does not use pins 16, 17, 18 or 19. SDC1700 does not use pins 16 and 17. ORDERING INFORMATION Parts should be ordered by the appropriate part number (i.e., VOL. Il, 13-54 SYNCHRO & RESOLVER CONVERTERS $DC1700, SDC1702, SDC1704) followed by the appropriate XYZ option code. if the unit is to be a Resolver-to-Digital Converter, the SDC should be replaced by RDC in the part number. The XYZ options are as follows: X signifies the operating temperature range and the options are: X = 5 signifies 0 to +70C (commercial) temperature. X = 6 signifies -55C to +105C (extended) temperature. Y signifies the reference frequency and the options are: Y = 1 signifies 400Hz Y = 2 signifies 60Hz * Y = 4 signifies 2.6kHz Z signifies the input signal and reference voltages and whether the converter is an SDC or an RDC. The options are: Z = 1 signifies synchro, signal 11.8V rms, reference 26V rms Z = 2 signifies synchro, signal 90V rms, reference 115V rms Z = 3 signifies resolver, signal 11.8V rms, reference 11.8V rms Z = 4 signifies resolver, signal 26V rms, reference 26V rms Z = 8 signifies resolver, signal 11.8V rms, reference 26V rms Thus, for example, an SDC1704 with a commercial (0 to +70C) operating range, using a 400Hz, 26V reference with an 11.8V signal would be ordered as an SDC1704511. For other than these options, consult the factory. CAUTIONS Do not reverse the power supplies. Do not connect signal and/or reference inputs to other than $1, $2, $3, $4, Ruy or Ryo. Do not connect signals and/or references to a lower voltage rated converter. (Such as a 115V Synchro into a 26V Con- verter). Misconnections as per the above will damage the units and void the warranty. OTHER PRODUCTS The SDC1700/2/4 converters are just a few of the modules and instruments concerned with Synchro and Resolver con- version manufactured by us. Other products are listed below and technical data is avail- able. If you have any questions about our products, or require advice about the use of them for a particular applica- tion, please contact our Applications Engineering Department. TWO SPEED PROCESSORS Which utilize the digital outputs of two SDCs in a 2 speed coarse/fine system to produce one combined digital word of up to 19 bits in length, The TSL1612 in particular is available for any ratio between 2:1 and 36:1. DIGITAL-TO-SYNCHRO CONVERTERS Resolutions of between 10 and 14 bits are available. BCD OUTPUT SYNCHRO-TO-DIGITAL CONVERTERS The SBCD1752 and SBCD1753 are converters with a BCD instead of a binary output based upon the SDC1700. They have outputs of +180.0 degrees and 0 to 360.0 degrees respectively. *50Hz_Operation For 50Hz operation, a 60Hz converter can be used with no reduction in accuracy.