High Accuracy, Ultralow IQ, 1 A,
anyCAP® Low Dropout Regulator
ADP3338
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2005 Analog Devices, Inc. All rights reserved.
FEATURES
High accuracy over line and load: ±0.8% @ 25°C,
±1.4% over temperature
Ultralow dropout voltage: 190 mV (typ) @ 1 A
Requires only CO = 1.0 µF for stability
anyCAP is stable with any type of capacitor (including MLCC)
Current and thermal limiting
Low noise
2.7 V to 8 V supply range
−40°C to +85°C ambient temperature range
SOT-223 package
APPLICATIONS
Notebook, palmtop computers
SCSI terminators
Battery-powered systems
Bar code scanners
Camcorders, cameras
Home entertainment systems
Networking systems
DSP/ASIC supplies
FUNCTIONAL BLOCK DIAGRAM
THERMAL
PROTECTION CC
IN
ADP3338
OUT
R1
R2
GND
Q1
BANDGAP
REF
DRIVER g
m
02050-001
Figure 1.
V
IN
OUT
ADP3338
1
µ
F
1
µ
F
V
OUT
GND
IN
02050-002
Figure 2. Typical Application Circuit
GENERAL DESCRIPTION
The ADP3338 is a member of the ADP33xx family of precision,
low dropout (LDO), anyCAP voltage regulators. The ADP3338
operates with an input voltage range of 2.7 V to 8 V and delivers
a load current up to 1 A. The ADP3338 stands out from
conventional LDOs with a novel architecture and an enhanced
process that offers performance advantages and higher output
current than its competition. Its patented design requires only a
1 µF output capacitor for stability. This device is insensitive to
output capacitor equivalent series resistance (ESR), and is stable
with any good quality capacitor, including ceramic (MLCC)
types for space-restricted applications. The ADP3338 achieves
exceptional accuracy of ±0.8% at room temperature and ±1.4%
over temperature, line, and load variations. The dropout voltage
of the ADP3338 is only 190 mV (typical) at 1 A. The device also
includes a safety current limit and thermal overload protection.
The ADP3338 has ultralow quiescent current: 110 µA (typical)
in light load situations.
ADP3338
Rev. B | Page 2 of 16
TABLE OF CONTENTS
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Pin Configuration and Function Descriptions............................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ........................................................................ 9
Application Information................................................................ 10
Capacitor Selection .................................................................... 10
Output Current Limit ................................................................ 10
Thermal Overload Protection .................................................. 10
Calculating Power Dissipation ................................................. 10
Printed Circuit Board Layout Considerations ....................... 10
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 13
REVISION HISTORY
6/05—Data Sheet Changed from Rev. A to Rev. B
Added Pin Function Descriptions Table ....................................... 5
Changes to Ordering Guide .......................................................... 13
6/04—Data Sheet Changed from Rev. 0 to Rev. A
Updated Format..............................................................Universal
Changes to Figures 5, 11, 12, 13, 14, 15 ..................................... 6
Updated Outline Dimensions................................................... 12
Changes to Ordering Guide ...................................................... 12
6/01—Rev. 0: Initial Version
ADP3338
Rev. B | Page 3 of 16
SPECIFICATIONS
VIN = 6.0 V, CIN = COUT = 1 µF, TJ = −40°C to +125°C, unless otherwise noted.
Table 1.
Parameter1, , 2 3 Symbol Conditions Min Typ Max Unit
OUTPUT
Voltage Accuracy VOUT VIN = VOUTNOM + 0.4 V to 8 V, IL = 0.1 mA to 1 A, TJ = 25°C −0.8 +0.8 %
V
IN = VOUTNOM + 0.4 V to 8 V, IL = 0.1 mA to 1 A, TJ = −40°C to +125°C −1.4 +1.4 %
V
IN = VOUTNOM + 0.4 V to 8 V, IL = 50 mA to 1 A, TJ = 150°C −1.6 +1.6 %
Line Regulation VIN = VOUTNOM + 0.4 V to 8 V, TJ = 25°C 0.04 mV/V
Load Regulation IL = 0.1 mA to 1 A, TJ = 25°C 0.006 mV/mA
Dropout Voltage VDROP VOUT = 98% of VOUTNOM
I
L = 1 A 190 400 mV
I
L = 500 mA 125 200 mV
I
L = 100 mA 70 150 mV
Peak Load Current ILDPK VIN = VOUTNOM + 1 V 1.6 A
Output Noise VNOISE f = 10 Hz to 100 kHz, CL = 10 µF, IL = 1 A 95 µV rms
GROUND CURRENT
In Regulation IGND IL = 1 A 9 30 mA
I
L = 500 mA 4.5 15 mA
I
L = 100 mA 0.9 3 mA
I
L = 0.1 mA 110 190 µA
In Dropout IGND VIN = VOUTNOM – 100 mV, IL = 0.1 mA 190 600 µA
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.
2 Application stable with no load.
3 VIN = 2.7 V for models with VOUTNOM ≤ 2.2 V.
ADP3338
Rev. B | Page 4 of 16
ABSOLUTE MAXIMUM RATINGS
Unless otherwise specified, all voltages are referenced to GND.
Table 2.
Parameter Rating
Input Supply Voltage −0.3 V to +8.5 V
Power Dissipation Internally limited
Operating Ambient Temperature Range −40°C to +85°C
Operating Junction Temperature Range −40°C to +150°C
θJA 62.3°C/W
θJC 26.8°C/W
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering 10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating may be applied at any one
time.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
ADP3338
Rev. B | Page 5 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
02050-003
IN
3
OUT
22
GND
1
OUT
ADP3338
TOP VIEW
(Not to Scale)
NOTE: PIN 2 AND TAB ARE INTERNALLY CONNECTED
Figure 3. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 GND Ground Pin.
2 OUT Regulator Output. Bypass to ground with a 1 µF or larger capacitor.
3 IN Regulator Input. Bypass to ground with a 1 µF or larger capacitor.
ADP3338
Rev. B | Page 6 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, unless otherwise noted.
I
L
= 0A
INPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
2.515
2.510
2.490 2.5 4.5 6.5 8.0
2.505
2.500
2.495
I
L
= 1A
V
OUT
= 2.5V
02050-004
I
L
= 0.5A
Figure 4. Line Regulation Output Voltage vs. Input Voltage
OUTPUT VOLTAGE (V)
2.504
2.503
2.499
2.502
2.501
2.500
2.498
2.497
2.496
2.495
02050-005
LOAD CURRENT (A)
0 0.8 1.00.60.40.2
V
IN
= 6V
Figure 5. Output Voltage vs. Load Current
INPUT VOLTAGE (V)
GROUND CURRENT (
µ
A)
0048
50
100
150
200
250
300
02050-006
V
OUT
= 2.5V
I
LOAD
= 0A
26
Figure 6. Ground Current vs. Supply Voltage
OUTPUT LOAD (A)
GROUND CURRENT (mA)
00 0.2 0.4 0.6 0.8
V
OUT
= 2.5V
V
IN
= 6V
1.0
2
4
6
8
10
12
02050-007
Figure 7. Ground Current vs. Load Current
I
L
= 0A
I
L
= 0.5A
I
L
= 1A
V
OUT
= 2.5V
V
IN
= 6V
I
L
= 0.3A
I
L
= 0.7A
JUNCTION TEMPERATURE (
°
C)
OUTPUT VOLTAGE (%)
–0.05
–40 –20 0 20 40 60 80 100 120
0
0.1
0.2
0.3
0.4
02050-008
Figure 8. Output Voltage Variation % vs. Junction Temperature
JUNCTION TEMPERATURE (°C)
GROUND CURRENT (mA)
0–40
4
I
LOAD
= 700mA
I
LOAD
= 500mA
I
LOAD
= 300mA
I
LOAD
= 1A
–20 0 20 40 60 80 100 120 140 160
6
8
10
12
14
16
18
2
02050-009
Figure 9. Ground Current vs. Junction Temperature
ADP3338
Rev. B | Page 7 of 16
LOAD CURRENT (A)
DROPOUT (mV)
250
200
00 0.2 1.0
0.4 0.6 0.8
150
100
50
V
OUT
= 2.5V
02050-010
Figure 10. Dropout Voltage vs. Load Current
0 56789
TIME (sec)
V
OUT
= 2.5V
I
LOAD
= 1A
INPUT/OUTPUT VOLTAGE (V)
0
1
2
3
02050-011
123410
Figure 11. Power-Up/Power-Down
3.5
8040 TIME (µs)
V
OUT
= 2.5V
C
OUT
= 1µF
I
LOAD
= 1A
120 160 200 240
4.5
2.50
2.49
2.51
VOLTS
02050-012
Figure 12. Line Transient Response
3.5
8040
TIME (
µ
s)
VOUT = 2.5V
COUT = 10µF
ILOAD = 1A
120 160 200 240
4.5
2.50
2.49
2.51
VOLTS
02050-013
Figure 13. Line Transient Response
0
2000
TIME (
µ
s)
400 600 800 1000
1
2.5
2.4
2.6
VOLTS
02050-014
A
V
IN
= 6V
C
OUT
= 1
µ
F
Figure 14. Load Transient Response
0
2000
TIME (
µ
s)
400 600 800 1000
1
2.5
2.4
2.6
VOLTS
02050-015
A
V
IN
= 6V
C
OUT
= 10
µ
F
Figure 15. Load Transient Response
ADP3338
Rev. B | Page 8 of 16
VIN = 6V
400mΩ
SHORT FULL SHORT
0
0.4
TIME (s)
0.6 0.8 1.0
0.5
0
2.5
VOLTS
02050-016
A
1.0
1.5
Figure 16. Short-Circuit Current
FREQUENCY (Hz)
10 100 1k 10k 100k 1M
V
OUT
= 2.5V
C
L
= 10
µ
F
I
L
= 1A
–80
–70
–60
–50
–40
–30
–20
–10
–90
–100
0
RIPPLE REJECTION (dB)
02050-017
C
L
= 1
µ
F
I
L
= 1A
C
L
= 10
µ
F
I
L
= 0
C
L
= 1
µ
F
I
L
= 0
Figure 17. Power Supply Ripple Rejection
C
L
(
µ
F)
RMS NOISE (
µ
V)
250
200
0010
5020 30 40
150
100
50
300
I
L
= 1A
I
L
= 0A
02050-018
Figure 18. RMS Noise vs. CL
FREQUENCY (Hz)
10 100 1k 10k 100k 1M
C
L
= 1µF
0.001
0.01
0.1
1
10
100
C
L
= 10µF
VOLTAGE NOISE SPECTRAL DENSITY (µV/√Hz)
02050-019
Figure 19. Output Noise Density (10 Hz to 100 kHz)
ADP3338
Rev. B | Page 9 of 16
THEORY OF OPERATION
The ADP3338 anyCAP LDO uses a single control loop for
regulation and reference functions. The output voltage is sensed
by a resistive voltage divider, consisting of R1 and R2, which is
varied to provide the available output voltage option. Feedback
is taken from this network by way of a series diode (D1) and a
second resistor divider (R3 and R4) to the input of an amplifier.
A very high gain error amplifier is used to control this loop. The
amplifier is constructed in such a way that equilibrium produces
a large, temperature-proportional input offset voltage that is
repeatable and very well controlled. The temperature-propor-
tional offset voltage is combined with the complementary diode
voltage to form a virtual band gap voltage that is implicit in the
network, although it never appears explicitly in the circuit.
Ultimately, this patented design makes it possible to control the
loop with only one amplifier. This technique also improves the
noise characteristics of the amplifier by providing more flexi-
bility on the trade off of noise sources that leads to a low noise
design.
The R1, R2 divider is chosen in the same ratio as the band gap
voltage to the output voltage. Although the R1, R2 resistor
divider is loaded by Diode D1 and a second divider consisting
of R3 and R4, the values can be chosen to produce a tempera-
ture-stable output. This unique arrangement specifically corrects
for the loading of the divider, thus avoiding the error resulting
from base current loading in conventional circuits.
The patented amplifier controls a new and unique noninverting
driver that drives the pass transistor, Q1. The use of this special
noninverting driver enables the frequency compensation to
include the load capacitor in a pole-splitting arrangement to
achieve reduced sensitivity to the value, type, and ESR of the
load capacitance.
Most LDOs place very strict requirements on the range of ESR
values for the output capacitor because they are difficult to
stabilize due to the uncertainty of load capacitance and resis-
tance. Moreover, the ESR value required to keep conventional
LDOs stable changes depending on load and temperature.
These ESR limitations make designing with LDOs more
difficult because of their unclear specifications and extreme
variations over temperature.
With the ADP3338 anyCAP LDO, this is no longer true. It can
be used with virtually any good quality capacitor, with no
constraint on the minimum ESR. This innovative design
provides circuit stability with just a small 1 µF capacitor on the
output. Additional advantages of the pole-splitting scheme
include superior line noise rejection and very high regulator
gain to achieve excellent line and load regulation. An impressive
±1.4% accuracy is guaranteed over line, load, and temperature.
Additional features of the circuit include current limit and
thermal shutdown.
V
IN
OUT
ADP3338
C1
1
µ
FC2
1
µ
F
V
OUT
GNDIN
02050-021
Figure 20. Typical Application Circuit
PTAT
V
OS
g
m
NONINVERTING
WIDEBAND
DRIVER
INPUT
Q1
ADP3338
COMPENSATION
CAPACITOR ATTENUATION
(V
BANDGAP
/V
OUT
)R1
D1
R2
R3
R4
OUTPUT
PTAT
CURRENT
(a)
GND
C
LOAD
R
LOAD
02050-020
Figure 21. Functional Block Diagram
ADP3338
Rev. B | Page 10 of 16
APPLICATION INFORMATION
CAPACITOR SELECTION
Output Capacitor
The stability and transient response of the LDO is a function of
the output capacitor. The ADP3338 is stable with a wide range
of capacitor values, types, and ESR (anyCAP). A capacitor as
low as 1 µF is the only requirement for stability. A higher ca-
pacitance may be necessary if high output current surges are
anticipated, or if the output capacitor cannot be located near the
output and ground pins. The ADP3338 is stable with extremely
low ESR capacitors (ESR ≈ 0) such as multilayer ceramic capacitors
(MLCC) or OSCON. Note that the effective capacitance of some
capacitor types falls below the minimum over temperature or
with dc voltage.
Input Capacitor
An input bypass capacitor is not strictly required, but is recom-
mended in any application involving long input wires or high
source impedance. Connecting a 1 µF capacitor from the input
to ground reduces the sensitivity of the circuit to PC board
layout and input transients. If a larger output capacitor is
necessary, a larger value input capacitor is recommended.
OUTPUT CURRENT LIMIT
The ADP3338 is short-circuit protected by limiting the pass
transistor’s base drive current. The maximum output current is
limited to approximately 2 A (see Figure 16).
THERMAL OVERLOAD PROTECTION
The ADP3338 is protected against damage due to excessive
power dissipation by its thermal overload protection circuit.
Thermal protection limits the die temperature to a maximum of
160°C. Under extreme conditions, such as high ambient
temperature and power dissipation where the die temperature
starts to rise above 160°C, the output current is reduced until
the die temperature has dropped to a safe level.
Current and thermal limit protections are intended to protect
the device against accidental overload conditions. For normal
operation, externally limit the power dissipation of the device
so the junction temperature does not exceed 150°C.
CALCULATING POWER DISSIPATION
Device power dissipation is calculated as
PD = (VIN – VOUT) × ILOAD + (VIN × IGND)
Where ILOAD and IGND are load current and ground current, and
VIN and VOUT are the input and output voltages, respectively.
Assuming the worst-case operating conditions are ILOAD = 1.0 A,
IGND = 10 mA, VIN = 3.3 V, and VOUT = 2.5 V, the device power
dissipation is
PD = (3.3 V – 2.5 V) × 1000 mA + (3.3 V × 10 mA) = 833 mW
So, for a junction temperature of 125°C and a maximum
ambient temperature of 85°C, the required thermal resistance
from junction to ambient is
C/W48
W833.0
C85C125 °=
°−°
=θJA
PRINTED CIRCUIT BOARD LAYOUT
CONSIDERATIONS
The thermal resistance, θJA, of the SOT-223 is determined by the
sum of the junction-to-case and the case-to-ambient thermal
resistances. The junction-to-case thermal resistance, θJC, is
determined by the package design and is specified at 26.8°C/W.
However, the case-to-ambient thermal resistance is determined
by the printed circuit board design.
As shown in Figure 22, the amount of copper to which the
ADP3338 is mounted affects thermal performance. When
mounted to the minimal pads of 2 oz. copper, as shown in
Figure 22 (a), θJA is 126.6°C/W. Adding a small copper pad
under the ADP3338, as shown in Figure 22 (b), reduces the θJA to
102.9°C/W. Increasing the copper pad to one square inch, as
shown in Figure 22 (c), reduces the θJA even further to 52.8°C/W.
02050-022
cab
Figure 22. PCB Layouts
ADP3338
Rev. B | Page 11 of 16
Use the following general guidelines when designing printed
circuit boards:
• Keep the output capacitor as close as possible to the output
and ground pins.
• Keep the input capacitor as close as possible to the input
and ground pins.
• Specify thick copper and use wide traces for optimum heat
transfer. PC board traces with larger cross sectional areas
remove more heat from the ADP3338.
• Decrease thermal resistance by adding a copper pad under
the ADP3338, as shown in Figure 22 (b).
• Use the adjacent area to the ADP3338 to add more copper
around it. Connecting the copper area to the output of the
ADP3338, as shown in Figure 22 (c), is best, but thermal
performance will be improved even if it is connected to
other signals.
• Use additional copper layers or planes to reduce the
thermal resistance. Again, connecting the other layers to
the output of the ADP3338 is best, but is not necessary.
When connecting the output pad to other layers, use
multiple vias.
ADP3338
Rev. B | Page 12 of 16
OUTLINE DIMENSIONS
SEATING
PLANE
4.60 BSC 10° MAX
16°
10°
16°
10°
321
2.30
BSC
0.84
0.76
0.66
6.50 BSC
1.70
1.60
1.50
1.05
0.85
0.10
0.02
1.30
1.10 0.35
0.30
0.23
3.10
3.00
2.90
3.70
3.50
3.30
7.30
7.00
6.70
COMPLIANT TO JEDEC STANDARDS TO-261-AA
Figure 23. 3-Lead Small Outline Transistor Package [SOT-223]
(KC-3)
Dimensions shown in millimeters
ADP3338
Rev. B | Page 13 of 16
ORDERING GUIDE
Model Temperature Range Output Voltage (V) Package Option Package Description
ADP3338AKC-1.5-RL –40°C to +85°C 1.5 KC-3 3-Lead SOT-223
ADP3338AKC-1.5-RL7 –40°C to +85°C 1.5 KC-3 3-Lead SOT-223
ADP3338AKCZ-1.5-RL1–40°C to +85°C 1.5 KC-3 3-Lead SOT-223
ADP3338AKCZ-1.5-RL71 –40°C to +85°C 1.5 KC-3 3-Lead SOT-223
ADP3338AKC-1.8-RL –40°C to +85°C 1.8 KC-3 3-Lead SOT-223
ADP3338AKC-1.8-RL7 –40°C to +85°C 1.8 KC-3 3-Lead SOT-223
ADP3338AKCZ-1.8-RL1 –40°C to +85°C 1.8 KC-3 3-Lead SOT-223
ADP3338AKCZ-1.8-R71 –40°C to +85°C 1.8 KC-3 3-Lead SOT-223
ADP3338AKC-2.5-RL –40°C to +85°C 2.5 KC-3 3-Lead SOT-223
ADP3338AKC-2.5-RL7 –40°C to +85°C 2.5 KC-3 3-Lead SOT-223
ADP3338AKCZ-2.5-RL1 –40°C to +85°C 2.5 KC-3 3-Lead SOT-223
ADP3338AKCZ-2.5RL71 –40°C to +85°C 2.5 KC-3 3-Lead SOT-223
ADP3338AKC-2.85-RL –40°C to +85°C 2.85 KC-3 3-Lead SOT-223
ADP3338AKC-2.85-RL7 –40°C to +85°C 2.85 KC-3 3-Lead SOT-223
ADP3338AKCZ-2.85R71 –40°C to +85°C 2.85 KC-3 3-Lead SOT-223
ADP3338AKC-3-RL –40°C to +85°C 3.0 KC-3 3-Lead SOT-223
ADP3338AKC-3-RL7 –40°C to +85°C 3.0 KC-3 3-Lead SOT-223
ADP3338AKCZ-3-RL71 –40°C to +85°C 3.0 KC-3 3-Lead SOT-223
ADP3338AKC-3.3-RL –40°C to +85°C 3.3 KC-3 3-Lead SOT-223
ADP3338AKC-3.3-RL7 –40°C to +85°C 3.3 KC-3 3-Lead SOT-223
ADP3338AKCZ-3.3-RL1 –40°C to +85°C 3.3 KC-3 3-Lead SOT-223
ADP3338AKCZ-3.3RL71 –40°C to +85°C 3.3 KC-3 3-Lead SOT-223
ADP3338AKC-5-REEL –40°C to +85°C 5 KC-3 3-Lead SOT-223
ADP3338AKC-5-REEL7 –40°C to +85°C 5 KC-3 3-Lead SOT-223
ADP3338AKCZ-5-REEL1 –40°C to +85°C 5 KC-3 3-Lead SOT-223
ADP3338AKCZ-5-R71 –40°C to +85°C 5 KC-3 3-Lead SOT-223
1 Z = Pb-free part.
ADP3338
Rev. B | Page 14 of 16
NOTES
ADP3338
Rev. B | Page 15 of 16
NOTES
ADP3338
Rev. B | Page 16 of 16
NOTES
© 2005 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C02050–0–6/05(B)
