NCV4276CDS33R4G - ON Semiconductor

August, 2018 − Rev. 1 1Publication Order Number:

NCV4276C/D

NCV4276C

400 mA Low-Drop Voltage

Regulator

The NCV4276C is a 400 mA output current integrated low dropout

regulator family designed for use in harsh automotive environments.

It includes wide operating temperature and input voltage ranges. The

device is offered with 3.3 V, 5.0 V, and adjustable voltage versions

available in 2% output voltage accuracy. It has a high peak input

voltage tolerance and reverse input voltage protection. It also

provides overcurrent protection, overtemperature protection and

inhibit for control of the state of the output voltage. The NCV4276C

family is available in DPAK and D2PAK surface mount packages.

The output is stable over a wide output capacitance and ESR range.

The NCV4276C has improved startup behavior during input voltage

transients.

The NCV4276C is pin for pin compatible with NCV4276B.

Features

•3.3 V, 5.0 V, and Adjustable Voltage Version (from 2.5 V to 20 V)

±2% Output Voltage

•400 mA Output Current

•500 mV (max) Dropout Voltage (5.0 V Output)

•Inhibit Input

•Very Low Current Consumption

•Fault Protection

♦+45 V Peak Transient Voltage

♦−42 V Reverse Voltage

♦Short Circuit

♦Thermal Overload

•NCV Prefix for Automotive and Other Applications Requiring

Unique Site and Control Change Requirements; AEC−Q100

Qualified and PPAP Capable

•These are Pb−Free Devices

D2PAK

5−PIN

DS SUFFIX

CASE 936A

DPAK

5−PIN

DT SUFFIX

CASE 175AA

See detailed ordering and shipping information in the ordering

information section on page 14 of this data sheet.

ORDERING INFORMATION

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76CXXG

ALYWW

V4276C−XX

AWLYWWG

MARKING

DIAGRAMS

A = Assembly Location

WL, L = Wafer Lot

Y = Year

WW = W ork Week

G = Pb−Free Device

XX = 33 (3.3 V)

= 50 (5.0 V)

= AJ (Adj. Voltage)

*Tab is connected to Pin 3 on all packages.

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−

INH

GND

Current Limit and

Saturation Sense

Bandgap

Reference

Thermal

Shutdown

Figure 1. NCV4276C Block Diagram

Error

Amplifier

−

INH

GND

Current Limit and

Saturation Sense

Bandgap

Reference

Thermal

Shutdown

Figure 2. NCV4276C Adjustable Block Diagram

Error

Amplifier

PIN FUNCTION DESCRIPTION

Pin No. Symbol Description

1 I Input; Battery Supply Input Voltage.

2 INH Inhibit; Set low−to inhibit.

3 GND Ground; Pin 3 internally connected to heatsink.

4NC / VA Not connected for fixed voltage version / Voltage Adjust Input for adjustable voltage version; use an external

voltage divider to set the output voltage

5 Q Output: Bypass with a capacitor to GND. See Figures 3 to 8 and Regulator Stability Considerations section.

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MAXIMUM RATINGS

Rating Symbol Min Max Unit

Input Voltage VI−42 45 V

Input Peak Transient Voltage VI− 45 V

Inhibit INH Voltage VINH −42 45 V

Voltage Adjust Input VA VVA −0.3 10 V

Output Voltage VQ−1.0 40 V

Ground Current Iq− 100 mA

Input Voltage Operating Range (Note 1) VIVQ + 0.5 V or 4.5 V

(Note 2) 40 V

ESD Susceptibility (Human Body Model)

(Machine Model)

(Charged Device Model)

−

4.0

250

1.25

−

Junction Temperature TJ−40 150 °C

Storage Temperature Tstg −50 150 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

1. Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond

the Recommended Operating Ranges limits may af fect device reliability.

2. Minimum VI = 4.5 V or (VQ + 0.5 V), whichever is higher.

LEAD TEMPERATURE SOLDERING REFLOW (Note 3)

Lead Temperature Soldering

Reflow (SMD styles only), Leaded, 60−150 s above 183, 30 s max at peak

Reflow (SMD styles only), Lead Free, 60−150 s above 217, 40 s max at peak

W ave Solder (through hole styles only), 12 sec max

TSLD −

−

240

265

310

°C

3. Per IPC / JEDEC J−STD−020C.

THERMAL CHARACTERISTICS

Characteristic Test Conditions (Typical Value) Unit

DPAK 5−PIN PACKAGE

Min Pad Board (Note 4) 1, Pad Board (Note 5)

Junction−to−Tab (psi−JLx, yJLx) 3.8 4.3 C/W

Junction−to−Ambient (RqJA, qJA) 75.1 58.5 C/W

D2PAK 5−PIN PACKAGE

0.4 sq. in. Spreader Board (Note 6) 1.2 sq. in. Spreader Board (Note 7)

Junction−to−Tab (psi−JLx, yJLx) 5.4 5.4 C/W

Junction−to−Ambient (RqJA, qJA) 54.2 43.3 C/W

4. 1 oz. copper , 0.26 inch2 (168 mm2) copper area, 0.062″ thick FR4.

5. 1 oz. copper , 1.14 inch2 (736 mm2) copper area, 0.062″ thick FR4.

6. 1 oz. copper , 0.373 inch2 (241 mm2) copper area, 0.062″ thick FR4.

7. 1 oz. copper , 1.222 inch2 (788 mm2) copper area, 0.062″ thick FR4.

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ELECTRICAL CHARACTERISTICS (VI = 13.5 V; −40°C < TJ < 150°C; unless otherwise noted.)

Characteristic Symbol Test Conditions Min Typ Max Unit

OUTPUT

Output Voltage, 5.0 V Version VQ5.0 mA < IQ < 400 mA,

6.0 V < VI < 28 V 4.9 5.0 5.1 V

Output Voltage, 5.0 V Version VQ5.0 mA < IQ < 200 mA,

6.0 V < VI < 40 V 4.9 5.0 5.1 V

Output Voltage, 3.3 V Version VQ5.0 mA < IQ < 400 mA,

4.5 V < VI < 28 V 3.234 3.3 3.366 V

Output Voltage, 3.3 V Version VQ5.0 mA < IQ < 200 mA,

4.5 V < VI < 40 V 3.234 3.3 3.366 V

Output Voltage, Adjustable Version AVQ5.0 mA < IQ < 400 mA

VQ+1 < VI < 40 V

VI > 4.5 V

−2% − +2% V

Output Current Limitation IQVQ = 90% VQTYP

(VQTYP = 2.5 V for ADJ version) 400 600 1100 mA

Quiescent Current (Sleep Mode)

Iq = II − IQIqVINH = 0 V − − 10 mA

Quiescent Current, Iq = II − IQIqIQ = 1.0 mA − 95 200 mA

Quiescent Current, Iq = II − IQIqIQ = 250 mA − 5 15 mA

Quiescent Current, Iq = II − IQIqIQ = 400 mA − 10 35 mA

Dropout Voltage,

Adjustable Version

VDR IQ = 250 mA,

VDR = VI − VQ

VI > 4.5 V − 250 500 mV

Dropout Voltage (5.0 V Version) VDR IQ = 250 mA (Note 8) − 250 500 mV

Load Regulation DVQ,LO IQ = 5.0 mA to 400 mA − 3.0 20 mV

Line Regulation DVQDVI = 12 V to 32 V,

IQ = 5.0 mA − 4.0 15 mV

Power Supply Ripple Rejection PSRR fr = 100 Hz, Vr = 0.5 V PP − 70 − dB

INHIBIT

Inhibit Voltage, Output High VINH VQ w VQMIN − 2.3 2.8 V

Inhibit Voltage, Output Low (Off) VINH VQ v 0.1 V 1.8 2.2 − V

Input Current IINH VINH = 5.0 V 5.0 10 20 mA

THERMAL SHUTDOWN

Thermal Shutdown Temperature (Note 9) TSD IQ = 5.0 mA 150 − 210 °C

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

8. Measured when the output voltage VQ has dropped 100 mV from the nominal valued obtained at V = 13.5 V.

9. Guaranteed by design, not tested in production.

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5.5 − 45 V

Input CI1

1.0 mFCI2

100 nF

III

INH

3GND

22 mF

Output

Figure 3. Applications Circuit; Fixed Voltage Version

NCV4276C

IINH

Input CI1

1.0 mFCI2

100 nF

III

INH

3GND

22 mF

Output

Figure 4. Applications Circuit; Adjustable Voltage Version

NCV4276C

IINH

VQ = [(R1 + R2) * V ref] / R2

Cb*

Cb* − Required if usage of low ESR output capacitor CQ is demand, see Regulator Stability Considerations section

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TYPICAL PERFORMANCE CHARACTERISTICS

0.01

0.1

0 150 250 35050 100 200 300 400

ESR (W)

Stable Region

IQ, OUTPUT CURRENT (mA)

Unstable Region

Figure 5. Output Stability with Output Capacitor

ESR, Fixed Versions (5.0 V and 3.3 V)

0.01

0.1

100

IQ, OUTPUT CURRENT (mA)

ESR (W)

Stable Region

0 150 250 35050

CQ = 10 mF

100 200 300 400

Figure 6. Output Stability with Output Capacitor

ESR, Fixed Versions (5.0 V and 3.3 V)

ESR (W)

Figure 7. Output Stability with Output Capacitor

ESR, Adjustable Version

Unstable Region

0.01

0.1

100

IQ, OUTPUT CURRENT (mA)

Stable Region

0 150 250 35050 100 200 300 400

Unstable Region

Cb capacitor not connected

Figure 8. Output Stability with Output Capacitor

ESR, Adjustable Version

CQ = 22 mF

0.01

0.1

1000

0 150 250 35050 100 200 300 400

ESR (W)

Stable Region

IQ, OUTPUT CURRENT (mA)

Unstable Region

Cb capacitor not connected

CQ = 22 mF

VQ = 2.5 V

100 CQ = 22 mF

VQ = 6 V VQ = 12 V

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TYPICAL PERFORMANCE CHARACTERISTICS − Fixed Versions

TJ, JUNCTION TEMPERATURE (°C)

VI, INPUT VOLTAGE (V)

16012080400−40

4.90

4.95

5.00

5.05

5.10

1086420

VQ, OUTPUT VOLT AGE (V)

VI = 13.5 V

RL = 1 kW

VQ, OUTPUT VOLT AGE (V)

TJ = 25°C

RL = 20 W

VI, INPUT VOLTAGE (V)

403020100

Iq, QUIESCENT CURRENT (mA)

TJ = 25°C

RL = 20 W

Figure 9. Output Voltage vs.

Junction Temperature, 5.0 V Version

TJ, JUNCTION TEMPERATURE (°C)

VI, INPUT VOLTAGE (V)

16012080400−40

3.24

3.28

3.30

3.34

3.36

403020100

VQ, OUTPUT VOLT AGE (V)

VI = 13.5 V

RL = 660 W

Iq, QUIESCENT CURRENT (mA)

TJ = 25°C

RL = 20 W

VI, INPUT VOLTAGE (V)

1043210

VQ, OUTPUT VOLT AGE (V)

TJ = 25°C

RL = 20 W

Figure 10. Output Voltage vs.

Junction Temperature, 3.3 V Version

Figure 11. Quiescent Current vs.

Input Voltage, 5.0 V Version Figure 12. Quiescent Current vs. Input Voltage,

3.3 V Version

3.32

3.26

Figure 13. Output Voltage vs. Input Voltage,

5.0 V Version Figure 14. Output Voltage vs. Input Voltage,

3.3 V Version

5352515

3525155

97531 6789

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TYPICAL PERFORMANCE CHARACTERISTICS − Fixed Versions

IQ, OUTPUT CURRENT (mA)

4003002001000

100

150

200

300

350

400

VDR, DROPOUT VOLTAGE (mV)

TJ = 125°C

TJ = 25°C

VI, INPUT VOLTAGE (V)

50200−40−50

−1.2

−0.8

−0.4

0.4

0.8

1.6

II, INPUT CURRENT (mA)

RL = 6.8 kW

TJ = 25°C

1.2

VI, INPUT VOLTAGE (V)

45403020100

200

400

600

700

IQ, OUTPUT CURRENT (mA)

TJ = 25°C

VQ = 0 V

Figure 15. Input Current vs. Input Voltage,

5.0 V Version

IQ, OUTPUT CURRENT (mA)

6005004003002001000

IQ, OUTPUT CURRENT (mA)

50403020100

0.1

0.2

0.3

0.4

0.5

Iq, QUIESCENT CURRENT (mA)

VI = 13.5 V

TJ = 25°C

Iq, QUIESCENT CURRENT (mA)

VI, INPUT VOLTAGE (V)

50200−40−50

−1.0

−0.8

−0.4

0.2

0.4

0.8

II, INPUT CURRENT (mA)

RL = 6.8 kW

TJ = 25°C

−0.2

Figure 16. Input Current vs. Input Voltage,

3.3 V Version

Figure 17. Dropout Voltage vs. Output Current,

Only 5 V Version Figure 18. Maximum Output Current vs.

Input Voltage

Figure 19. Quiescent Current vs.

Output Current (High Load) Figure 20. Quiescent Current vs.

Output Current (Low Load)

VI = 13.5 V

TJ = 25°C

−30 −20 −10 10 4030 −30 −20 −10 10 30 40

−0.6

0.6

250

35025015050

100

300

500

3525155

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TYPICAL PERFORMANCE CHARACTERISTICS − Adjustable Version

2.45

2.46

2.47

2.51

2.55

−40 0 40 80 120 160

TJ, JUNCTION TEMPERATURE (°C)

, OUTPUT VOLTAGE (V)

0246810

VI, INPUT VOLTAGE (V)

, OUTPUT VOLTAGE (V)

TJ = 25°C

RL = 20 W

Figure 21. Output Voltage vs.

Junction Temperature

2.48

2.49

2.50

2.52

2.53

2.54

0.5

1.0

1.5

2.0

3.0

5.0

01020304

VI, INPUT VOLTAGE (V)

TJ = 25°C

RL = 20 W

Figure 22. Quiescent Current vs.

Input Voltage

3.5

4.0

2.5

4.5

−1.0

−0.8

−0.2

0.6

−50 −40 0 10

VI, INPUT VOLTAGE (V)

II, INPUT CURRENT (mA)

TJ = 25°C

RL = 6.8 kW

−0.6

−0.4

0.2

0.4

Figure 23. Output Voltage vs. Input Voltage Figure 24. Input Current vs. Input Voltage

Iq, QUIESCENT CURRENT (mA)

VI = 13.5 V

RL = 500 W

13579 −30 −20 −10 20 30 40

5152535

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TYPICAL PERFORMANCE CHARACTERISTICS − Adjustable Version

0.1

0.2

0.5

010203040

IQ, OUTPUT CURRENT (mA)

TJ = 25°C

150

200

250

350

400

0 50 100 150 350 400

IQ, OUTPUT CURRENT (mA)

VDR, DROPOUT VOLTAGE (mV)

TJ = 25°C

VI = 13.5 V

Figure 25. Dropout Voltage vs. Output Current,

Output Voltage set to 5.0 V

0.3

0.4

200 250 300

TJ = 125°C

100

200

300

400

500

01020304045

VI, INPUT VOLTAGE (V)

IQ, OUTPUT CURRENT (mA)

TJ = 25°C

VQ = 0 V

Figure 26. Maximum Output Current vs.

Input Voltage

600

700

0 100 200 300 400

IQ, OUTPUT CURRENT (mA)

Iq, QUIESCENT CURRENT (mA)

TJ = 25°C

VI = 13.5 V

Figure 27. Quiescent Current vs.

Output Current (High Load)

500 600

Figure 28. Quiescent Current vs.

Output Current (Low Load)

Iq, QUIESCENT CURRENT (mA)

100

300

15 25 355

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Circuit Description

The NCV4276C is an integrated low dropout regulator

that provides a regulated voltage at 400 mA to the output.

It is enabled with an input to the inhibit pin. The regulator

voltage is provided by a PNP pass transistor controlled by

an error amplifier with a bandgap reference, which gives it

the lowest possible dropout voltage. The output current

capability is 400 mA, and the base drive quiescent current

is controlled to prevent oversaturation when the input

voltage is low or when the output is overloaded. The

regulator is protected by both current limit and thermal

shutdown. Thermal shutdown occurs above 150°C to

protect the IC during overloads and extreme ambient

temperatures.

Regulator

The error amplifier compares the reference voltage to a

sample of the output voltage (VQ) and drives the base of a

PNP series pass transistor via a buffer. The reference is a

bandgap design to give it a temperature−stable output.

Saturation control of the PNP is a function of the load

current and input voltage. Oversaturation of the output

power device is prevented, and quiescent current in the

ground pin is minimized. See Figure 4, Test Circuit, for

circuit element nomenclature illustration.

Regulator Stability Considerations

The input capacitors (CI1 and CI2) are necessary to

stabilize the input impedance to avoid voltage line

influences. Using a resistor of approximately 1.0 W in

series with CI2 can stop potential oscillations caused by

stray inductance and capacitance.

The output capacitor helps determine three main

characteristics of a linear regulator: startup delay, load

transient response and loop stability. The capacitor value

and type should be based on cost, availability, size and

temperature constraints. The aluminum electrolytic

capacitor is the least expensive solution, but, if the circuit

operates at low temperatures (−25°C to −40°C), both the

value and ESR of the capacitor will vary considerably. The

capacitor manufacturer’s data sheet usually provides this

information.

The value for the output capacitor CQ, shown in Figure 3,

should work for most applications; see also Figures 5 to 8

for output stability at various load and Output Capacitor

ESR conditions. Stable region of ESR in Figures 5 to 8

shows ESR values at which the LDO output voltage does

not have any permanent oscillations at any dynamic

changes of output load current. Marginal ESR is the value

at which the output voltage waving is fully damped during

four periods after the load change and no oscillation is

further observable.

ESR characteristics were measured with ceramic

capacitors and additional series resistors to emulate ESR.

Low duty cycle pulse load current technique has been used

to maintain junction temperature close to ambient

temperature.

Minimum ESR for CQ = 10 mF and 22 mF is native ESR

of ceramic capacitor with which the fixed output voltage

devices are performing stable. Murata ceramic capacitors

were used,

GCM32ER71E106KA57 (10 mF, 25V, X7R, 1210),

GRM32ER71E226ME15 (22 mF, 25V, X7R, 1210).

Calculating Bypass Capacitor

If usage of low ESR ceramic capacitors is demand in case

of Adjustable Regulator, connect the bypass capacitor Cb

between Voltage Adjust pin and Q pin according to

Applications circuit at Figure 4.

Parallel combination of bypass capacitor Cb with the

feedback resistor R1 contributes in the device transfer

function as an additional zero and affects the device loop

stability, therefore its value must be optimized. Attention

to the Output Capacitor value and its ESR must be paid. See

also Stability in High Speed Linear LDO Regulators

Application Note, AND8037/D for more information.

Optimal value of bypass capacitor is given by following

expression

Cb+1

2 p fz R1@(F)

where

R1 = the upper feedback resistor

fz = the frequency of the zero added into the device

transfer function by R1 and Cb external components.

Set the R1 resistor according to output voltage

requirement. Chose the fz with regard on the output

capacitance CQ, refer to the table below.

CQ (mF) 10 22 47

fz Range (kHz) 16 − 18 11 − 18 8 − 18

Ceramic capacitors and its part numbers listed bellow

have been used as low ESR output capacitors CQ from the

table above to define the frequency ranges of additional

zero required for stability.

GCM32ER71E106KA57 (10 mF, 25V, X7R, 1210)

GRM32ER71E226ME15 (22 mF, 25V, X7R, 1210)

GRM32ER61C476ME15 (47 mF, 16 V, X5R, 1210)

Inhibit Input

The inhibit pin is used to turn the regulator on or off. By

holding the pin down to a voltage less than 1.8 V, the output

of the regulator will be turned off. When the voltage on the

Inhibit pin is greater than 2.8 V, the output of the regulator

will be enabled to power its output to the regulated output

voltage. The inhibit pin may be connected directly to the

input pin to give constant enable to the output regulator.

Setting the Output Voltage (Adjustable Version)

The output voltage range of the adjustable version can be

set between 2.5 V and 20 V. This is accomplished with an

external resistor divider feeding back the voltage to the IC

back to the error amplifier by the voltage adjust pin VA.

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The internal reference voltage is set to a temperature stable

reference of 2.5 V.

The output voltage is calculated from the following

formula. Ignoring the bias current into the VA pin:

VQ+[(R1 )R2) * Vref]ńR2

Use R2 < 50 k to avoid significant voltage output errors

due to VA bias current.

Connecting VA directly to Q without R1 and R2 creates

an output voltage of 2.5 V.

Designers should consider the tolerance of R1 and R2

during the design phase.

The input voltage range for operation (pin 1) of the

adjustable version is between (VQ + 0.5 V) and 40 V.

Internal bias requirements dictate a minimum input voltage

of 4.5 V. The dropout voltage for output voltages less than

4.0 V is (4.5 V − VQ).

Calculating Power Dissipation

in a Single Output Linear Regulator

The maximum power dissipation for a single output

regulator (Figure 29) is:

D(max) +[VI(max) *VQ(min)]IQ(max) (

)VI(max)Iq

where

VI(max) is the maximum input voltage,

VQ(min) is the minimum output voltage,

IQ(max) is the maximum output current for the

application,

Iq is the quiescent current the regulator

consumes at IQ(max).

Once the value of PD(max) is known, the maximum

permissible value of RqJA can be calculated:

RqJA +150oC*TA

PD(2)

The value of RqJA can then be compared with those in the

package section of the data sheet. Those packages with

RqJA less than the calculated value in Equation 2 will keep

the die temperature below 150°C.

In some cases, none of the packages will be sufficient to

dissipate the heat generated by the IC, and an external

heatsink will be required.

SMART

REGULATOR®

Control

Features

Figure 29. Single Output Regulator with Key

Performance Parameters Labeled

VIVQ

}

Heatsinks

A heatsink effectively increases the surface area of the

package to improve the flow of heat away from the IC and

into the surrounding air.

Each material in the heat flow path between the IC and

the outside environment will have a thermal resistance.

Like series electrical resistances, these resistances are

summed to determine the value of RqJA:

RqJA +RqJC)RqCS )RqSA (3)

where

RqJC is the junction−to−case thermal resistance,

RqCS is the case−to−heatsink thermal resistance,

RqSA is the heatsink−to−ambient thermal

resistance.

RqJC appears in the package section of the data sheet.

Like RqJA, it too is a function of package type. RqCS and

RqSA are functions of the package type, heatsink and the

interface between them. These values appear in data sheets

of heatsink manufacturers.

Thermal, mounting, and heatsinking considerations are

discussed in the ON Semiconductor application note

AN1040/D.

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110

Figure 30. RqJA vs. Copper Spreader Area,

DPAK 5−Lead Figure 31. RqJA vs. Copper Spreader Area,

D2PAK 5−Lead

100

40 100 200 300 500 600 700 800

COPPER SPREADER AREA (mm2)

RqJA, THERMAL RESIST ANCE (°C/W)

30 100 200 300 500 600 80

COPPER SPREADER AREA (mm2)

400

1 oz

2 oz

RqJA, THERMAL RESIST ANCE (°C/W)

400 700

1 oz

2 oz

100

0.1

PULSE TIME (sec)

R(t) (°C/W)

0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000

Figure 32. Single−Pulse Heating Curves, DPAK 5−Lead

100

0.1

PULSE TIME (sec)

R(t) (°C/W)

0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000

Figure 33. Single−Pulse Heating Curves, D2PAK 5−Lead

Cu Area 168 mm2

Cu Area 736 mm2

Cu Area 241 mm2

Cu Area 788 mm2

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100

0.1

PULSE TIME (sec)

RqJA, 788 mm2 (°C/W)

0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000

Non−normalized Response

50% Duty Cycle

20%

10%

100

0.1

PULSE TIME (sec)

RqJA, 736 mm2 (°C/W)

0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000

Non−normalized Response

50% Duty Cycle

Figure 34. Duty Cycle for 1, Spreader Boards, DPAK 5−Lead

20%

10%

Figure 35. Duty Cycle for 1, Spreader Boards, D2PAK 5−Lead

Single Pulse

ORDERING INFORMATION

Device Output Voltage Accuracy Output Voltage Package Shipping†

NCV4276CDT33RKG

3.3 V

DP AK, 5−Pin

(Pb−Free) 2500 / Tape & Reel

NCV4276CDS33R4G D2PAK, 5−Pin

(Pb−Free) 800 / Tape & Reel

NCV4276CDT50RKG

5.0 V

DP AK, 5−Pin

(Pb−Free) 2500 / Tape & Reel

NCV4276CDS50R4G D2PAK, 5−Pin

(Pb−Free) 800 / Tape & Reel

NCV4276CDTADJRKG

Adjustable

DP AK, 5−Pin

(Pb−Free) 2500 / Tape & Reel

NCV4276CDTADJT5G DP AK, 5−Pin

(Pb−Free) 2500 / Tape & Reel

NCV4276CDSADJR4G D2PAK, 5−Pin

(Pb−Free) 800 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

NCV4276C

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PACKAGE DIMENSIONS

5 PL

0.13 (0.005) T

−T− SEATING

PLANE

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A0.235 0.245 5.97 6.22

B0.250 0.265 6.35 6.73

C0.086 0.094 2.19 2.38

D0.020 0.028 0.51 0.71

E0.018 0.023 0.46 0.58

F0.024 0.032 0.61 0.81

G0.180 BSC 4.56 BSC

H0.034 0.040 0.87 1.01

J0.018 0.023 0.46 0.58

K0.102 0.114 2.60 2.89

L0.045 BSC 1.14 BSC

R0.170 0.190 4.32 4.83

S0.025 0.040 0.63 1.01

U0.020 −−− 0.51 −−−

V0.035 0.050 0.89 1.27

Z0.155 0.170 3.93 4.32

NOTES:

1. DIMENSIONING AND TOLERANCING

PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

R1 0.185 0.210 4.70 5.33

1234 5

DPAK 5, CENTER LEAD CROP

DT SUFFIX

CASE 175AA

ISSUE B

6.4

0.252

0.8

0.031

10.6

0.417

5.8

0.228

SCALE 4:1 ǒmm

inchesǓ

0.34

0.013 5.36

0.217

2.2

0.086

SOLDERING FOOTPRINT*

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

NCV4276C

www.onsemi.com

PACKAGE DIMENSIONS

D2PAK 5

CASE 936A−02

ISSUE D

8.38

0.33

1.016

0.04

16.02

0.63

10.66

0.42

3.05

0.12

1.702

0.067

SCALE 3:1

inchesǓ

SOLDERING FOOTPRINT

123

TERMINAL 6

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A

AND K.

4. DIMENSIONS U AND V ESTABLISH A MINIMUM

MOUNTING SURFACE FOR TERMINAL 6.

5. DIMENSIONS A AND B DO NOT INCLUDE MOLD

FLASH OR GATE PROTRUSIONS. MOLD FLASH

AND GATE PROTRUSIONS NOT TO EXCEED 0.025

(0.635) MAXIMUM.

DIM

AMIN MAX MIN MAX

MILLIMETERS

0.386 0.403 9.804 10.236

INCHES

B0.356 0.368 9.042 9.347

C0.170 0.180 4.318 4.572

D0.026 0.036 0.660 0.914

E0.045 0.055 1.143 1.397

G0.067 BSC 1.702 BSC

H0.539 0.579 13.691 14.707

K0.050 REF 1.270 REF

L0.000 0.010 0.000 0.254

M0.088 0.102 2.235 2.591

N0.018 0.026 0.457 0.660

P0.058 0.078 1.473 1.981

S0.116 REF 2.946 REF

U0.200 MIN 5.080 MIN

V0.250 MIN 6.350 MIN

0.010 (0.254) T

−T−

OPTIONAL

CHAMFER

0_8_0_8_

NCV4276C/D

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