TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Trimmed Offset Voltage:
TLC27L9 . . . 900 µV Max at 25°C,
VDD = 5 V
D
Input Offset Voltage Drift...Typically
0.1 µV/Month, Including the First 30 Days
D
Wide Range of Supply Voltages Over
Specified Temperature Range:
0°C to 70°C...3 V to 16 V
–40°C to 85°C...4 V to 16 V
–55°C to 125°C...4 V to 16 V
D
Single-Supply Operation
D
Common-Mode Input Voltage Range
Extends Below the Negative Rail (C-Suffix,
I-Suffix Types)
D
Ultra-Low Power...Typically 195 µW
at 25°C, VDD = 5 V
D
Output Voltage Range includes Negative
Rail
D
High Input Impedance...10
12 Ω Typ
D
ESD-Protection Circuitry
D
Small-Outline Package Option Also
Available in Tape and Reel
D
Designed-In Latch-Up Immunity
description
The TLC27L4 and TLC27L9 quad operational
amplifiers combine a wide range of input offset
voltage grades with low offset voltage drift, high
input impedance, extremely low power, and high
gain.
These devices use T exas instruments silicon-gate
LinCMOS technology, which provides offset
voltage stability far exceeding the stability
available with conventional metal-gate pro-
cesses.
The extremely high input impedance, low bias
currents, and low-power consumption make
these cost-effective devices ideal for high-gain,
low- frequency, low-power applications. Four
offset voltage grades are available (C-suffix and
I-suffix types), ranging from the low-cost TLC27L4
(10 mV) to the high-precision TLC27L9 (900 µV).
These advantages, in combination with good
common-mode rejection and supply voltage
rejection, make these devices a good choice for
new state-of-the-art designs as well as for
upgrading existing designs.
Copyright 1994, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
LinCMOS is a trademark of Texas Instruments Incorporated.
35
30
25
20
15
10
5
6000–600
40
1200
VIO – Input Offset Voltage – µV
Percentage of Units – %
0
–1200
N Package
TA = 25°C
VDD = 5 V
299 Units Tested From 2 Wafer Lots
DISTRIBUTION OF TLC27L9
INPUT OFFSET VOLTAGE
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OUT
1IN–
1IN+
VDD
2IN+
2IN–
2OUT
4OUT
4IN–
4IN+
GND
3IN+
3IN–
3OUT
D, J, N, OR PW PACKAGE
(TOP VIEW)
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
4IN+
NC
GND
NC
3IN+
1IN+
NC
VDD
NC
2IN+
FK PACKAGE
(TOP VIEW)
1IN –
1OUT
NC
3OUT
3IN – 4OUT
4IN –
2IN –
2OUT
NC
NC – No internal connection
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
description (continued)
In general, many features associated with bipolar technology are available on LinCMOS operational
amplifiers, without the power penalties of bipolar technology. General applications such as transducer
interfacing, analog calculations, amplifier blocks, active filters, and signal buffering are easily designed with the
TLC27L4 and TLC27L9. The devices also exhibit low voltage single-supply operation and ultra-low power
consumption, making them ideally suited for remote and inaccessible battery-powered applications. The
common-mode input voltage range includes the negative rail.
A wide range of packaging options is available, including small-outline and chip-carrier versions for high-density
system applications.
The device inputs and outputs are designed to withstand –100-mA surge currents without sustaining latch-up.
The TLC27L4 and TLC27L9 incorporate internal ESD-protection circuits that prevent functional failures at
voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2; however, care should be exercised in
handling these devices, as exposure to ESD may result in the degradation of the device parametric
performance.
The C-suffix devices are characterized for operation from 0°C to 70 °C. The I-suf fix devices are characterized
for operation from –40°C to 85°C. The M-suffix devices are characterized for operation from –55°C to 125°C.
AVAILABLE OPTIONS
PACKAGED DEVICES
CHIP
TAVIOmax
AT 25°CSMALL
OUTLINE
(D)
CHIP
CARRIER
(FK)
CERAMIC
DIP
(J)
PLASTIC
DIP
(N)
TSSOP
(PW)
CHIP
FORM
(Y)
900 µV TLC27L9CD — — TLC27L9CN — —
0
°
Cto70
°
C
2 mV TLC27L4BCD — — TLC27L4BCN — —
0°C
to
70°C
5 mV TLC27L4ACD — — TLC27L4ACN — —
10 mV TLC27L4CD — — TLC27L4CN TLC27L4CPW TLC27L4Y
900 µV TLC27L9ID — — TLC27L9IN — —
40
°
Cto85
°
C
2 mV TLC27L4BID — — TLC27L4BIN — —
–
40°C
to
85°C
5 mV TLC27L4AID — — TLC27L4AIN — —
10 mV TLC27L4ID — — TLC27L4IN — —
55
°
Cto125
°
C
900 µV TLC27L9MD TLC27L9MFK TLC27L9MJ TLC27L9MN — —
–
55°C
to
125°C
10 mV TLC27L4MD TLC27L4MFK TLC27L4MJ TLC27L4MN — —
The D package is available taped and reeled. Add R suffix to the device type (e.g., TLC27L9CDR).
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
equivalent schematic (each amplifier) VDD
P4
P3
R6
N5R2
P2
R1
P1
IN–
IN+
N1
R3 D1 R4 D2
N2
GND
N3
R5 C1
N4 R7
N6 N7
OUT
P6P5
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L4Y chip information
These chips, when properly assembled, display characteristics similar to the TLC27L4C. Thermal compression
or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJmax = 150°C
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (11) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
+
–1OUT
1IN+
1IN–
VDD
(4)
(6)
(3)
(2)
(5)
(1)
–
+
(7) 2IN+
2IN–
2OUT
(11)
GND
+
–3OUT
3IN+
3IN–
(13)
(10)
(9)
(12)
(8)
–
+
(14)
4OUT 4IN+
4IN–
68
108
(1) (2) (3) (4) (5) (6) (7)
(8)
(9)(10)
(11)
(12)(13)
(14)
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Supply voltage, VDD (see Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage, VID (see Note 2) ±VDD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (any input) –0.3 V to VDD
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current, II ±5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current, IO (each output) ±30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total current into VDD 45 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total current out of GND 45 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duration of short-circuit current at (or below) 25°C (see Note 3) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature, TA: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I suffix –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M suffix –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or PW package 260°C. . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package 300°C. . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at IN+ with respect to IN–.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded (see application section).
DISSIPATION RATING TABLE
PACKAGE TA ≤ 25°C
POWER RATING DERATING FACTOR
ABOVE TA = 25°CTA = 70°C
POWER RATING TA = 85°C
POWER RATING TA = 125°C
POWER RATING
D950 mW 7.6 mW/°C 608 mW 494 mW —
FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
J 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
N1575 mW 12.6 mW/°C 1008 mW 819 mW —
PW 700 mW 5.6 mW/°C 448 mW — —
recommended operating conditions
C SUFFIX I SUFFIX M SUFFIX
UNIT
MIN MAX MIN MAX MIN MAX
UNIT
Supply voltage, VDD 316 4 16 4 16 V
Common mode in
p
ut voltage VIC
VDD = 5 V –0.2 3.5 –0.2 3.5 0 3.5
V
Common
-
mode
inp
u
t
v
oltage
,
V
IC VDD = 10 V –0.2 8.5 –0.2 8.5 0 8.5
V
Operating free-air temperature, TA0 70 –40 85 –55 125 °C
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA
†
TLC27L4C
TLC27L4AC
TLC27L4BC
TLC27L9C UNIT
MIN TYP MAX
TLC27L4C
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
TLC27L4C
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 12
TLC27L4AC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.9 5
VIO
In
p
ut offset voltage
TLC27L4AC
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 6.5
V
IO
Inp
u
t
offset
v
oltage
TLC27L4BC
V
O
= 1.4 V, V
IC
= 0, 25°C 240 2000
TLC27L4BC
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 3000
TLC27L9C
V
O
= 1.4 V, V
IC
= 0, 25°C 200 900 µ
TLC27L9C
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 1500
αVIO Average temperature coef ficient of input
offset voltage 25°C to
70°C1.1 µV/°C
IIO
In
p
ut offset current (see Note 4)
VO=25V
VIC =25V
25°C 0.1 p
I
IO
Inp
u
t
offset
c
u
rrent
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
70°C 7 300
IIB
In
p
ut bias current (see Note 4)
VO=25V
VIC =25V
25°C 0.6 p
I
IB
Inp
u
t
bias
c
u
rrent
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
70°C 40 600
VICR
Common mode input voltage range 25°C–0.2
to
4
–0.3
to
4.2 V
V
ICR
gg
(see Note 5) Full range –0.2
to
3.5 V
25°C 3.2 4.1
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ0°C34.1 V
70°C 3 4.2
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 0°C 0 50 mV
70°C 0 50
L i l diff ti l lt
25°C 50 520
AVD Large-signal differential voltage
am
p
lification
VO = 2.5 V to 2 V, RL = 1 MΩ0°C50 680 V/mV
am lification
70°C 50 380
25°C 65 94
CMRR Common-mode rejection ratio VIC = VICRmin 0°C 60 95 dB
70°C 60 95
S l lt j ti ti
25°C 70 97
kSVR Supply-voltage rejection ratio
(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V 0°C60 97 dB
(∆VDD/∆VIO)
70°C 60 98
V25V
V25V
25°C 40 68
IDD Supply current (four amplifiers)
V
O =
2
.
5
V
,
No load
V
IC =
2
.
5
V
,0°C48 84 µA
No
load
70°C 31 56
†Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA
†
TLC27L4C
TLC27L4AC
TLC27L4BC
TLC27L9C UNIT
MIN TYP MAX
TLC27L4C
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
TLC27L4C
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 12
TLC27L4AC
V
O
= 1.4 V, V
IC
= 0, 25°C 0.9 5
VIO
In
p
ut offset voltage
TLC27L4AC
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 6.5
V
IO
Inp
u
t
offset
v
oltage
TLC27L4BC
V
O
= 1.4 V, V
IC
= 0, 25°C 260 2000
TLC27L4BC
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 3000
TLC27L9C
V
O
= 1.4 V, V
IC
= 0, 25°C 210 1200 µ
TLC27L9C
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 1900
αVIO Average temperature coef ficient of
input offset voltage 25°C to
70°C1µV/°C
IIO
In
p
ut offset current (see Note 4)
VO=5V
VIC =5V
25°C 0.1 p
I
IO
Inp
u
t
offset
c
u
rrent
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
70°C 7 300
IIB
In
p
ut bias current (see Note 4)
VO=5V
VIC =5V
25°C 0.7 p
I
IB
Inp
u
t
bias
c
u
rrent
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
70°C 50 600
VICR
Common-mode input voltage range 25°C–0.2
to
9
–0.3
to
9.2 V
V
ICR
gg
(see Note 5) Full range –0.2
to
8.5 V
25°C 8 8.9
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ0°C7.8 8.9 V
70°C 7.8 8.9
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 0°C050 mV
70°C 0 50
L i l diff ti l lt
25°C 50 870
AVD Large-signal differential voltage
am
p
lification
VO = 1 V to 6 V, RL = 1 MΩ0°C50 1020 V/mV
am lification
70°C 50 660
25°C 65 97
CMRR Common-mode rejection ratio VIC = VICRmin 0°C 60 97 dB
70°C 60 97
S l lt j ti ti
25°C 70 97
kSVR Supply-voltage rejection ratio
(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V 0°C 60 97 dB
(∆VDD/∆VIO)
70°C 60 98
V5V
V5V
25°C 57 92
IDD Supply current (four amplifiers) VO = 5 V,
No load
VIC = 5 V, 0°C72 132 µA
No
load
70°C 44 80
†Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA
†
TLC27L4I
TLC27L4AI
TLC27L4BI
TLC27L9I UNIT
MIN TYP MAX
TLC27L4I
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
TLC27L4I
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 13
TLC27L4AI
V
O
= 1.4 V, V
IC
= 0, 25°C 0.9 5
VIO
In
p
ut offset voltage
TLC27L4AI
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 7
V
IO
Inp
u
t
offset
v
oltage
TLC27L4BI
V
O
= 1.4 V, V
IC
= 0, 25°C 240 2000
TLC27L4BI
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 3500
TLC27L9I
V
O
= 1.4 V, V
IC
= 0, 25°C 200 900 µ
TLC27L9I
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 2000
αVIO Average temperature coef ficient of input
offset voltage 25°C to
85°C1.1 µV/°C
IIO
In
p
ut offset current (see Note 4)
VO=25V
VIC =25V
25°C 0.1 p
I
IO
Inp
u
t
offset
c
u
rrent
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
85°C 24 1000
IIB
In
p
ut bias current (see Note 4)
VO=25V
VIC =25V
25°C 0.6 p
I
IB
Inp
u
t
bias
c
u
rrent
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
85°C 200 2000
VICR
Common-mode input voltage range 25°C–0.2
to
4
–0.3
to
4.2 V
V
ICR
gg
(see Note 5) Full range –0.2
to
3.5 V
25°C 3.2 4.1
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ–40°C34.1 V
85°C 3 4.2
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 –40°C 0 50 mV
85°C 0 50
L i l diff ti l lt
25°C 50 480
AVD Large-signal differential voltage
am
p
lification
VO = 0.25 V to 2 V, RL = 1 MΩ–40°C50 900 V/mV
am lification
85°C 50 330
25°C 65 94
CMRR Common-mode rejection ratio VIC = VICRmin –40°C60 95 dB
85°C 60 95
S l lt j ti ti
25°C 70 97
kSVR Supply-voltage rejection ratio
(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V –40°C60 97 dB
(∆VDD/∆VIO)
85°C 60 98
V25V
V25V
25°C 39 68
IDD Supply current (four amplifiers)
V
O =
2
.
5
V
,
No load
V
IC =
2
.
5
V
,–40°C62 108 µA
No
load
85°C 29 52
†Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA
†
TLC27L4I
TLC27L4AI
TLC27L4BI
TLC27L9I UNIT
MIN TYP MAX
TLC27L4I
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
TLC27L4I
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 13
mV
TLC27L4AI
V
O
= 1.4 V, V
IC
= 0, 25°C 0.9 5
mV
VIO
In
p
ut offset voltage
TLC27L4AI
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 7
V
IO
Inp
u
t
offset
v
oltage
TLC27L4BI
V
O
= 1.4 V, V
IC
= 0, 25°C 260 2000
TLC27L4BI
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 3500
µV
TLC27L9I
V
O
= 1.4 V, V
IC
= 0, 25°C 210 1200 µ
V
TLC27L9I
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 2900
αVIO Average temperature coef ficient of input
offset voltage 25°C to
85°C1µV/°C
IIO
In
p
ut offset current (see Note 4)
VO=5V
VIC =5V
25°C 0.1 p
A
I
IO
Inp
u
t
offset
c
u
rrent
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
85°C 26 1000
pA
IIB
In
p
ut bias current (see Note 4)
VO=5V
VIC =5V
25°C 0.7 p
A
I
IB
Inp
u
t
bias
c
u
rrent
(see
Note
4)
V
O =
5
V
,
V
IC =.
5
V
85°C 220 2000
pA
VICR
Common-mode input voltage range 25°C–0.2
to
9
–0.3
to
9.2 V
V
ICR
gg
(see Note 5) Full range –0.2
to
8.5 V
25°C 8 8.9
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ–40°C7.8 8.9 V
85°C 7.8 8.9
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 –40°C050 mV
85°C 0 50
L i l diff ti l lt
25°C 50 800
AVD Large-signal differential voltage
am
p
lification
VO = 1 V to 6 V, RL = 1 MΩ–40°C50 1550 V/mV
am lification
85°C 50 585
25°C 65 97
CMRR Common-mode rejection ratio VIC = VICRmin –40°C60 97 dB
85°C 60 98
S l lt j ti ti
25°C 70 97
kSVR Supply-voltage rejection ratio
(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V –40°C60 97 dB
(∆VDD/∆VIO)
85°C 60 98
V5V
V5V
25°C 57 92
IDD Supply current (four amplifiers) VO = 5 V,
No load
VIC = 5 V, –40°C98 172 µA
No
load
85°C 40 72
†Full range is –40°C to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 5 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA
†
TLC27L4M
TLC27L9M UNIT
A
MIN TYP MAX
TLC27L4M
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
VIO
In
p
ut offset voltage
TLC27L4M
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 12
V
IO
Inp
u
t
offset
v
oltage
TLC27L9M
V
O
= 1.4 V, V
IC
= 0, 25°C 200 900
TLC27L9M
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 3750 µ
αVIO Average temperature coef ficient of input
offset voltage 25°C to
125°C1.4 µV/°C
IIO
In
p
ut offset current (see Note 4)
VO=25V
VIC =25V
25°C 0.1 pA
I
IO
Inp
u
t
offset
c
u
rrent
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
125°C 1.4 15 nA
IIB
In
p
ut bias current (see Note 4)
VO=25V
VIC =25V
25°C 0.6 pA
I
IB
Inp
u
t
bias
c
u
rrent
(see
Note
4)
V
O =
2
.
5
V
,
V
IC =
2
.
5
V
125°C 9 35 nA
VICR
Common-mode input voltage range 25°C–0.2
to
4
–0.3
to
4.2 V
V
ICR
gg
(see Note 5) Full range –0.2
to
3.5 V
25°C 3.2 4.1
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ–55°C34.1 V
125°C 3 4.2
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 –55°C050 mV
125°C 0 50
L i l diff ti l lt
25°C 50 480
AVD Large-signal differential voltage
am
p
lification
VO = 0.25 V to 2 V, RL = 1 MΩ–55°C25 950 V/mV
am lification
125°C 25 200
25°C 65 94
CMRR Common-mode rejection ratio VIC = VICRmin –55°C60 95 dB
125°C 60 85
S l lt j ti ti
25°C 70 97
kSVR Supply-voltage rejection ratio
(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V –55°C60 97 dB
(∆VDD/∆VIO)
125°C 60 98
V25V
V25V
25°C 39 68
IDD Supply current (four amplifiers) VO = 2.5 V,
No load
VIC = 2.5 V, –55°C69 120 µA
No
load
125°C 27 48
†Full range is –55°C to 125°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 10 V (unless otherwise noted)
PARAMETER TEST CONDITIONS TA
†
TLC27L4M
TLC27L9M UNIT
A
MIN TYP MAX
TLC27L4M
V
O
= 1.4 V, V
IC
= 0, 25°C 1.1 10
VIO
In
p
ut offset voltage
TLC27L4M
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 12
V
IO
Inp
u
t
offset
v
oltage
TLC27L9M
V
O
= 1.4 V, V
IC
= 0, 25°C 210 1200
TLC27L9M
O,
RS = 50 Ω,
IC ,
RL = 1 MΩFull range 4300 µ
αVIO Average temperature coef ficient of
input offset voltage 25°C to
125°C1.4 µV/°C
IIO
In
p
ut offset current (see Note 4)
VO=5V
VIC =5V
25°C 0.1 pA
I
IO
Inp
u
t
offset
c
u
rrent
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
125°C 1.8 15 nA
IIB
In
p
ut bias current (see Note 4)
VO=5V
VIC =5V
25°C 0.7 pA
I
IB
Inp
u
t
bias
c
u
rrent
(see
Note
4)
V
O =
5
V
,
V
IC =
5
V
125°C 10 35 nA
VICR
Common-mode input voltage range 25°C0
to
9
–0.3
to
9.2 V
V
ICR
gg
(see Note 5) Full range 0
to
8.5 V
25°C 8 8.9
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ–55°C7.8 8.8 V
125°C 7.8 9
25°C 0 50
VOL Low-level output voltage VID = –100 mV, IOL = 0 –55°C050 mV
125°C 0 50
L i l diff ti l lt
25°C 50 800
AVD Large-signal differential voltage
am
p
lification
VO = 1 V to 6 V, RL = 1 MΩ–55°C25 1750 V/mV
am lification
125°C 25 380
25°C 65 97
CMRR Common-mode rejection ratio VIC = VICRmin –55°C60 97 dB
125°C 60 91
S l lt j ti ti
25°C 70 97
kSVR Supply-voltage rejection ratio
(∆VDD/∆VIO)
VDD = 5 V to 10 V, VO = 1.4 V –55°C60 97 dB
(∆VDD/∆VIO)
125°C 60 98
V5V
V5V
25°C 57 92
IDD Supply current (four amplifiers) VO = 5 V,
No load
VIC = 5 V, –55°C111 192 µA
No
load
125°C 35 60
†Full range is –55°C to 125°C.
NOTES: 4. The typical values of input bias current and Input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
12 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VDD = 5 V, TA = 25°C (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
TLC27L4Y
PARAMETER
TEST
CONDITIONS
MIN TYP MAX
VIO Input offset voltage VO = 1.4 V,
RS = 50 Ω,VIC = 0,
RL = 1 MΩ1.1 10 mV
αVIO Average temperature coefficient of input offset voltage TA = 25°C to 70°C 1.1 µV/°C
IIO Input of fset current (see Note 4) VO = 2.5 V, VIC = 2.5 V 0.1 pA
IIB Input bias current (see Note 4) VO = 2.5 V, VIC = 2.5 V 0.6 pA
VICR Common-mode input voltage range (see Note 5) –0.2
to
4
–0.3
to
4.2 V
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ3.2 4.1 V
VOL Low-level output voltage VID = –100 mV, IOL = 0 0 50 mV
AVD Large-signal differential voltage amplification VO = 0.25 V to 2 V, RL = 1 MΩ50 520 V/mV
CMRR Common-mode rejection ratio VIC = VICRmin 65 94 dB
kSVR Supply-voltage rejection ratio (∆VDD/∆VIO) VDD = 5 V to 10 V, VO = 1.4 V 70 97 dB
IDD Supply current (four amplifiers) VO = 2.5 V,
No load VIC = 2.5 V, 40 68 µA
electrical characteristics at specified free-air temperature, VDD = 10 V , T A = 25°C (unless otherwise
noted)
PARAMETER
TEST CONDITIONS
TLC27L4Y
PARAMETER
TEST
CONDITIONS
MIN TYP MAX
VIO Input offset voltage VO = 1.4 V,
RS = 50 Ω,VIC = 0,
RL = 1 MΩ1.1 10 mV
αVIO Average temperature coefficient of input offset voltage TA = 25°C to 70°C 1 µV/°C
IIO Input of fset current (see Note 4) VO = 5 V, VIC = 5 V 0.1 pA
IIB Input bias current (see Note 4) VO = 5 V, VIC = 5 V 0.7 pA
VICR Common-mode input voltage range (see Note 5) –0.2
to
9
–0.3
to
9.2 V
VOH High-level output voltage VID = 100 mV, RL = 1 MΩ88.9 V
VOL Low-level output voltage VID = –100 mV, IOL = 0 0 50 mV
AVD Large-signal differential voltage amplification VO = 1 V to 6 V, RL = 1 MΩ50 870 V/mV
CMRR Common-mode rejection ratio VIC = VICRmin 65 97 dB
kSVR Supply-voltage rejection ratio (∆VDD/∆VIO) VDD = 5 V to 10 V, VO = 1.4 V 70 97 dB
IDD Supply current (four amplifiers) VO = 5 V,
No load VIC = 5 V, 57 92 µA
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER TEST CONDITIONS TA
TLC27L4C
TLC27L4AC
TLC27L4BC
TLC27L9C UNIT
MIN TYP MAX
25°C 0.03
VIPP = 1 V 0°C0.04
SR
Slew rate at unity gain
RL = 1 MΩ,
CL20
p
F
70°C 0.03
V/µs
SR
Sle
w
rate
at
u
nit
y
gain
C
L =
20
p
F
,
See Fi
g
ure 1 25°C 0.03
V/
µ
s
See
Figure
1
VIPP = 2.5 V 0°C0.03
70°C 0.02
VnEquivalent input noise voltage f = 1 kHZ,
See Figure 2 RS = 20 Ω, 25°C 70 nV/√Hz
VV
C20F
25°C 5
BOM Maximum output-swing bandwidth VO = VOH,
RL=1MΩ
CL = 20 pF,
See Figure 1
0°C 6 kHz
RL
=
1
MΩ
,
See
Figure
1
70°C 4.5
V10V
C20F
25°C 85
B1Unity-gain bandwidth VI = 10 mV,
See Figure 3
CL = 20 pF, 0°C100 kHz
See
Figure
3
70°C 65
V10mV
fB
25°C 34°
φmPhase margin
V
I =
10
m
V
,
CL
=
20
p
F,
f
=
B
1,
See Figure 3
0°C36°
CL
=
20
F
,
See
Figure
3
70°C 30°
operating characteristics at specified free-air temperature, VDD = 10 V
PARAMETER TEST CONDITIONS TA
TLC27L4C
TLC27L4AC
TLC27L4BC
TLC27L9C UNIT
MIN TYP MAX
25°C 0.05
VIPP = 1 V 0°C0.05
SR
Slew rate at unity gain
RL = 1 MΩ,
CL20
p
F
70°C 0.04
V/µs
SR
Sle
w
rate
at
u
nit
y
gain
C
L =
20
p
F
,
See
Fi
gu
r
e
1 25°C 0.04
V/
µ
s
See
Figure
1
VIPP = 5.5 V 0°C0.05
70°C 0.04
VnEquivalent input noise voltage f = 1 kHz,
See Figure 2 RS = 20 Ω, 25°C 70 nV/√Hz
VV
C20F
25°C 1
BOM Maximum output-swing bandwidth VO = VOH,
RL=1MΩ
CL = 20 pF,
See Figure 1
0°C 1.3 kHz
RL
=
1
MΩ
,
See
Figure
1
70°C 0.9
V10V
C20F
25°C110
B1Unity-gain bandwidth VI = 10 mV,
See Figure 3
CL = 20 pF, 0°C125 kHz
See
Figure
3
70°C 90
V10mV
fB
25°C 38°
φmPhase margin
V
I =
10
m
V
,
CL
=
20
p
F,
f
=
B
1,
See Figure 3
0°C40°
CL
=
20
F
,
See
Figure
3
70°C 34°
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER TEST CONDITIONS TA
TLC27L4I
TLC27L4AI
TLC27L4BI
TLC27L9I UNIT
MIN TYP MAX
25°C 0.03
VIPP = 1 V –40°C0.04
SR
Slew rate at unity gain
RL = 1 MΩ,
CL20
p
F
85°C 0.03
SR
Sle
w
rate
at
u
nit
y
gain
C
L =
20
p
F
,
See Fi
g
ure 1 25°C 0.03
µ
See
Figure
1
VIPP = 2.5 V –40°C0.04
85°C 0.02
VnEquivalent input noise voltage f = 1 HZ,
See Figure 2 RS = 20 Ω, 25°C 70 nV/√Hz
VV
C20F
25°C 5
BOM Maximum output-swing bandwidth VO = VOH,
RL=1MΩ
CL = 20 pF,
See Figure 1
–40°C 7 kHz
RL
=
1
MΩ
,
See
Figure
1
85°C 4
V10V
C20F
25°C 85
B1Unity-gain bandwidth VI = 10 mV,
See Figure 3
CL = 20 pF, –40°C130 kHz
See
Figure
3
85°C 55
V10mV
fB
25°C 34°
φmPhase margin
V
I =
10
m
V
,
CL
=
20
p
F,
f
=
B
1,
See Figure 3
–40°C38°
CL
=
20
F
,
See
Figure
3
85°C 28°
operating characteristics at specified free-air temperature, VDD = 10 V
PARAMETER TEST CONDITIONS TA
TLC27L4I
TLC27L4AI
TLC27L4BI
TLC27L9I UNIT
MIN TYP MAX
25°C 0.05
VIPP = 1 V –40°C0.06
SR
Slew rate at unity gain
RL = 1 MΩ,
CL20
p
F
85°C 0.03
SR
Sle
w
rate
at
u
nit
y
gain
C
L =
20
p
F
,
See
Fi
gu
r
e
1 25°C 0.04
µ
See
Figure
1
VIPP = 2.5 V –40°C0.05
85°C 0.03
VnEquivalent input noise voltage f = 1 HZ,
See Figure 2 RS = 20 Ω, 25°C 70 nV/√Hz
VV
C20F
25°C 1
BOM Maximum output-swing bandwidth VO = VOH,
RL=1MΩ
CL = 20 pF,
See Figure 1
–40°C1.4 kHz
RL
=
1
MΩ
,
See
Figure
1
85°C 0.8
V10V
C20F
25°C110
B1Unity-gain bandwidth VI = 10 mV,
See Figure 3
CL = 20 pF, –40°C155 kHz
See
Figure
3
85°C 80
V10mV
fB
25°C 38°
φmPhase margin
V
I =
10
m
V
,
CL
=
20
p
F,
f
=
B
1,
See Figure 3
–40°C42°
CL
=
20
F
,
See
Figure
3
85°C 32°
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics at specified free-air temperature, VDD = 5 V
PARAMETER TEST CONDITIONS T
A
TLC27L4M
TLC27L9M UNIT
A
MIN TYP MAX
25°C 0.03
VIPP = 1 V –55°C0.04
SR
Slew rate at unity gain
RL = 1 MΩ,
CL20
p
F
125°C 0.02
V/µs
SR
Sle
w
rate
at
u
nit
y
gain
C
L =
20
p
F
,
See
Fi
gu
r
e
1 25°C 0.03
V/
µ
s
See
Figure
1
VIPP = 2.5 V –55°C0.04
125°C 0.02
VnEquivalent input noise voltage f = 1 kHz,
See Figure 2 RS = 20 Ω, 25°C 70 nV/√Hz
VV
C20F
25°C 5
BOM Maximum output-swing bandwidth VO = VOH,
RL=1MΩ
CL = 20 pF,
See Figure 1
–55°C 8 kHz
RL
=
1
MΩ
,
See
Figure
1
125°C 3
V10V
C20F
25°C 85
B1Unity-gain bandwidth VI = 10 mV,
See Figure 3
CL = 20 pF, –55°C140 kHz
See
Figure
3
125°C 45
V10mV
fB
25°C 34°
φmPhase margin
V
I =
10
m
V
,
CL
=
20
p
F,
f
=
B
1,
See Figure 3
–55°C39°
CL
=
20
F
,
See
Figure
3
125°C 25°
operating characteristics at specified free-air temperature, VDD = 10 V
PARAMETER TEST CONDITIONS T
A
TLC27L4M
TLC27L9M UNIT
A
MIN TYP MAX
25°C 0.05
VIPP = 1 V –55°C0.06
SR
Slew rate at unity gain
RL = 1 MΩ,
CL20
p
F
125°C 0.03
V/µs
SR
Sle
w
rate
at
u
nit
y
gain
C
L =
20
p
F
,
See
Fi
gu
r
e
1 25°C 0.04
V/
µ
s
See
Figure
1
VIPP = 5.5 V –55°C0.06
125°C 0.03
VnEquivalent input noise voltage f = 1 kHz,
See Figure 2 RS = 20 Ω, 25°C 70 nV/√Hz
VV
C20F
25°C 1
BOM Maximum output-swing bandwidth VO = VOH,
RL=1MΩ
CL = 20 pF,
See Figure 1
–55°C1.5 kHz
RL
=
1
MΩ
,
See
Figure
1
125°C 0.7
V10V
C20F
25°C110
B1Unity-gain bandwidth VI = 10 mV,
See Figure 3
CL = 20 pF, –55°C165 kHz
See
Figure
3
125°C 70
V10mV
fB
25°C 38°
φmPhase margin
V
I =
10
m
V
,
CL
=
20 PF,
f
=
B
1,
See Figure 3
–55°C43°
CL
=
20
PF
,
See
Figure
3
125°C 29°
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
16 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics, VDD = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
TLC27L4Y
PARAMETER
TEST
CONDITIONS
MIN TYP MAX
SR
Slew rate at unity gain
RL = 1 MΩ,
CL=20
p
F
VIPP = 1 V 0.03
SR
Sle
w
rate
at
u
nit
y
gain
C
L =
20
pF
,
See Figure 1 VIPP = 2.5 V 0.03
µ
VnEquivalent input noise voltage f = 1 kHz,
See Figure 2 RS = 20 Ω, 70 nV/√Hz
BOM Maximum output-swing bandwidth VO = VOH,
RL = 1 MΩ, CL = 20 pF,
See Figure 1 5 kHz
B1Unity-gain bandwidth VI = 10 mV,
See Figure 3 CL = 20 pF, 85 kHz
φmPhase margin VI = 10 mV,
CL = 20 pF, f = B1,
See Figure 3 34°
operating characteristics, VDD = 10 V, TA = 25°C
PARAMETER
TEST CONDITIONS
TLC27L4Y
PARAMETER
TEST
CONDITIONS
MIN TYP MAX
SR
Slew rate at unity gain
RL = 1 MΩ,
CL=20
p
F
VIPP = 1 V 0.05
SR
Sle
w
rate
at
u
nit
y
gain
C
L =
20
pF
,
See Figure 1 VIPP = 5.5 V 0.04
µ
VnEquivalent input noise voltage f = 1 kHz,
See Figure 2 RS = 20 Ω, 70 nV/√Hz
BOM Maximum output-swing bandwidth VO = VOH,
RL = 1 MΩ, CL = 20 pF,
See Figure 1 1 kHz
B1Unity-gain bandwidth VI = 10 mV,
See Figure 3 CL = 20 pF, 110 kHz
φmPhase margin VI = 10 mV,
CL = 20 pF, f = B1,
See Figure 3 38°
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
single-supply versus split-supply test circuits
Because the TLC27L4 and TLC27L9 are optimized for single-supply operation, circuit configurations used for
the various tests often present some inconvenience since the input signal, in many cases, must be offset from
ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to
the negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either
circuit gives the same result.
–
+
VDD
CLRL
VO
VIVI
VO
RL
CL
–
+
VDD+
VDD–
(a) SINGLE SUPPLY (b) SPLIT SUPPLY
Figure 1. Unity-Gain Amplifier
VDD
–
+
VDD+
–
+
1/2 VDD
20 Ω
VO
2 kΩ
20 Ω
VDD–
20 Ω20 Ω
2 kΩ
VO
(b) SPLIT SUPPLY(a) SINGLE SUPPLY
Figure 2. Noise-Test Circuit
VDD
–
+
10 kΩ
VO
100 Ω
CL
1/2 VDD
VIVI
CL
100 Ω
VO
10 kΩ
–
+
VDD+
VDD–
(b) SPLIT SUPPLY(a) SINGLE SUPPLY
Figure 3. Gain-of-100 Inverting Amplifier
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
18 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
input bias current
Because of the high input impedance of the TLC27L4 and TLC27L9 operational amplifiers, attempts to measure
the input bias current can result in erroneous readings. The bias current at normal room ambient temperature
is typically less than 1 pA, a value that is easily exceeded by leakages on the test socket. T wo suggestions are
offered to avoid erroneous measurements:
1. Isolate the device from other potential leakage sources. Use a grounded shield around and between the
device inputs (see Figure 4). Leakages that would otherwise flow to the inputs are shunted away.
2. Compensate for the leakage of the test socket by actually performing an input bias current test (using
a picoammeter) with no device in the test socket. The actual input bias current can then be calculated
by subtracting the open-socket leakage readings from the readings obtained with a device in the test
socket.
One word of caution: many automatic testers as well as some bench-top operational amplifier testers use the
servo-loop technique with a resistor in series with the device input to measure the input bias current (the voltage
drop across the series resistor is measured and the bias current is calculated). This method requires that a
device be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is not
feasible using this method.
V = VIC
148
17
Figure 4. Isolation Metal Around Device Inputs (J and N packages)
low-level output voltage
To obtain low-supply-voltage operation, some compromise was necessary in the input stage. This compromise
results in the device low-level output being dependent on both the common-mode input voltage level as well
as the differential input voltage level. When attempting to correlate low-level output readings with those quoted
in the electrical specifications, these two conditions should be observed. If conditions other than these are to
be used, please refer to Figures 14 through 19 in the Typical Characteristics of this data sheet.
input offset voltage temperature coefficient
Erroneous readings often result from attempts to measure temperature coefficient of input of fset voltage. This
parameter is actually a calculation using input offset voltage measurements obtained at two different
temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device
and the test socket. This moisture results in leakage and contact resistance, which can cause erroneous input
offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the
moisture also covers the isolation metal itself, thereby rendering it useless. It is suggested that these
measurements be performed at temperatures above freezing to minimize error.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
full-power response
Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage
swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is
generally measured by monitoring the distortion level of the output while increasing the frequency of a sinusoidal
input signal until the maximum frequency is found above which the output contains significant distortion. The
full-peak response is defined as the maximum output frequency, without regard to distortion, above which full
peak-to-peak output swing cannot be maintained.
Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified
in this data sheet and is measured using the circuit of Figure 1. The initial setup involves the use of a sinusoidal
input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is
increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same
amplitude. The frequency is then increased until the maximum peak-to-peak output can no longer be maintained
(Figure 5). A square wave is used to allow a more accurate determination of the point at which the maximum
peak-to-peak output is reached.
(a) f = 100 Hz (b) BOM > f > 100 Hz (c) f = BOM (d) f > BOM
Figure 5. Full-Power-Response Output Signal
test time
Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume,
short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET
devices and require longer test times than their bipolar and BiFET counterparts. The problem becomes more
pronounced with reduced supply levels and lower temperatures.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
20 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO Input offset voltage Distribution 6, 7
αVIO Temperature coef ficient Distribution 8, 9
vs High-level output current 10, 11
VOH High-level output voltage
g
vs Supply voltage
,
12
OH
gg
g
vs Free-air temperature 13
vs Common-mode input volta
g
e 14
,
15
VOL
Low level out
p
ut voltage
vs
Common mode
in ut
voltage
vs Differential input voltage
14,
15
16
V
OL
Lo
w-
le
v
el
o
u
tp
u
t
v
oltage
g
vs Free-air temperature 17
vs Low-level output current 18, 19
vs Supply voltage 20
AVD Differential voltage amplification
yg
vs Free-air temperature 21
VD
g
vs Frequency 32, 33
IIB/IIO Input bias and input offset current vs Free-air temperature 22
VIC Common-mode input voltage vs Supply voltage 23
IDD
Su
pp
ly current
vs Supply voltage 24
I
DD
S
u
ppl
y
c
u
rrent
yg
vs Free-air temperature 25
SR
Slew rate
vs Supply voltage 26
SR
Sle
w
rate
yg
vs Free-air temperature 27
Normalized slew rate vs Free-air temperature 28
VO(PP) Maximum peak-to-peak output voltage vs Frequency 29
B1
Unity gain bandwidth
vs Free-air temperature 30
B
1
Unit
y-
gain
band
w
idth
vs Supply voltage 31
φ
vs Supply voltage 34
φ
mPhase margin
yg
vs Free-air temperature 35
m
g
vs Capacitive loads 36
VnEquivalent input noise voltage vs Frequency 37
φPhase shift vs Frequency 32, 33
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 6
–5
0
Percentage of Units – %
VIO – Input Offset Voltage – mV 5
70
–4 –3 –2 –1 0 1 234
10
20
30
40
50
60
905 Amplifiers Tested From 6 Wafer Lots
VDD = 5 V
TA = 25°C
N Package
DISTRIBUTION OF TLC27L4
INPUT OFFSET VOLTAGE
Figure 7
N Package
TA = 25°C
VDD = 10 V
905 Amplifiers Tested From 6 Wafer Lots
60
50
40
30
20
10
43210–1–2–3–4
70
5
VIO – Input Offset Voltage – mV
Percentage of Units – %
0–5
DISTRIBUTION OF TLC27L4
INPUT OFFSET VOLTAGE
Figure 8
(1) 12.1 µV/°C
(1) 19.2 µV/°C
Outliers:
N Package
TA = 25°C to 125°C
VDD = 5 V
356 Amplifiers Tested From 8 Wafer Lots
60
50
40
30
20
10
86420–2–4–6–8
70
10
αVIO – Temperature Coefficient – µV/°C
Percentage of Units – %
0
–10
DISTRIBUTION OF TLC27L4 AND TLC27L9
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
Figure 9
–10
0
Percentage of Units – %
αVIO – Temperature Coefficient – µV/°C10
70
–8 –6 –4 –2 0 2 468
10
20
30
40
50
60
356 Amplifiers Tested From 6 Wafer Lots
VDD = 10 V
TA = 25°C to 125°C
N Package
Outliers:
(1) 18.7 µV/°C
(1) 11.6 µV/°C
DISTRIBUTION OF TLC27L4 AND TLC27L9
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
22 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 10
0
0
IOH – High-Level Output Current – mA –10
5
–2 –4 –6 –8
1
2
3
4
VID = 100 mV
TA = 25°C
VDD = 5 V
VDD = 3 V
VDD = 4 V
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
– High-Level Output Voltage – VVOH
Figure 11
0
0
IOH – High-Level Output Current – mA –40
16
–10 –20 –30
2
4
6
8
10
12
14 TA = 25°C
VID = 100 mV
VDD = 16 V
VDD = 10 V
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
– High-Level Output Voltage – VVOH
–35–5 –15 –25
Figure 12
0VDD – Supply Voltage – V 162 46810 12 14
14
12
10
8
6
4
2
16
0
VID = 100 mV
RL = 1 MΩ
TA = 25°C
HIGH-LEVEL OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
– High-Level Output Voltage – VVOH
Figure 13
VDD –1.7
VDD –1.8
VDD –1.9
VDD –2
VDD –2.1
VDD –2.2
VDD –2.3
1007550250–25–50
VDD –1.6
12
5
TA – Free-Air Temperature – °C
VDD –2.4
–75
IOH = –5 mA
VID = 100 mV
VDD = 5 V
VDD = 10 V
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
– High-Level Output Voltage – VVOH
†Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 14
0
300
– Low-Level Output Voltage – mV
VIC – Common-Mode Input Voltage – V 4
700
1 2 3
400
500
600 TA = 25°C
IOL = 5 mA
VDD = 5 V
VID = –100 mV
VID = –1 V
LOW-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
VOL
350
450
550
650
0.5 1.5 2.5 3.5
Figure 15
2500VIC – Common-Mode Input Voltage – V
300
350
400
450
500
246810
V
DD = 10 V
IOL = 5 mA
TA = 25°C
VID = –1 V
VID = –2.5 V
VID = –100 mV
LOW-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
– Low-Level Output Voltage – mVVOL
7135 9
Figure 16
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
0VID – Differential Input Voltage – V –10–2 –4 –6 –8
800
700
600
500
400
300
200
100
0
IOL = 5 mA
VIC = |VID/2|
TA = 25°C
VDD = 5 V
VDD = 10 V
– Low-Level Output Voltage – mVVOL
Figure 17
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
–75
0125
900
–50 –25 0 25 50 75 100
100
200
300
400
500
600
700
800
VIC = 0.5 V
VID = –1 V
IOL = 5 mA
VDD = 5 V
VDD = 10 V
TA – Free-Air Temperature – °C
– Low-Level Output Voltage – mVVOL
†Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
24 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 18
0IOL – Low-Level Output Current – mA
1
8
01 2 3 4 5 6 7
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9 VID = –1 V
VIC = 0.5 V
TA = 25°C
VDD = 3 V
VDD = 4 V
VDD = 5 V
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
– Low-Level Output Voltage – VVOL
Figure 19
0IOL – Low-Level Output Current – mA
3
30
05 10 15 20 25
0.5
1
1.5
2
2.5 TA = 25°C
VIC = 0.5 V
VID = –1 V
VDD = 10 V
VDD = 16 V
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
– Low-Level Output Voltage – VVOL
Figure 20
0VDD – Supply Voltage – V
2000
02 4 6 8 10 12 14
200
400
600
800
1000
1200
1400
1600
1800 RL = 1 MΩTA = –55°C
TA = –40°C
TA = 0°C
TA = 25°C
TA = 70°C
TA = 85°C
TA = 125°C
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
SUPPLY VOLTAGE
AVD – Large-Signal Differential
ÁÁ
ÁÁ
AVD
Voltage Amplification – V/mV
16
Figure 21
1007550250–25–50
0125
TA – Free-Air Temperature – °C
–75
RL = 1 MΩ
VDD = 5 V
VDD = 10 V
1800
1600
1400
1200
1000
800
600
400
200
2000
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
AVD – Large-Signal Differential
ÁÁ
ÁÁ
ÁÁ
AVD
Voltage Amplification – V/mV
†Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
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TYPICAL CHARACTERISTICS†
Figure 22
0.1 125
10000
45 65 85 105
1
10
100
1000
25 TA – Free-Air Temperature – °C
VDD = 10 V
VIC = 5 V
See Note A
IIB
IIO
INPUT BIAS CURRENT AND INPUT OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
– Input Bias and Offset Currents – pAIIB IIO
and
NOTE A: The typical values of input bias current and input offset
current below 5 pA were determined mathematically.
Figure 23
0VDD – Supply Voltage – V
16
16
0246810 12 14
2
4
6
8
10
12
14 TA = 25°C
COMMON-MODE
INPUT VOLTAGE POSITIVE LIMIT
vs
SUPPLY VOLTAGE
IC
V – Common-Mode Input Voltage – V
Figure 24
No Load
VO = VDD/2
0VDD – Supply Voltage – V
180
16
02 4 6 8 10 12 14
20
40
60
80
100
120
140
160
ÌÌÌÌ
ÌÌÌÌ
TA = –40°C
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
– Supply Current – IDD Aµ
ÌÌÌÌ
ÌÌÌÌ
ÌÌÌÌ
ÌÌÌÌ
TA = 0°C
TA = 25°C
TA = 70°C
TA = 125°C
ÌÌÌÌ
ÌÌÌÌ
TA = –55°C
Figure 25
VO = VDD/2
No Load
VDD = 10 V
VDD = 5 V
–75 TA – Free-Air Temperature – °C
120
125
0–50 –25 0 25 50 75 100
20
40
60
80
100
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
– Supply Current – IDD Aµ
†Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
26 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 26
CL = 20 pF
RL = 1 mΩ
VIPP = 1 V
AV = 1
See Figure 1
TA = 25°C
0VDD – Supply Voltage – V
0.07
16
0.00 2 4 6 8 10 12 14
0.01
0.02
0.03
0.04
0.05
0.06
SLEW RATE
vs
SUPPLY VOLTAGE
µsSR – Slew Rate – V/
Figure 27
VIPP = 5.5 V
VDD = 10 V
VDD = 5 V
VIPP = 1 V
VDD = 5 V
VIPP = 2.5 V
VDD = 10 V
VIPP = 1 V
–75 TA – Free-Air Temperature – °C
0.07
125
0.00 –50 –25 0 25 50 75 100
0.01
0.02
0.03
0.04
0.05
0.06 CL = 20 pF
RL = 1 MΩ
See Figure 1
AV = 1
SLEW RATE
vs
FREE-AIR TEMPERATURE
µsSR – Slew Rate – V/
Figure 28
–75
Normalized Slew Rate
TA – Free-Air Temperature – °C
1.4
125
0.5 –50 –25 0 25 50 75 100
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3 AV = 1
VIPP = 1 V
RL = 1 MΩ
CL = 20 pF
VDD = 10 V
VDD = 5 V
NORMALIZED SLEW RATE
vs
FREE-AIR TEMPERATURE
Figure 29
0.1 f – Frequency – kHz
10
100
0
1
2
3
4
5
6
7
8
9
110
V
DD = 10 V
VDD = 5 V
See Figure 1
RL = 1 MΩ
TA = 125°C
TA = 25°C
TA = –55°C
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
– Maximum Peak-to-Peak Output Voltage – VVO(PP)
†Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
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TYPICAL CHARACTERISTICS†
Figure 30
VDD = 5 V
VI = 10 mV
CL = 20 pF
See Figure 3
–75 TA – Free-Air Temperature – °C
150
125
30 –50 –25 0 25 50 75 100
50
70
90
110
130
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
– Unity-Gain Bandwidth – kHzB1
Figure 31
0VDD – Supply Voltage – V
140
16
50 2 4 6 8 10 12 14
60
70
80
90
100
110
120
130
See Figure 3
TA = 25°C
CL = 20 pF
VI = 10 mV
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
– Unity-Gain Bandwidth – kHzB1
1f – Frequency – Hz 1 M
0.1 10 100 1 k 10 k 100 k
1
101
102
103
104
105
106
150°
120°
90°
60°
30°
0°
180°
TA = 25°C
RL = 1 MΩ
VDD = 5 V
AVD
Phase Shift
107
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
Phase Shift
AVD – Large-Signal Differential
ÁÁ
ÁÁ
ÁÁ
AVD V oltage Amplification
Figure 32
†Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
28 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Phase Shift
AVD
VDD = 10 V
RL = 1 MΩ
TA = 25°C
180°
0°
30°
60°
90°
120°
150°
106
105
104
103
102
101
1
100 k10 k1 k10010
0.1 1 M
f – Frequency – Hz
1
107
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
Phase Shift
AVD – Large-Signal Differential
Á
Á
Á
AVD V oltage Amplification
Figure 33
Figure 34
0VDD – Supply Voltage – V
42°
16
30°2 4 6 8 10 12 14
32°
34°
36°
38°
40°
See Figure 3
VI = 10 mV
TA = 25°C
CL = 20 pF
PHASE MARGIN
vs
SUPPLY VOLTAGE
– Phase Marginφm
Figure 35
See Figure 3
VI = 10 mV
CL = 20 pF
VDD = 5 mV
–75 TA – Free-Air Temperature – °C
40°
125
20°–50 –25 0 25 50 75 100
24°
28°
32°
36°
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
– Phase Marginφm
30°
34°
38°
26°
22°
†Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 36
VDD = 5 mV
TA = 25°C
See Figure 3
VI = 10 mV
0CL – Capacitive Load – pF
37°
100
25°20 40 60 80
27°
29°
31°
33°
35°
PHASE MARGIN
vs
CAPACITIVE LOAD
– Phase Marginφm
Figure 37
See Figure 2
TA = 25°C
RS = 20 Ω
VDD = 5 V
1f – Frequency – Hz
200
1000
0
25
50
75
100
125
150
175
10 100
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
– Equivalent Input Noise Voltage – nV/ Hz
Vn
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
30 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
single-supply operation
While the TLC27L4 and TLC27L9 perform well using dual power supplies (also called balanced or split
supplies), the design is optimized for single-supply operation. This design includes an input common-mode
voltage range that encompasses ground as well as an output voltage range that pulls down to ground. The
supply voltage range extends down to 3 V (C-suffix types), thus allowing operation with supply levels commonly
available for TTL and HCMOS; however, for maximum dynamic range, 16-V single-supply operation is
recommended.
Many single-supply applications require that a voltage be applied to one input to establish a reference level that
is above ground. A resistive voltage divider is usually sufficient to establish this reference level (see Figure 38).
The low input bias current of the TLC27L4 and TLC27L9 permits the use of very large resistive values to
implement the voltage divider, thus minimizing power consumption.
The TLC27L4 and TLC27L9 work well in conjunction with digital logic; however, when powering both linear
devices and digital logic from the same power supply, the following precautions are recommended:
1. Power the linear devices from separate bypassed supply lines (see Figure 39); otherwise, the linear
device supply rails can fluctuate due to voltage drops caused by high switching currents in the digital
logic.
2. Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive
decoupling is often adequate; however, high-frequency applications may require RC decoupling.
R4
VO
VDD
R2
R1
VI
VREF R3 C
0.01 µF
–
+
VREF = VDD R3
R1 + R3
VO = (VREF – VI)R4
R2 + VREF
Figure 38. Inverting Amplifier With Voltage Reference
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
31
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
single-supply operation (continued)
LogicLogicLogic
–
+
–
+
(a) COMMON SUPPLY RAILS
(b) SEPARATE BYPASSED SUPPLY RAILS (preferred)
Logic Logic Logic Power
Supply
Power
Supply
Output
Output
Figure 39. Common Versus Separate Supply Rails
input characteristics
The TLC27L4 and TLC27L9 are specified with a minimum and a maximum input voltage that, if exceeded at
either input, could cause the device to malfunction. Exceeding this specified range is a common problem,
especially in single-supply operation. Note that the lower range limit includes the negative rail, while the upper
range limit is specified at VDD – 1 V at TA = 25°C and at VDD – 1.5 V at all other temperatures.
The use of the polysilicon-gate process and the careful input circuit design gives the TLC27L4 and TLC27L9
very good input offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltage
drift in CMOS devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus
dopant implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate)
alleviates the polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude.
The offset voltage drift with time has been calculated to be typically 0.1 µV/month, including the first month of
operation.
Because of the extremely high input impedance and resulting low bias current requirements, the TLC27L4 and
TLC27L9 are well suited for low-level signal processing; however, leakage currents on printed circuit boards
and sockets can easily exceed bias current requirements and cause a degradation in device performance. It
is good practice to include guard rings around inputs (similar to those of Figure 4 in the Parameter Measurement
Information section). These guards should be driven from a low-impedance source at the same voltage level
as the common-mode input (see Figure 40).
The inputs of any unused amplifiers should be tied to ground to avoid possible oscillation.
noise performance
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage
differential amplifier . The low input bias current requirements of the TLC27L4 and TLC27L9 result in a very low
noise current, which is insignificant in most applications. This feature makes the devices especially favorable
over bipolar devices when using values of circuit impedance greater than 50 kΩ, since bipolar devices exhibit
greater noise currents.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
32 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
noise performance (continued)
VI
(a) NONINVERTING AMPLIFIER (c) UNITY-GAIN AMPLIFIER
–
+
(b) INVERTING AMPLIFIER
VI
–
+
–
+
VIVOVOVO
Figure 40. Guard-Ring Schemes
output characteristics
The output stage of the TLC27L4 and TLC27L9 is designed to sink and source relatively high amounts of current
(see typical characteristics). If the output is subjected to a short-circuit condition, this high current capability can
cause device damage under certain conditions. Output current capability increases with supply voltage.
All operating characteristics of the TLC27L4 and TLC27L9 were measured using a 20-pF load. The devices
drive higher capacitive loads; however, as output load capacitance increases, the resulting response pole
occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation (see Figure 41). In many
cases, adding a small amount of resistance in series with the load capacitance alleviates the problem.
–
+
2.5 V
VO
CL
–2.5 V
VI
(a) CL = 20 pF, RL = NO LOAD (b) CL = 260 pF, RL = NO LOAD
(c) CL = 310 pF, RL = NO LOAD (d) TEST CIRCUIT
TA = 25°C
f = 1 kHz
VIPP = 1 V
Figure 41. Effect of Capacitive Loads and Test Circuit
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
33
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
output characteristics (continued)
Although the TLC27L4 and TLC27L9 possess excellent high-level output voltage and current capability,
methods for boosting this capability are available, if needed. The simplest method involves the use of a pullup
resistor (Rb) connected from the output to the positive supply rail (see Figure 42). There are two disadvantages
to the use of this circuit. First, the NMOS pulldown transistor N4 (see equivalent schematic) must sink a
comparatively large amount of current. In this circuit, N4 behaves like a linear resistor with an on-resistance
between approximately 60 Ω and 180 Ω, depending on how hard the operational amplifier input is driven. With
very low values of RP, a voltage offset from 0 V at the output occurs. Second, pullup resistor R P acts as a drain
load to N4 and the gain of the operational amplifier is reduced at output voltage levels where N5 is not supplying
the output current.
Figure 42. Resistive Pullup to Increase VOH
–
+
VI
VDD
RP
VO
R2
R1 RL
IP
IF
IL
IP = Pullup current
required by the
operational amplifier
(typically 500 µA)
Rp =VDD – VO
IF + IL + IP
Figure 43. Compensation for
Input Capacitance
–
+
C
VO
feedback
Operational amplifier circuits nearly always employ feedback, and since feedback is the first prerequisite for
oscillation, some caution is appropriate. Most oscillation problems result from driving capacitive loads
(discussed previously) and ignoring stray input capacitance. A small-value capacitor connected in parallel with
the feedback resistor is an effective remedy (see Figure 43). The value of this capacitor is optimized empirically .
electrostatic discharge protection
The TLC27L4 and TLC27L9 incorporate an internal electrostatic discharge (ESD) protection circuit that
prevents functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care
should be exercised, however, when handling these devices, as exposure to ESD may result in the degradation
of the device parametric performance. The protection circuit also causes the input bias currents to be
temperature dependent and have the characteristics of a reverse-biased diode.
latch-up
Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC27L4 and
TLC27L9 inputs and outputs were designed to withstand –100-mA surge currents without sustaining latch-up;
however, techniques should be used to reduce the chance of latch-up whenever possible. Internal protection
diodes should not, by design, be forward biased. Applied input and output voltage should not exceed the supply
voltage by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators.
Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the
supply rails as close to the device as possible.
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
34 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
latch-up (continued)
The current path established if latch-up occurs is usually between the positive supply rail and ground and can
be triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply
voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the
forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of
latch-up occurring increases with increasing temperature and supply voltages.
–
+
–
+
500 kΩ
500 kΩ
5 V
500 kΩ
0.1 µF
500 kΩ
VO2
VO1
1/4
TLC27L4
TLC27L4
1/4
Figure 44. Multivibrator
TLC27L4
1/4
–
+
100 kΩ
VDD
33 kΩ
100 kΩ
100 kΩ
Set
Reset
VO
NOTE: VDD = 5 V to 16 V
Figure 45. Set/Reset Flip-Flop
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
35
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
–
+
VDD
VO
90 kΩ
9 kΩ
X1
11B
TLC4066
VDD
VI
S1
S2
C
A
C
A2
X2 2B
1 kΩ
Analog
Switch
1/4
TLC27L9
SELECT
AV
S1S2
10 100
NOTE: VDD = 5 V to 12 V
Figure 46. Amplifier With Digital Gain Selection
–
+
10 kΩ
VO
100 kΩ
VDD
20 kΩ
VI
1/4
TLC27L4
NOTE: VDD = 5 V to 16 V
Figure 47. Full-Wave Rectifier
TLC27L4, TLC27L4A, TLC27L4B, TLC27L4Y, TLC27L9
LinCMOS PRECISION QUAD OPERATIONAL AMPLIFIERS
SLOS053C – OCTOBER 1987 – REVISED AUGUST 1994
36 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
–
+
5 V
0.016 µF
10 kΩ10 kΩ
VO
0.016 µF
VI
1/4
TLC27L4
NOTE: Normalized to FC = 1 kHz and RL = 10 kΩ
Figure 48. Two-Pole Low-Pass Butterworth Filter
VIA
VDD
–
+
VIB
R2
100 kΩ
10 kΩ
R1
100 kΩ
R2
TLC27L9
1/4
VO
R1
10 kΩ
NOTE: VDD = 5 V to 16 V
VO
+
R2
R1
ǒ
VIB
*
VIA
Ǔ
Figure 49. Difference Amplifier
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TLC27L4ACD ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4ACDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4ACDR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4ACDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4ACN ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L4ACNE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L4AID ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4AIDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4AIDR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4AIDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4AIN ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L4AINE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L4BCD ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4BCDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4BCDR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4BCDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4BCN ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L4BCNE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L4BID ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4BIDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4BIDR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4BIDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4BIN ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L4BINE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L4CD ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 8-Dec-2008
Addendum-Page 1
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TLC27L4CDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4CDR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4CN ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L4CNE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L4CNSR ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4CNSRG4 ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4CPW ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4CPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4CPWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI
TLC27L4CPWR ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4CPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4ID ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4IDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4IDR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4IN ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L4INE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L4IPW ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4IPWG4 ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4IPWR ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4IPWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L4MFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI
TLC27L4MJ OBSOLETE CDIP J 14 TBD Call TI Call TI
TLC27L4MJB OBSOLETE CDIP J 14 TBD Call TI Call TI
TLC27L9CD ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L9CDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L9CDR ACTIVE SOIC D 14 2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 8-Dec-2008
Addendum-Page 2
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
no Sb/Br)
TLC27L9CDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L9CN ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L9CNE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L9CNSR ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L9CNSRG4 ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L9ID ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L9IDG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L9IDR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L9IDRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TLC27L9IN ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L9INE4 ACTIVE PDIP N 14 25 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
TLC27L9MFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI
TLC27L9MJ OBSOLETE CDIP J 14 TBD Call TI Call TI
TLC27L9MJB OBSOLETE CDIP J 14 TBD Call TI Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
PACKAGE OPTION ADDENDUM
www.ti.com 8-Dec-2008
Addendum-Page 3
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 8-Dec-2008
Addendum-Page 4
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TLC27L4ACDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4BCDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4BCDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4BIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4BIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4CNSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
TLC27L4CPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLC27L4IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L4IPWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
TLC27L9CDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
TLC27L9CNSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
TLC27L9IDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TLC27L4ACDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4AIDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4AIDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4BCDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4BCDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4BIDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4BIDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4CDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4CNSR SO NS 14 2000 367.0 367.0 38.0
TLC27L4CPWR TSSOP PW 14 2000 367.0 367.0 35.0
TLC27L4IDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L4IPWR TSSOP PW 14 2000 367.0 367.0 35.0
TLC27L9CDR SOIC D 14 2500 367.0 367.0 38.0
TLC27L9CNSR SO NS 14 2000 367.0 367.0 38.0
TLC27L9IDR SOIC D 14 2500 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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