VIN
GND GND
VDD
VDD
CPU
R
470 k:
LMS33460
RESET
VOUT
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LMS33460
SNVS158E –MARCH 2001–REVISED DECEMBER 2016
LMS33460 3-V Undervoltage Detector
1
1 Features
1• Ultra-Low Power
• 3-V Detection
• Input Voltage From 0.8 V to 7 V
• Open-Drain Output
• Ultra-Small 5-Pin SC70 Package
• Extended Temperature Range (–40°C to 85°C)
• Ultra-Low Quiescent Current (1 µA Typical)
2 Applications
• Low Battery Voltage Detectors
• Power Fail Indicators
• Processor Reset Generators
• Battery Backup Controls
• Battery-Operated Equipment
• Hand-Held Instruments
• Undervoltage Detectors
3 Description
The LMS33460 device is an undervoltage detector
with a 3‑V threshold and extremely low power
consumption. The LMS33460 is specifically designed
to accurately monitor power supplies. It is especially
suited to battery-powered systems where low
quiescent current and small size are required. This IC
generates an active output whenever the input
voltage drops below 3 V.
This part uses a precision on-chip voltage reference
and a comparator to measure the input voltage. Built-
in hysteresis helps to prevent erratic operation in the
presence of noise. The UVD is available in the ultra-
miniature 5-pin SC70 package.
Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
LMS33460 SC70 (5) 2.00 mm × 1.25 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application SC70 Package
2
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Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions......................... 3
6 Specifications......................................................... 3
6.1 Absolute Maximum Ratings ...................................... 3
6.2 ESD Ratings.............................................................. 3
6.3 Recommended Operating Conditions....................... 3
6.4 Thermal Information.................................................. 4
6.5 Electrical Characteristics........................................... 4
6.6 Typical Characteristics.............................................. 5
7 Detailed Description.............................................. 6
7.1 Overview................................................................... 6
7.2 Functional Block Diagram......................................... 7
7.3 Feature Description................................................... 7
7.4 Device Functional Modes.......................................... 7
8 Application and Implementation .......................... 8
8.1 Application Information.............................................. 8
8.2 Typical Application.................................................... 8
9 Power Supply Recommendations........................ 9
10 Layout..................................................................... 9
10.1 Layout Guidelines ................................................... 9
10.2 Layout Example ...................................................... 9
11 Device and Documentation Support................. 10
11.1 Receiving Notification of Documentation Updates 10
11.2 Community Resources.......................................... 10
11.3 Trademarks........................................................... 10
11.4 Electrostatic Discharge Caution............................ 10
11.5 Glossary................................................................ 10
12 Mechanical, Packaging, and Orderable
Information........................................................... 10
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision D (April 2013) to Revision E Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes,Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section.................................................................................................. 1
• Deleted Ordering Information table; see POA at the end of the data sheet........................................................................... 1
• Added Thermal Information table........................................................................................................................................... 4
• Changed RθJA value From: 478 To: 275.5.............................................................................................................................. 4
Changes from Revision C (April 2013) to Revision D Page
• Changed layout of National Semiconductor Data Sheet to TI format .................................................................................... 1
1NC
2GND
3GND 4 VOUT
5 VIN
Not to scale
3
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5 Pin Configuration and Functions
DCK Package
5-Pin SC70
Top View
Pin Functions
PIN I/O DESCRIPTION
NAME NO.
GND 2 — Internally connected to ground. Can be left floating or connected to GND (pin 3).
GND 3 — Ground
NC 1 — No connection
VIN 5 I Input supply
VOUT 4 O Voltage output
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Input voltage to GND 8 V
Output voltage to GND 8 V
Output continuous output current 30 mA
Vapor phase IR convection reflow 240 °C
Junction temperature, TJ150 °C
Storage temperature, Tstg –65 150 °C
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2500 V
Machine model ±200
6.3 Recommended Operating Conditions MIN MAX UNIT
TJOperating junction temperature –40 85 °C
4
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(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
6.4 Thermal Information
THERMAL METRIC(1) LMS33460
UNITDCK (SC70)
5 PINS
RθJA Junction-to-ambient thermal resistance 275.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 102.5 °C/W
RθJB Junction-to-board thermal resistance 54 °C/W
ψJT Junction-to-top characterization parameter 2.7 °C/W
ψJB Junction-to-board characterization parameter 53.3 °C/W
(1) Quiescent current increases substantially above 5.5 V, but is very low in the normal range below 5.5 V.
6.5 Electrical Characteristics
TJ= 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VDET Detector threshold VIN falling 2.85 3 3.15 V
VHYS Detector voltage hysteresis VIN rising 0.095 0.155 0.215 V
IIN Input supply current VIN = 2.87 V 1 2.2 µA
VIN = 4.7 V 1.2 3.6 µA
VIN = 7 V(1) 25 200 µA
VIN(MAX) Maximum operating voltage 7 V
VIN(MIN) Minimum operating voltage 0.7 1.1 V
TJ= –40°C to 85°C 1 1.3
IOUT(LOW) Output current low VOUT = 0.05 V, VIN = 1.1 V 0.01 0.6 mA
VOUT = 0.5 V, VIN = 1.5 V 2 11
tPDHL Output delay time (output transition high to low ) CL= 10 pF, RL= 470 kΩ130 200 µs
ΔVDET/ΔT Detect voltage temperature coefficient TJ= –40°C to 85°C ±120 PPM/°C
-40 -15 10 35 60 85 110
TEMPERATURE (°C)
0
50
100
150
200
250
300
OUTPUT DELAY TIME (µs)
tPDHL
VIN
VOUT
tPDHL
-40 -15 10 35 60 85 110
TEMPERATURE (°C)
OUTPUT DELAY TIME (µs)
tPDLH
VIN
VOUT
tPDLH
0
50
100
150
200
250
300
-50 -25 0 25 50 75 100
TEMPERATURE (°C)
3.05
3.15
3.25
3.30
(VIN RISING)
VDET (VIN FALLING)
VHYS
3.20
3.10
3.00
DETECTOR THRESHOLD (V)
0 2 4 6 8 10
0.1
1
10
100
SUPPLY CURRENT (µA)
INPUT VOLTAGE VIN (V)
5
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6.6 Typical Characteristics
TA= 25°C, RL= 470 kΩ, and CL= 10 pF (unless otherwise noted)
Figure 1. Detector Threshold vs Temperature Figure 2. Supply Current vs Input Voltage
Figure 3. Propagation Delay Time (tPDHL) vs Temperature Figure 4. Propagation Delay Time (tPDLH) vs Temperature
Figure 5. VOUT(LOW) vs VIN
VIN
GND
+5.0 V
RL
470 k:
CL
10 pF
LMS33640
VOUT
Copyright © 2016, Texas Instruments Incorporated
0.5V
2.5V
0V
5.0V
tPDLH
tPDHL
TIME
TIME
0V
5.0V
INPUT VOLTAGE
OUTPUT VOLTAGE
VDET
VHYS
VIN(MIN)
VIN Rising
Threshold VIN Falling
Threshold
6
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SNVS158E –MARCH 2001–REVISED DECEMBER 2016
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7 Detailed Description
7.1 Overview
The LMS33460 is a micropower undervoltage-sensing circuit with an open-drain output configuration, which
requires a pull resistor.
The LMS33460 features a voltage reference, a comparator with precise thresholds and built-in hysteresis to
prevent erratic reset operation.
Figure 6. Propagation Delay Timing Diagram
Figure 7. Propagation Delay Test Circuit
VIN
GND
VREF
LMS33460
+
-
Copyright © 2016, Texas Instruments Incorporated
VOUT
7
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7.2 Functional Block Diagram
7.3 Feature Description
The input supply (VIN) is the voltage that is being monitored and as it decreases past 3 V, the active-low output
(VOUT) transitions to a logic low state. When VIN rises above 3 V plus the built-in hysterisis, VOUT returns to its
original state of logic high. The LMS33460 has built-in hysteresis when the input supply is coming back up to
help prevent erratic output operation when the input voltage crosses the threshold.
The LMS33460 is useful in a variety of applications that require low voltage detection and is suited for battery-
powered systems where low quiescent current and small package size is required. It can also be used as a
precision reset circuit for microcontroller applications.
7.4 Device Functional Modes
7.4.1 Start Up
As the input voltage (VIN) ramps up, the output (VOUT) remains logic low until VIN reaches 3.15 V due to the built-
in hysteresis (nominally 150 mV). After VIN crosses that threshold, VOUT remains logic high until VIN drops below
the 3-V threshold. The hysteresis only applies to the VIN rising threshold.
VIN
GND GND
VDD
VDD
CPU
R
470 k:
LMS33460
RESET
VOUT
Copyright © 2016, Texas Instruments Incorporated
8
LMS33460
SNVS158E –MARCH 2001–REVISED DECEMBER 2016
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
This device is ideal to use in battery-powered or microprocessor based systems and can be used as a low
voltage indicator or reset circuit.
8.2 Typical Application
Figure 8. Typical Application Schematic
8.2.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 1. Design Parameters
PARAMETER EXAMPLE VALUE
Input supply voltage maximum 7 V
VOUT maximum 7 V
VOUT minimum 0 V
Pullup resistor 470 kΩ
8.2.2 Detailed Design Procedure
The LMS33460 is a very easy to use low voltage detector. All that required is the input supply voltage and a
pullup resistor at the output. TI recommends 470 kΩfor the pullup resistor.
R1
VIN
GND VOUT
9
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8.2.3 Application Curve
RL= 475 kΩ
* See Figure 4 for tPDLH values
** See Figure 3 for tPDHL values
Figure 9. LMS33460 Turnon
9 Power Supply Recommendations
The input of the LMS33460 is designed to handle up to the recommended supply voltage of 7 V and remain in
the recommended input voltage range during operation. No input capacitor is required.
10 Layout
10.1 Layout Guidelines
Place the output pullup resistor, and delay capacitor if used, as close as possible to the IC. Keep traces short
between the IC and the components used at the output to ensure the timing delay is as accurate as possible.
10.2 Layout Example
Figure 10. Layout Example Diagram
10
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SNVS158E –MARCH 2001–REVISED DECEMBER 2016
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11 Device and Documentation Support
11.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
11.5 Glossary
SLYZ022 —TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Feb-2016
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LMS33460MG NRND SC70 DCK 5 1000 TBD Call TI Call TI -40 to 85 C33
LMS33460MG/NOPB ACTIVE SC70 DCK 5 1000 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 85 C33
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
PACKAGE OPTION ADDENDUM
www.ti.com 18-Feb-2016
Addendum-Page 2
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LMS33460MG SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
LMS33460MG/NOPB SC70 DCK 5 1000 178.0 8.4 2.25 2.45 1.2 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 18-Feb-2016
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LMS33460MG SC70 DCK 5 1000 210.0 185.0 35.0
LMS33460MG/NOPB SC70 DCK 5 1000 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 18-Feb-2016
Pack Materials-Page 2
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