2.7V to 16.5V Hot Swap Controller
with Tracking or Slew Rate Control
Preliminary Technical Data
ADM1173
FEATURES
Allows Safe Board Insertion and Removal from a Live
Backplane
Controls Supply Voltages from 2.7 V to 16.5V
Adjustable Analog Current Limit with Circuit Breaker
Fast Response Limits Peak Fault Current
Automatic Retry or Latch-Off On Current Fault
Adjustable Voltage Slew Rate Control
Charge Pumped Gate Drive for External N-FET Switch
TIMER pin allows control over timing functions
Undervoltage Lockout
8-pin TSOT Package
APPLICATIONS
Hot Swap Board Insertion – Line Cards, Raid systems
Electronic Circuit Breaker
Industrial High Side Switch/Circuit Breaker
APPLICATIONS DIAGRAM
GENERAL DESCRIPTION
The ADM1173 is a Hot Swap controller that allows a board to
be safely inserted and removed from a live backplane.
An internal charge pumped driver controls the GATE of an
external high side N-channel FET for a supply voltage ranging
from 2.7V to 16.5V. The ADM1173 provides the initial timing
cycle and allows the GATE to be ramped up at an adjustable
rate. The Slew rate of the Output is controlled a capacitor or
supply on the SLEW pin.
The ADM1173 features a fast current limit loop providing
active current limiting together with a circuit breaker timer.
The signal at the ON pin turns the part on and off and is also
used for the reset function.
A capacitor connected to the TIMER pin gives the user control
over the duty cycle of the PWM retry ratio during current fault.
This part is available in two options: the ADM1173-1 will
automatic retry for over-current fault and the ADM1173-2 will
latch-off for an over-current fault.
The ADM1173 is packaged in an 8-lead TSOT package.
Rev.PrE
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
Q1
GATE
V
cc
TIMER
ON / CLR
ADM1173
GND
R
SENSE
VIN=5V
GND
LONG
LONG
SHORT RON1
RON2
CTIMER
CLOAD
GND
VOUT=5V
SLEW
CSLEW
SENSE-
VOUT
© 2005
Preliminary Technical Data ADM1173
Rev. PrE | Page 2 of 8
SPECIFICATIONS
Table 1. VCC = 2.7V to 16V, TA = -40°C to +85°C, Typical Values at TA = 25°C unless otherwise noted.
Parameter Min Typ Max Units Conditions
VCC Pin
Operating Voltage Range, VCC 2.7 16.5 V
Supply Current, Icc 0.65 1.0 mA
Undervoltage Lockout, VUVLO 2.4 2.525 2.65 V VCC Rising
Undervoltage Lockout Hysteresis, VUVLOHYS 25
mV
ON Pin
ON Pin Input Current, IINON -100 0 100
nA
On Pin Threshold, VON 1.26 1.3 1.34
V ON rising
ON Pin Threshold Hysteresis, VONHYST 80
mV
RS- Pin
Hot Swap Voltage 2.7 16.5 V
RS- Pin Input Current, IINSENSE TBD -200 TBD µA VSENSE = VCC, VHOTSWAP = 0.6 V, Note
10 20 30 µA VSENSE = VCC, VHOTSWAP > 2.2 V
Circuit Breaker Limit Voltage, VCB 34 47 60
mV VCB = (VCC – VSENSE) ,VHOTSWAP = 0.6 V
44 47 53
mV VCB = (VCC – VSENSE) ,VHOTSWAP > 2.2 V
Over Current Limit Voltage, VOC 40 53 66
mV VHOTSWAP = 0.6 V, Note
50 53 59
mV VHOTSWAP > 2.2 V
GATE Pin
GATE Drive Voltage, VGATE 5 6.5 10 V VGATE – VCC, VCC = 2.7V
GATE Drive Voltage, VGATE 6 8 12 V VGATE – VCC, VCC = 5V
GATE Drive Voltage, VGATE 5 6.5 10 V VGATE – VCC, VCC = 16.5V
Gate Pullup Current 10 12 14 uA VGATE = 0V
Gate Pulldown Current 2 mA VGATE = 3V, Vcc > UVLO
Gate Pulldown Current 25 mA VGATE = 3V, Vcc < UVLO
TIMER Pin
TIMER Pin Pull-Up Current, ITIMERUP -4 -5 -6
µA Initial Cycle, VTIMER = 1V
-48 -60 -72 µA During Current Fault, VTIMER = 1V
TIMER Pin Pull-Down Current, ITIMERDN 2 2.5
µA After Current Fault, VTIMER = 1V
100
µA Normal Operation, VTIMER = 1V
TIMER Pin Threshold High, VTIMERH 1.235 1.3 1.365 V TIMER rising
TIMER Pin Threshold Low, VTIMERL 0.18 0.2 0.22
V TIMER falling
CSLEW Pin
Slew up Current -10 µA
Slew down Current 10 µA
Tracking Gain 1 V/V VSLEW/VOUTFB
Tracking Accuracy -100 100 mV
Minimum Tracking Voltage 0.1 V
Maximum Tracking voltage Vcc – 0.1 V
Slew Rate 100 1000 V/s
VOUTFB Pin
Input Current -100 100
µA
Voltage Range 0 Vcc V
Preliminary Technical Data ADM1173
Rev. PrE | Page 3 of 8
Absolute Maximum Ratings
Parameter Rating
VCC Pin 20V
RS+, RS- Pins -0.3V to 20V
TIMER Pin -0.3V to (VCC + 0.3V)
Slew Pin -0.3 to 20V
ON Pin -0.3V to 20V
GATE Pin VCC + 11V
Power Dissipation TBD
Storage Temperature –65°C to +125°C
Operating Temperature Range –40°C to +85°C
Lead Temperature Range (10 sec) 300°C
Junction Temperature 150°C
Preliminary Technical Data ADM1173
Rev. PrE | Page 4 of 8
HOT CIRCUIT INSERTION
When circuit boards are inserted into live backplanes, the
supply bypass capacitors can draw large transient currents
from the backplane power bus as they charge. Such transient
currents can cause permanent damage to connector pins,
glitches on the system supply or reset other boards in the
system.
The ADM1173 is designed to turn a printed circuit board’s
supply voltage ON and OFF in a controlled manner, allowing
the circuit board to be safely inserted into or removed from a
live backplane. The ADM1173 can reside either on the
backplane or on the daughter board for hot circuit insertion
applications.
OVERVIEW
The ADM1173 is designed to operate over a range of supplies
from 2.7V to 16.5V. Upon insertion, an undervoltage lockout
circuit determines if sufficient supply voltage is present. When
the ON pin goes high an initial timing cycle assures that the
board is fully seated in the backplane before the FET is turned
on. A single timer capacitor sets the periods for all of the timer
functions. After the initial timing cycle the ADM1173 can
either start up in current limit or with a lower load current.
Once the external FET is fully enhanced and the supply has
ramped up, the ADM1173 monitors the load current through
an external sense resistor. Overcurrent faults are actively
limited to 47mV/RSENSE for a specified circuit breaker timer
limit. The ADM1173-1 will automatically retry after a current
limit fault while the ADM1173-2 latches off. The ADM1173-1
timer function limits the retry duty cycle to 3.8% for FET
cooling.
UNDERVOLTAGE LOCKOUT
An internal undervoltage lockout (UVLO) circuit resets the
ADM1173 if the VCC supply is too low for normal operation.
The UVLO has a low-to-high threshold of 2.525V, a 25mV
hysteresis. Above 2.525V supply voltage, the ADM1173 will
start if the ON pin conditions are met.
ON FUNCTION
The ON pin is the input to a comparator which has a low-to-
high threshold of 1.3V, an 80mV hysteresis and a high-to-
low glitch filter of 30µs. A low input on the ON pin resets
the ADM1173 TIMER status and turns off the external FET by
pulling the GATE pin to ground. A low-to-high transition on
the ON pin starts an initial cycle followed by a start-up cycle.
The output will then start to rise at a rate determined by the
slew rate of the SLEW pin. A 10k pull-up resistor connecting
the ON pin to the supply is recommended. The 10k resistor
shunts any potential static charge on the backplane and reduces
the overvoltage stress at the ON pin during live insertion.
Alternatively, an external resistor divider at the ON pin can be
used to program an undervoltage lockout value higher than the
internal UVLO circuit. An RC filter can be added at the ON pin
to increase the delay time at card insertion if the internal glitch
filter delay is insufficient.
GATE FUNCTION
During hot insertion of the PCB, an abrupt application of
supply voltage charges the external FET drain/gate capacitance.
This can cause an unwanted gate voltage spike. An internal
circuit holds GATE low before the internal circuitry wakes up.
This reduces the FET current surges substantially at insertion.
The GATE pin is held low in reset mode and during the initial
timing cycle. In the start-up cycle the GATE pin is pulled up by
a 12µA current source. During an over-current fault condition,
the error amplifier servos the GATE pin to maintain a constant
current to the load until the circuit breaker trips. When the
circuit breaker trips, the GATE pin shuts down abruptly.
SLEW RATE CONTROL
The slew rate of a rising or falling supply can be controlled by
an external capacitor on the SLEW pin. Alternatively, this pin
can be overdriven with a supply which will result in the output
following this supply. This enables the ADM1173 to behave as a
voltage tracker.
CURRENT LIMIT CIRCUIT BREAKER FUNCTION
The ADM1173 features a current limiting circuit breaker.
When there is a sudden load current surge, such as a low
impedance fault, the bus supply voltage can drop significantly
to a point where the power to an adjacent card is
affected, causing system malfunctions. The ADM1173 fast
response current sense amplifier instantly limits current by
reducing the external FET GATE pin voltage. This
minimizes the bus supply voltage drop and permits power
budgeting and fault isolation without affecting neighboring
cards. A compensation circuit should be connected to
the GATE pin for current limit loop stability.
Preliminary Technical Data ADM1173
Rev. PrE | Page 5 of 8
CALCULATING CURRENT LIMIT
The nominal fault current limit is determined by a sense
resistor connected between VCC and the SENSE pin as
given by the equation below:
ILIMIT(NOM) = VCB(NOM) / RSENSE (1)
The minimum load current is given by Equation 2:
ILIMIT(MIN) = VCB(MIN) / RSENSE(MAX) (2)
The maximum load current is given by Equation 3:
ILIMIT(MAX) = VCB(MAX) / RSENSE(MIN) (3)
Note: The power rating of the sense resistor should be rated at
the fault current level.
For proper operation, the minimum current limit must exceed
the circuit maximum operating load current with margin. The
sense resistor power rating must exceed VCB(MAX)2
/RSENSE(MIN).
TIMER FUNCTION
The TIMER pin handles several key functions with an external
capacitor, CTIMER. There are two comparator thresholds:
COMP1 (0.2V) and COMP2 (1.3V). The four timing current
sources are:
• 5µA pull-up
• 60µA pull-up
• 2µA pull-down
• 100µA pull-down
The 100µA is a non-ideal current source approximating a 7k
resistor below 0.4V.
INITIAL TIMING CYCLE
When the card is being inserted into the bus connector, the
long pins mate first which brings up the supply VIN at time
point 1 of Figure 1. The ADM1173 is in reset mode as the ON
pin is low. GATE is pulled low and the TIMER pin is pulled low
with a 100µA source. At time point 2, the short pin makes
contact and ON is pulled high. At this instant, a start-up check
requires that the supply voltage be above UVLO, the ON pin
beabove1.3Vand the TIMER pin voltage be less than 0.2V.
When these three conditions are fulfilled, the initial cycle
begins and the TIMER pin is pulled high with 5µA. At time
point 3, the TIMER reaches the COMP2 threshold and the first
portion of the initial cycle ends. The 100µA current source then
pulls down the TIMER pin until it reaches 0.2V at time point 4.
The initial cycle delay (time point 2 to time point 4) is related to
CTIMER by equation:
tINITIAL ~= 272.9 x CTIMER ms/uF (4)
When the initial cycle terminates, a start-up cycle is activated
and the GATE pin ramps high. The TIMER pin continues to be
pulled down towards ground.
VIN
VON
VGATE
VOUT
RESET
M
O
D
E
VTIMER
INITIAL
CYCLE START-UP
CYCLE NORMAL
CYCLE
Figure 1: Normal Start-up
Preliminary Technical Data ADM1173
Rev. PrE | Page 6 of 8
VIN
VON
VGATE
VOUT
RESET
MODE
VTIMER
INITIAL
CYCLE START-UP
CYCLE NORMAL
CYCLE
IRSENSE
5µA
100µA
60µA
2µA
100µA
VTH
Figure 2: Current Limiting at Start-up
KELVIN SENSE RESISTOR CONNECTION
When using a low-value sense resistor for high current
measurement the problem of parasitic series resistance can
arise. The lead resistance can be a substantial fraction of the
rated resistance making the total resistance a function of lead
length. This problem can be avoided by using a Kelvin sense
connection. This type of connection separates the current path
through the resistor and the voltage drop across the resistor.
Figure 18 below shows the correct way to connect the sense
resistor between the VCC and RS- pins of the ADM1173.
SENSE RESISTOR
KELVIN SENSETRACES
CURRENT
FLOW TO-48V
BACKPLANE
CURRENT
FLOWFROM
LOAD
SENSE V
EE
ADM1073
Figure 2: Current Sense Kelvin connection
Current Flow to
Load
Current Flow
from source
VCC RS-
Preliminary Technical Data ADM1173
Rev. PrE | Page 7 of 8
PIN CONFIGURATIONS
1
2
3
V
CC
RS-GND
ADM1173-2AUJ
TOP VIEW
(Not to Scale)
SLEW
TIMER
8
7
GATE
ON-CLR
45
6
1
2
3
V
CC
RS-
GND
ADM1173-1AUJ
TOP VIEW
(Not to Scale)
TIMER
8
7
GATE
ON
45
6
VOUTFB VOUTFB
SLEW
PIN FUNCTIONAL DESCRIPTIONS
Pin No. Name Description
1 TIMER
Timer Input Pin. An external capacitor CTIMER sets a 272.9ms/µF initial timing delay and a
21.7ms/µF circuit breaker delay. The GATE pin turns off whenever the TIMER pin is pulled
beyond the upper threshold, such as for overvoltage detection with an external zener.
2 GND Chip Ground Pin
3 UP/STOP
ON (ON-CLR)
Input Pin. The ON pin comparator has a low-to-high threshold of 1.3V with 80mV
hysteresis and a glitch filter. When the ON pin is low, the ADM1173 is reset. When the
ON pin goes high, the GATE turns on after the initial timing cycle. On the ADM1173-2, a
rising edge on this pin has the added function of clearing a fault and restarting the
device
4 VOUTFB Monitors the Source of the external FET
5 GATE
GATE Output Pin. This pin is the high side gate drive of an external N-channel FET. An
internal charge pump provides a 12µA pull-up current with Zener clamps to RS+ and
ground. In overload, the error amplifier (EA) controls the external FET to maintain a
constant load current.
6 SLEW
Connect to an external capacitor to control the slew rate of the of the GATE at turn on
and turn-off.
7 R S-
Current Limit Sense Input Pin. A sense resistor between the Vcc and RS- pins sets the
analog current limit. In overload, the EA controls the external FET gate to maintain the
SENSE voltage at 50mV. When the EA is maintaining current limit, the TIMER circuit
breaker mode is activated. The current limit loop/circuit breaker mode can be disabled
by connecting the Vcc pin and RS- pin together.
8 VCC Positive Supply Input Pin. The operating supply voltage range is between 2.7V to 16.5V.
An undervoltage lockout (UVLO) circuit with a glitch filter resets the ADM1173 when a
low supply voltage is detected.
OUTLINE DIMENSIONS
Figure 3. 8-Lead TSOT Package (UJ-8)—Dimensions shown in millimeters
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Table 2. Ordering Guide
Part Number Version Temperature Package Package Description Package Outline
ADM1173-1AUJ Automatic Retry Version –40°C to +85°C TSOT UJ-8
ADM1173-2AUJ Latched Off Version –40°C to +85°C TSOT UJ-8
2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective companies.
Printed in the U.S.A.
ADM1173
Preliminary Technical Data
2005
PR05127-0-2/05(PrE)
