1
±60V Fault Protected, 5V, RS-485/RS-422 Transceivers
with ±25V Common Mode Range
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
ISL31496E, ISL31498E
The ISL31490E, ISL31491E, ISL31492E, ISL31493E,
ISL31495E, ISL31496E, ISL31498E are fault protected, 5V
powered, differential transceivers that exceed the RS-485 and
RS-422 standards for balanced communication. The RS-485
transceiver pins (driver outputs and receiver inputs) are
protected against faults up to ±60V. Additionally, the extended
common mode range allows these transceivers to operate in
environments with common mode voltages up to ±25V (>2x the
RS-485 requirement), making this RS-485 family one of the
most robust on the market.
Transmitters deliver an exceptional 2.5V (typical) differential
output voltage into the RS-485 specified 54Ω load. This yields
better noise immunity than standard RS-485 ICs, or allows up
to six 120Ω terminations in star network topologies.
Receiver (Rx) inputs feature a “Full Fail-Safe” design, which
ensures a logic high Rx output if Rx inputs are floating, shorted,
or on a terminated but undriven (idle) bus. Rx outputs have high
drive levels - typically 15mA @ VOL = 1V (for opto-coupled,
isolated applications).
Half duplex (Rx inputs and Tx outputs multiplexed together)
and full duplex pinouts are available. See Table 1 on page 2 for
key features and configurations by device number.
For fault protected or wide common mode range devices with
cable invert (polarity reversal) or logic supply (VL) pins, please
see the ISL31480E data sheet.
Features
• Fault Protected RS-485 Bus Pins. . . . . . . . . . . . . . Up to ±60V
• Extended Common Mode Range . . . . . . . . . . . . . . . . . . . ±25V
More than Twice the Range Required for RS-485
• 1/4 Unit Load for up to 128 Devices on the Bus
• High Transient Overvoltage Tolerance . . . . . . . . . . . . . . . ±80V
• Full Fail-safe (Open, Short, Terminated) RS-485 Receivers
•High Rx I
OL for Opto-Couplers in Isolated Designs
• Hot Plug Circuitry - Tx and Rx Outputs Remain Three-State
During Power-up/Power-down
• Choice of RS-485 Data Rates. . . . . . . . . 250kbps to 15Mbps
• Low Quiescent Supply Current . . . . . . . . . . . . . . . . . . . 2.3mA
• Ultra Low Shutdown Supply Current . . . . . . . . . . . . . . . . 10µA
• Pb-Free (RoHS Compliant)
Applications
• Utility Meters/Automated Meter Reading Systems
•High Node Count Systems
• PROFIBUS™ and Field Bus Networks, and Factory
Automation
•Security Camera Networks
• Building Lighting and Environmental Control Systems
• Industrial/Process Control Networks
FIGURE 1. EXCEPTIONAL Rx OPERATES AT >15Mbps EVEN WITH A
±25V COMMON MODE VOLTAGE
FIGURE 2. ISL3149XE DELIVERS SUPERIOR COMMON MODE
RANGE vs STANDARD RS-485 DEVICES
TIME (20ns/DIV)
VOLTAGE (V)
-5
0
5
10
15
20
25
30
BVID = ±1V
A
RO
ISL3149xE
COMMON MODE RANGE
CLOSEST
COMPETITOR
STANDARD RS-485
TRANSCEIVER
-25
-20
-12
-7
0
12
25
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2010, 2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
December 22, 2011
FN7637.1
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
2FN7637.1
December 22, 2011
TABLE 1. SUMMARY OF FEATURES
PART NUMBER
HALF/FULL
DUPLEX
DATA RATE
(Mbps)
SLEW-RATE
LIMITED? EN PINS?
HOT
PLUG?
QUIESCENT ICC
(mA)
LOW POWER
SHDN?
PIN
COUNT
ISL31490E Full 0.25 Yes Yes Yes 2.3 Yes 10, 14
ISL31491E Full 0.25 Yes No Yes 2.3 No 8
ISL31492E Half 0.25 Yes Yes Yes 2.3 Yes 8
ISL31493E Full 1 Yes Yes Yes 2.3 Yes 10, 14
ISL31495E Half 1 Yes Yes Yes 2.3 Yes 8
ISL31496E Full 15 No Yes Yes 2.3 Yes 10, 14
ISL31498E Half 15 No Yes Yes 2.3 Yes 8
Ordering Information
PART NUMBER
(Notes 3, 4)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL31490EIBZ (Note 1) ISL31490 EIBZ -40 to +85 14 Ld SOIC M14.15
ISL31490EIUZ (Note 1) 1490E -40 to +85 10 Ld MSOP M10.118
ISL31490EIRTZ (Note 1) 490E -40 to +85 10 Ld TDFN L10.3x3A
ISL31491EIBZ (Note 1) 31491 EIBZ -40 to +85 8 Ld SOIC M8.15
ISL31492EIBZ (Note 1) 31492 EIBZ -40 to +85 8 Ld SOIC M8.15
ISL31492EIUZ (Note 1) 1492E -40 to +85 8 Ld MSOP M8.118
ISL31492EIPZ (Note 2) 31492 EIPZ -40 to +85 8 Ld PDIP E8.3
ISL31492EIRTZ (Note 1) 492E -40 to +85 8 Ld TDFN L8.3x3K
ISL31493EIBZ (Note 1) ISL31493 EIBZ -40 to +85 14 Ld SOIC M14.15
ISL31493EIUZ (Note 1) 1493E -40 to +85 10 Ld MSOP M10.118
ISL31495EIBZ (Note 1) 31495 EIBZ -40 to +85 8 Ld SOIC M8.15
ISL31495EIUZ (Note 1) 1495E -40 to +85 8 Ld MSOP M8.118
ISL31496EIBZ (Note 1) ISL31496 EIBZ -40 to +85 14 Ld SOIC M14.15
ISL31496EIUZ (Note 1) 1496E -40 to +85 10 Ld MSOP M10.118
ISL31498EIBZ (Note 1) 31498 EIBZ -40 to +85 8 Ld SOIC M8.15
ISL31498EIUZ (Note 1) 1498E -40 to +85 8 Ld MSOP M8.118
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. Pb-free PDIPs can be used for through-hole wave solder processing only. They are not intended for use in Reflow solder processing applications.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
4. For Moisture Sensitivity Level (MSL), please see device information pages for ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E,
ISL31498E. For more information on MSL please see techbrief TB363.
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
3FN7637.1
December 22, 2011
Pin Configurations
ISL31492E, ISL31495E, ISL31498E
(8 LD MSOP, 8 LD SOIC,
8 LD PDIP, 8 LD TDFN)
TOP VIEW
ISL31490E, ISL31493E, ISL31496E
(10 LD MSOP, 10 LD TDFN)
TOP VIEW
ISL31490E, ISL31493E, ISL31496E
(14 LD SOIC)
TOP VIEW
ISL31491E
(8 LD SOIC)
TOP VIEW
NOTE: Evaluate creepage and clearance requirements at your maximum fault voltage before using small pitch packages (e.g., MSOP and TDFN).
RO
RE
DE
DI
1
2
3
4
8
7
6
5
VCC
B/Z
A/Y
GND
D
R
RO
RE
DE
DI
GND
VCC
A
B
Z
Y
1
2
3
4
5
10
9
8
7
6
D
RNC
RO
RE
DE
DI
GND
GND
VCC
VCC
A
B
Z
Y
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
D
R
RO
DI
GND
VCC A
B
Z
Y
D
R
1
2
3
4
8
7
6
5
Truth Tables
TRANSMITTING
INPUTS OUTPUTS
RE DE DI Z Y
X1101
X1010
0 0 X High-Z High-Z
10XHigh-Z*High-Z*
NOTE: *Low Power Shutdown Mode (see Note 15 on page 10), except for
ISL31491E.
RECEIVING
INPUTS OUTPUT
RE DE
Half Duplex
DE
Full Duplex
A-B RO
00 X ≥ -0.01V 1
00 X ≤ -0.2V 0
00 X Inputs
Open/Shorted
1
10 0 X High-Z*
11 1 X High-Z
NOTE: *Low Power Shutdown Mode (see Note 15 on page 10), except for
ISL31491E.
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
4FN7637.1
December 22, 2011
Pin Descriptions
PIN
NAME
8 LD
PIN #
(EXCEPT
ISL31491E)
8 LD
PIN #
(ISL31491E
ONLY)
10 LD
PIN #
14 LD
PIN # FUNCTION
RO 1 2 1 2 Receiver output: If A-B ≥ -10mV, RO is high; If A-B ≤ -200mV, RO is low; RO = High if A and
B are unconnected (floating), shorted together, or connected to an undriven, terminated
bus.
RE 2 - 2 3 Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE
is high. Internally pulled low.
DE 3 - 3 4 Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They
are high impedance when DE is low. Internally pulled high.
DI 4 3 4 5 Driver input. A low on DI forces output Y low and output Z high. Similarly, a high on DI
forces output Y high and output Z low.
GND 5 4 5 6, 7 Ground connection. This is also the potential of the TDFN EPAD.
A/Y 6 - - - ±60V Fault Protected RS-485/RS-422 level, non-inverting receiver input and non
inverting driver output. Pin is an input if DE = 0; pin is an output if DE = 1.
B/Z 7 - - - ±60V Fault Protected RS-485/RS-422 level, inverting receiver input and inverting driver
output. Pin is an input if DE = 0; pin is an output if DE = 1.
A - 8 9 12 ±60V Fault Protected RS-485/RS-422 level, non-inverting receiver input.
B - 7 8 11 ±60V Fault Protected RS-485/RS-422 level, inverting receiver input.
Y - 5 6 9 ±60V Fault Protected RS-485/RS-422 level, non-inverting driver output.
Z - 6 7 10 ±60V Fault Protected RS-485/RS-422 level, inverting driver output.
VCC 8 1 10 13, 14 System power supply input (4.5V to 5.5V).
PD - - TDFN
ONLY
- TDFN exposed thermal pad (EPAD). Connect to GND.
NC - - - 1, 8 No Internal Connection.
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
5FN7637.1
December 22, 2011
Typical Operating Circuits
ISL31492E, ISL31495E, ISL31498E
ISL31490E, ISL31493E, ISL31496E (SOIC PIN NUMBERS SHOWN)
ISL31491E
0.1µF
+
D
R
7
6
8
1
2
3
4
5
VCC
GND
RO
RE
DE
DI
A/Y
B/Z
+5V
0.1µF +
D
R
6
7
8
1
2
3
4
5
VCC
GND
RO
RE
DE
DI
A/Y
B/Z
+5V
RTRT
0.1µF
+
D
R
12
11
10
9
13, 14
2
3
4
5
6, 7
VCC
GND
RO
RE
DE
DI
A
B
Y
Z
+5V
0.1µF +
D
R
12
11
10
9
13, 14
2
3
4
5
6, 7
VCC
GND
RO
RE
DE
DI
A
B
Y
Z
+5V
RT
RT
0.1µF
+
D
R
8
7
6
5
1
2
3
4
VCC
GND
RO
DI
A
B
Y
Z
+5V
0.1µF +
D
R
8
7
6
5
1
2
3
4
VCC
GND
RO
DI
A
B
Y
Z
+5V
RT
RT
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
6FN7637.1
December 22, 2011
Absolute Maximum Ratings Thermal Information
VCC to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltages
DI, DE, RE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC + 0.3V)
Input/Output Voltages
A/Y, B/Z, A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±60V
A/Y, B/Z, A, B, Y, Z (Transient Pulse Through 100Ω,
(Note 19) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±80V
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC +0.3V)
Short Circuit Duration
Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Indefinite
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see
Latch-up (Tested per JESD78, Level 2, Class A) . . . . . . . . . . . . . . . +125°C
Recommended Operating Conditions
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Bus Pin Common Mode Voltage Range. . . . . . . . . . . . . . . . . . -25V to +25V
Thermal Resistance (Typical) θJA (°C/W) θJC (°C/W)
8 Ld MSOP Package (Notes 5, 8) . . . . . . . . 140 40
8 Ld PDIP* Package (Note 6, 8). . . . . . . . . 105 60
8 Ld SOIC Package (Note 5, 8) . . . . . . . . . . 116 47
8 Ld TDFN Package (Note 7, 9) . . . . . . . . . 50 5
10 Ld MSOP Package (Note 5, 8). . . . . . . . 135 50
10 Ld TDFN Package (Notes 7, 9) . . . . . . . 58 7
14 Ld SOIC Package (Note 5, 8) . . . . . . . . . 88 39
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . . . -65°C to +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .*-see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
*Pb-free PDIPs can be used for through-hole wave solder processing only.
They are not intended for use in Reflow solder processing applications.
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
5. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
6. θJA is measured with the component mounted on a low effective thermal conductivity test board in free air.
7. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379 for details.
8. For θJC, the “case temp” location is taken at the package top center.
9. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA= +25°C (Note 10).
Boldface limits apply over the operating temperature range, -40°C to +85°C.
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 18) TYP
MAX
(Note 18) UNITS
DC CHARACTERISTICS
Driver Differential VOUT (No load) VOD1 Full - - VCC V
Driver Differential VOUT (Loaded, Figure 3A) VOD2 RL = 100Ω (RS-422) Full 2.4 3.2 - V
RL = 54Ω (RS-485) Full 1.5 2.5 VCC V
RL = 54Ω (PROFIBUS, VCC ≥ 5V) Full 2.0 2.5
RL = 21Ω (Six 120Ω terminations for Star
Configurations, VCC ≥ 4.75V)
Full 0.8 1.3 - V
Change in Magnitude of Driver Differential VOUT
for Complementary Output States
ΔVOD RL = 54Ω or 100Ω (Figure 3A) Full - - 0.2 V
Driver Differential VOUT with Common Mode
Load (Figure 3B)
VOD3 RL = 60Ω, -7V ≤ VCM ≤ 12V Full 1.5 2.1 VCC V
RL = 60Ω, -25V ≤ VCM ≤ 25V (VCC ≥4.75V) Full 1.7 2.3
RL = 21Ω, -15V ≤ VCM ≤ 15V (VCC ≥4.75V) Full 0.8 1.1 - V
Driver Common-Mode VOUT (Figure 3) VOC RL = 54Ω or 100ΩFull -1 -3V
RL = 60Ω or 100Ω, -20V ≤ VCM ≤ 20V Full -2.5 -5V
Change in Magnitude of Driver Common-Mode
VOUT for Complementary Output States
ΔVOC RL = 54Ω or 100Ω (Figure 3A) Full - - 0.2 V
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
7FN7637.1
December 22, 2011
Driver Short-Circuit Current IOSD DE = VCC, -25V ≤ VO ≤ 25V (Note 12) Full -250 -250 mA
IOSD1 At First Fold-back, 22V ≤ VO ≤ -22V Full -83 83 mA
IOSD2 At Second Fold-back,
35V ≤ VO ≤ -35V
Full -13 13 mA
Logic Input High Voltage VIH DE, DI, RE Full 2.5 --V
Logic Input Low Voltage VIL DE, DI, RE Full - - 0.8 V
Logic Input Current IIN1 DI Full -1 -1µA
DE, RE Full -15 615 µA
Input/Output Current (A/Y, B/Z) IIN2 DE = 0V, VCC =0V or
5.5V
VIN = 12V Full - 110 250 µA
VIN = -7V Full -200 -75 - µA
VIN = ±25V Full -800 ±240 800 µA
VIN = ±60V
(Note 21)
Full -6 ±0.5 6mA
Input Current (A, B)
(Full Duplex Versions Only)
IIN3 VCC = 0V or 5.5V VIN = 12V Full - 90 125 µA
VIN = -7V Full -100 -70 - µA
VIN = ±25V Full -500 ±200 500 µA
VIN = ±60V
(Note 21)
Full -3 ±0.4 3mA
Output Leakage Current (Y, Z) (Full Duplex
Versions Only)
IOZD RE = 0V, DE = 0V,
VCC = 0V or 5.5V
VIN = 12V Full - 20 200 µA
VIN = -7V Full -100 -5 - µA
VIN = ±25V Full -500 ±40 500 µA
VIN = ±60V
(Note 21)
Full -3 ±0.1 3mA
Receiver Differential Threshold Voltage VTH -25V ≤ VCM ≤ 25V Full -200 -100 -10 mV
Receiver Input Hysteresis ΔVTH -25V ≤ VCM ≤ 25V +25 - 25 - mV
Receiver Output High Voltage VOH IO = -2mA, VID = -10mV Full VCC - 0.5 4.75 - V
IO = -8mA, VID = -10mV Full 2.8 4.2 - V
Receiver Output Low Voltage VOL IO = 6mA, VID = -200mV Full - 0.27 0.4 V
Receiver Output Low Current IOL VO = 1V, VID = -200mV Full 15 22 - mA
Three-State (High Impedance) Receiver Output
Current
IOZR 0V ≤ VO ≤ VCC Full -1 0.01 1µA
Receiver Short-Circuit Current IOSR 0V ≤ VO ≤ VCC Full ±12 -±110 mA
SUPPLY CURRENT
No-Load Supply Current (Note 11) ICC DE = VCC, RE = 0V or VCC, DI = 0V or VCC Full - 2.3 4.5 mA
Shutdown Supply Current ISHDN DE = 0V, RE = VCC, DI = 0V or VCC Full - 10 50 µA
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA= +25°C (Note 10).
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 18) TYP
MAX
(Note 18) UNITS
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
8FN7637.1
December 22, 2011
ESD PERFORMANCE
All Pins Human Body Model
(Tested per JESD22-A114E)
+25 - ±2 - kV
Machine Model
(Tested per JESD22-A115-A)
+25 - ±700 - V
DRIVER SWITCHING CHARACTERISTICS (250kbps Versions; ISL31490E through ISL31492E)
Driver Differential Output Delay tPLH, tPHL RD = 54Ω, CD= 50pF
(Figure 4)
No CM Load Full - 320 450 ns
-25V ≤ VCM ≤ 25V Full - - 1000 ns
Driver Differential Output Skew tSKEW RD = 54Ω, CD= 50pF
(Figure 4)
No CM Load Full - 6 30 ns
-25V ≤ VCM ≤ 25V Full - - 50 ns
Driver Differential Rise or Fall Time tR, tFRD = 54Ω, CD= 50pF
(Figure 4)
No CM Load Full 400 650 1200 ns
-25V ≤ VCM ≤ 25V Full 300 -1200 ns
Maximum Data Rate fMAX CD = 820pF (Figure 6) Full 0.25 1.5 -Mbps
Driver Enable to Output High tZH SW = GND (Figure 5), (Notes 13, 20) Full - - 1200 ns
Driver Enable to Output Low tZL SW = VCC (Figure 5), (Notes 13, 20) Full - - 1200 ns
Driver Disable from Output Low tLZ SW = VCC (Figure 5) (Note 20) Full - - 120 ns
Driver Disable from Output High tHZ SW = GND (Figure 5) (Note 20) Full - - 120 ns
Time to Shutdown tSHDN (Note 15) Full 60 160 600 ns
Driver Enable from Shutdown to Output High tZH(SHDN) SW = GND (Figure 5), (Notes 15, 16) Full - - 2500 ns
Driver Enable from Shutdown to Output Low tZL(SHDN) SW = VCC (Figure 5), (Notes 15, 16) Full - - 2500 ns
DRIVER SWITCHING CHARACTERISTICS (1Mbps Versions; ISL31493E, ISL31495E)
Driver Differential Output Delay tPLH, tPHL RD = 54Ω, CD= 50pF
(Figure 4)
No CM Load Full - 70 125 ns
-25V ≤ VCM ≤ 25V Full - - 350 ns
Driver Differential Output Skew tSKEW RD = 54Ω, CD= 50pF
(Figure 4)
No CM Load Full - 3 15 ns
-25V ≤ VCM ≤ 25V Full - - 25 ns
Driver Differential Rise or Fall Time tR, tFRD = 54Ω, CD= 50pF
(Figure 4)
No CM Load Full 70 230 300 ns
-25V ≤ VCM ≤ 25V Full 70 -400 ns
Maximum Data Rate fMAX CD = 820pF (Figure 6) Full 14-Mbps
Driver Enable to Output High tZH SW = GND (Figure 5), (Note 13) Full - - 350 ns
Driver Enable to Output Low tZL SW = VCC (Figure 5), (Note 13) Full - - 300 ns
Driver Disable from Output Low tLZ SW = VCC (Figure 5) Full - - 120 ns
Driver Disable from Output High tHZ SW = GND (Figure 5) Full - - 120 ns
Time to Shutdown tSHDN (Note 15) Full 60 160 600 ns
Driver Enable from Shutdown to Output High tZH(SHDN) SW = GND (Figure 5), (Notes 15, 16) Full - - 2000 ns
Driver Enable from Shutdown to Output Low tZL(SHDN) SW = VCC (Figure 5), (Notes 15, 16) Full - - 2000 ns
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA= +25°C (Note 10).
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 18) TYP
MAX
(Note 18) UNITS
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
9FN7637.1
December 22, 2011
DRIVER SWITCHING CHARACTERISTICS (15Mbps Versions; ISL31496E, ISL31498E)
Driver Differential Output Delay tPLH, tPHL RD = 54Ω, CD= 50pF
(Figure 4)
No CM Load Full - 21 45 ns
-25V ≤ VCM ≤ 25V Full - - 80 ns
Driver Differential Output Skew tSKEW RD = 54Ω, CD= 50pF
(Figure 4)
No CM Load Full - 3 6ns
-25V ≤ VCM ≤ 25V Full - - 7ns
Driver Differential Rise or Fall Time tR, tFRD = 54Ω, CD= 50pF
(Figure 4)
No CM Load Full 517 30 ns
-25V ≤ VCM ≤ 25V Full 5-30 ns
Maximum Data Rate fMAX CD = 470pF (Figure 6) Full 15 25 -Mbps
Driver Enable to Output High tZH SW = GND (Figure 5), (Note 13) Full - - 100 ns
Driver Enable to Output Low tZL SW = VCC (Figure 5), (Note 13) Full - - 100 ns
Driver Disable from Output Low tLZ SW = VCC (Figure 5) Full - - 120 ns
Driver Disable from Output High tHZ SW = GND (Figure 5) Full - - 120 ns
Time to Shutdown tSHDN (Note 15) Full 60 160 600 ns
Driver Enable from Shutdown to Output High tZH(SHDN) SW = GND (Figure 5), (Notes 15, 16) Full - - 2000 ns
Driver Enable from Shutdown to Output Low tZL(SHDN) SW = VCC (Figure 5), (Notes 15, 16) Full - - 2000 ns
RECEIVER SWITCHING CHARACTERISTICS (250kbps Versions; ISL31490E through ISL31492E)
Maximum Data Rate fMAX -25V ≤ VCM ≤ 25V (Figure 7) Full 0.25 5-Mbps
Receiver Input to Output Delay tPLH, tPHL -25V ≤ VCM ≤ 25V (Figure 7) Full - 200 280 ns
Receiver Skew | tPLH -t
PHL|t
SKD (Figure 7) Full - 4 10 ns
Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 14, 20)
Full - - 50 ns
Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 14, 20)
Full - - 50 ns
Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8)
(Note 20)
Full - - 50 ns
Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 8)
(Note 20)
Full - - 50 ns
Time to Shutdown tSHDN (Notes 15) Full 60 160 600 ns
Receiver Enable from Shutdown to Output High tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 15, 17)
Full - - 2000 ns
Receiver Enable from Shutdown to Output Low tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 15, 17)
Full - - 2000 ns
RECEIVER SWITCHING CHARACTERISTICS (1Mbps Versions; ISL31493E, ISL31495E)
Maximum Data Rate fMAX -25V ≤ VCM ≤ 25V (Figure 7) Full 115 -Mbps
Receiver Input to Output Delay tPLH, tPHL -25V ≤ VCM ≤ 25V (Figure 7) Full - 90 150 ns
Receiver Skew | tPLH -t
PHL|t
SKD (Figure 7) Full - 4 10 ns
Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Note 14)
Full - - 50 ns
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA= +25°C (Note 10).
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 18) TYP
MAX
(Note 18) UNITS
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
10 FN7637.1
December 22, 2011
Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Note 14)
Full - - 50 ns
Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8) Full - - 50 ns
Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 8) Full - - 50 ns
Time to Shutdown tSHDN (Note 15) Full 60 160 600 ns
Receiver Enable from Shutdown to Output High tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 15, 17)
Full - - 2000 ns
Receiver Enable from Shutdown to Output Low tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 15, 17)
Full - - 2000 ns
RECEIVER SWITCHING CHARACTERISTICS (15Mbps Versions; ISL31496E, ISL31498E)
Maximum Data Rate fMAX -25V ≤ VCM ≤ 25V (Figure 7) Full 15 25 -Mbps
Receiver Input to Output Delay tPLH, tPHL -25V ≤ VCM ≤ 25V (Figure 7) Full - 35 70 ns
Receiver Skew | tPLH -t
PHL|t
SKD (Figure 7) Full - 4 10 ns
Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Note 14)
Full - - 50 ns
Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Note 14)
Full - - 50 ns
Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8) Full - - 50 ns
Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 8) Full - - 50 ns
Time to Shutdown tSHDN (Note 15) Full 60 160 600 ns
Receiver Enable from Shutdown to Output High tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 8),
(Notes 15, 17)
Full - - 2000 ns
Receiver Enable from Shutdown to Output Low tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 8),
(Notes 15, 17)
Full - - 2000 ns
NOTES:
10. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise
specified.
11. Supply current specification is valid for loaded drivers when DE = 0V.
12. Applies to peak current. See “Typical Performance Curves” beginning on page 15 for more information.
13. Keep RE = 0 to prevent the device from entering SHDN.
14. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
15. Transceivers (except on the ISL31491E) are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the
parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown.
See “Low Power Shutdown Mode” on page 14.
16. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
17. Set the RE signal high time >600ns to ensure that the device enters SHDN.
18. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
19. Tested according to TIA/EIA-485-A, Section 4.2.6 (±80V for 15µs at a 1% duty cycle).
20. Does not apply to the ISL31491E.
21. See “Caution” statement below the “Recommended Operating Conditions” section on page 6.
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA= +25°C (Note 10).
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
PARAMETER SYMBOL TEST CONDITIONS
TEMP
(°C)
MIN
(Note 18) TYP
MAX
(Note 18) UNITS
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
11 FN7637.1
December 22, 2011
Test Circuits and Waveforms
FIGURE 3A. VOD AND VOC FIGURE 3B. VOD AND VOC WITH COMMON MODE LOAD
FIGURE 3. DC DRIVER TEST CIRCUITS
FIGURE 4A. TEST CIRCUIT FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
FIGURE 5A. TEST CIRCUIT FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. DRIVER ENABLE AND DISABLE TIMES
D
DE
DI
VCC
VOD
VOC
RL/2
RL/2
Z
Y
D
DE
DI VOD
375Ω
375Ω
Z
Y
VCM
VCC
RL/2
RL/2
VOC
D
DE
DI
VCC
SIGNAL
GENERATOR
RD
Z
Y
37Ω*
375Ω*
CD
VCM
*USED ONLY FOR COMMON
MODE LOAD TESTS
OUT (Z)
3V
0V
1.5V1.5V
VOH
VOL
OUT (Y)
tPLH tPHL
DIFF OUT (Y - Z)
tR
+VOD
-VOD
90% 90%
tF
10% 10%
DI
SKEW = |tPLH - tPHL |
D
DE
DI Z
Y
VCC
GND
SW
PARAMETER OUTPUT RE DI SW CL (pF)
tHZ Y/Z X 1/0 GND 50
tLZ Y/Z X 0/1 VCC 50
tZH Y/Z 0 (Note 13) 1/0 GND 100
tZL Y/Z 0 (Note 13) 0/1 VCC 100
tZH(SHDN) Y/Z 1 (Note 16) 1/0 GND 100
tZL(SHDN) Y/Z 1 (Note 16) 0/1 VCC 100
SIGNAL
GENERATOR
110Ω
CL
OUT (Y, Z)
3V
0V
1.5V1.5V
VOH
0V
VOH - 0.5V
tHZ
OUT (Y, Z)
VCC
VOL
VOL + 0.5V
tLZ
DE
OUTPUT LOW
tZL, tZL(SHDN)
tZH, tZH(SHDN)
2.3V
2.3V
(Note 15)
(Note 15)
(Note 15)
OUTPUT HIGH
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
12 FN7637.1
December 22, 2011
FIGURE 6A. TEST CIRCUIT FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. DRIVER DATA RATE
FIGURE 7A. TEST CIRCUIT FIGURE 7B. MEASUREMENT POINTS
FIGURE 7. RECEIVER PROPAGATION DELAY AND DATA RATE
FIGURE 8A. TEST CIRCUIT FIGURE 8B. MEASUREMENT POINTS
FIGURE 8. RECEIVER ENABLE AND DISABLE TIMES
Test Circuits and Waveforms (Continued)
D
DE
DI
VCC
SIGNAL
GENERATOR
Z
Y
CDVOD
+
-
54Ω
3V
0V
DIFF OUT (Y - Z) +VOD
-VOD
DI
0V
SIGNAL
GENERATOR
RRO
RE
A
B15pF
SIGNAL
GENERATOR
VCM
RO
VCM + 750mV
VCM - 750mV
tPLH
VCM
VCM
VCC
0V
50% 50%
tPHL
A
B
1kΩVCC
GND
SW
PARAMETER DE A SW
tHZ 0 +1.5V GND
tLZ 0 -1.5V VCC
tZH (Note 14) 0 +1.5V GND
tZL (Note 14) 0 -1.5V VCC
tZH(SHDN) (Note 17) 0 +1.5V GND
tZL(SHDN) (Note 17) 0 -1.5V VCC
SIGNAL
GENERATOR
RRO
RE
A
B
15pF
RO
3V
0V
1.5V1.5V
VOH
0V
1.5V
VOH - 0.5V
tHZ
RO
VCC
VOL
1.5V
VOL + 0.5V
tLZ
RE
OUTPUT LOW
tZL, tZL(SHDN)
tZH, tZH(SHDN)
(Note 15)
(Note 15)
(Note 15)
OUTPUT HIGH
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
13 FN7637.1
December 22, 2011
Application Information
RS-485 and RS-422 are differential (balanced) data
transmission standards used for long haul or noisy environments.
RS-422 is a subset of RS-485, so RS-485 transceivers are also
RS-422 compliant. RS-422 is a point-to-multipoint (multidrop)
standard, which allows only one driver and up to 10 (assuming
one unit load devices) receivers on each bus. RS-485 is a true
multipoint standard, which allows up to 32 one unit load devices
(any combination of drivers and receivers) on each bus. To allow
for multipoint operation, the RS-485 specification requires that
drivers must handle bus contention without sustaining any
damage.
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as long as
4000’, thus the wide CMR is necessary to handle ground
potential differences, as well as voltages induced in the cable by
external fields.
The ISL3149xE is a family of ruggedized RS-485 transceivers
that improves on the RS-485 basic requirements, and therefore
increases system reliability. The CMR increases to ±25V, while
the RS-485 bus pins (receiver inputs and driver outputs) include
fault protection against voltages and transients up to ±60V.
Additionally, larger than required differential output voltages
(VOD) increase noise immunity.
Receiver (Rx) Features
These devices utilize a differential input receiver for maximum
noise immunity and common mode rejection. Input sensitivity is
better than ±200mV, as required by the RS-422 and RS-485
specifications.
Receiver input (load) current surpasses the RS-422 specification
of 3mA, and is four times lower than the RS-485 “Unit Load (UL)”
requirement of 1mA maximum. Thus, these products are known
as “one-quarter UL” transceivers, and there can be up to 128 of
these devices on a network while still complying with the RS-485
loading specification.
The Rx functions with common mode voltages as great as ±25V,
making them ideal for industrial, or long networks where induced
voltages are a realistic concern.
All the receivers include a “full fail-safe” function that guarantees
a high level receiver output if the receiver inputs are unconnected
(floating), shorted together, or connected to a terminated bus
with all the transmitters disabled (i.e., an idle bus).
Rx outputs feature high drive levels (typically 22mA @ VOL =1V) to
ease the design of optically coupled isolated interfaces.
Receivers easily meet the data rates supported by the
corresponding driver, and all receiver outputs are three-statable
via the active low RE input (except on the ISL31491E).
The Rx in the 250kbps and 1Mbps versions include noise filtering
circuitry to reject high frequency signals. The 1Mbps version
typically rejects pulses narrower than 50ns (equivalent to
20Mbps), while the 250kbps Rx rejects pulses below 150ns
(6.7Mbps).
Driver (Tx) Features
The RS-485/RS-422 driver is a differential output device that
delivers at least 1.5V across a 54Ω load (RS-485), and at least
2.4V across a 100Ω load (RS-422). The drivers feature low
propagation delay skew to maximize bit width, and to minimize
EMI, and all drivers are three-statable via the active high DE
input.
The 250kbps and 1Mbps driver outputs are slew rate limited to
minimize EMI, and to minimize reflections in unterminated or
improperly terminated networks. Outputs of the ISL31496E and
ISL31498E drivers are not limited, thus faster output transition
times allow data rates of at least 15Mbps.
High Overvoltage (Fault) Protection
Increases ruggedness
Note: The available smaller pitch packages (e.g., MSOP and
TDFN) may not meet the creepage and clearance (C&C)
requirements for ±60V levels. The user is advised to determine
his C&C requirements before selecting a package type.
The ±60V (referenced to the IC GND) fault protection on the
RS-485 pins, makes these transceivers some of the most rugged
on the market. This level of protection makes the ISL3149xE
perfect for applications where power (e.g., 24V and 48V supplies)
must be routed in the conduit with the data lines, or for outdoor
applications where large transients are likely to occur. When
power is routed with the data lines, even a momentary short
between the supply and data lines will destroy an unprotected
device. The ±60V fault levels of this family are at least five times
higher than the levels specified for standard RS-485 ICs. The
ISL3149xE protection is active whether the Tx is enabled or
disabled, and even if the IC is powered down.
If transients or voltages (including overshoots and ringing)
greater than ±60V are possible, then additional external
protection is required.
Widest Common Mode Voltage (CMV)
Tolerance Improves Operating Range
RS-485 networks operating in industrial complexes, or over long
distances, are susceptible to large CMV variations. Either of these
operating environments may suffer from large node-to-node
ground potential differences, or CMV pickup from external
electromagnetic sources, and devices with only the minimum
required +12V to -7V CMR may malfunction. The ISL3149xE’s
extended ±25V CMR is the widest available, allowing operation in
environments that would overwhelm lesser transceivers.
Additionally, the Rx will not phase invert (erroneously change
state) even with CMVs of ±40V, or differential voltages as large
as 40V.
High VOD Improves Noise Immunity and
Flexibility
The ISL3149xE driver design delivers larger differential output
voltages (VOD) than the RS-485 standard requires, or than most
RS-485 transmitters can deliver. The typical ±2.5V VOD provides
more noise immunity than networks built using many other
transceivers.
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
14 FN7637.1
December 22, 2011
Another advantage of the large VOD is the ability to drive more
than two bus terminations, which allows for utilizing the
ISL3149xE in “star” and other multi-terminated, nonstandard
network topologies. Figure 10 details the transmitter’s VOD vs
IOUT characteristic, and includes load lines for four (30Ω) and six
(20Ω) 120Ω terminations. Figure 10 shows that the driver
typically delivers ±1.3V into six terminations, and the “Electrical
Specification” table guarantees a VOD of ±0.8V at 21Ω over the
full temperature range. The RS-485 standard requires a
minimum 1.5V VOD into two terminations, but the ISL3149xE
deliver RS-485 voltage levels with 2x to 3x the number of
terminations.
Hot Plug Function
When a piece of equipment powers up, there is a period of time
where the processor or ASIC driving the RS-485 control lines (DE,
RE) is unable to ensure that the RS-485 Tx and Rx outputs are
kept disabled. If the equipment is connected to the bus, a driver
activating prematurely during power-up may crash the bus. To
avoid this scenario, the ISL3149xE devices incorporate a “Hot
Plug” function. Circuitry monitoring VCC ensures that, during power-
up and power-down, the Tx and Rx outputs remain disabled,
regardless of the state of DE and RE, if VCC is less than ≈3.5V. This
gives the processor/ASIC a chance to stabilize and drive the RS-485
control lines to the proper states. Figure 9 illustrates the power-up
and power-down performance of the ISL3149xE compared to an RS-
485 IC without the Hot Plug feature.
Data Rate, Cables, and Terminations
RS-485/RS-422 are intended for network lengths up to 4000’,
but the maximum system data rate decreases as the
transmission length increases. Devices operating at 15Mbps
may be used at lengths up to 150’ (46m), but the distance can be
increased to 328’ (100m) by operating at 10Mbps. The 1Mbps
versions can operate at full data rates with lengths up to 800’
(244m). Jitter is the limiting parameter at these faster data rates,
so employing encoded data streams (e.g., Manchester coded or
Return-to-Zero) may allow increased transmission distances. The
slow versions can operate at 115kbps, or less, at the full 4000’
(1220m) distance, or at 250kbps for lengths up to 3000’
(915m). DC cable attenuation is the limiting parameter, so using
better quality cables (e.g., 22 AWG) may allow increased
transmission distance.
Twisted pair is the cable of choice for RS-485/RS-422 networks.
Twisted pair cables tend to pick up noise and other
electromagnetically induced voltages as common mode signals,
which are effectively rejected by the differential receivers in
these ICs.
Proper termination is imperative, when using the 15Mbps devices,
to minimize reflections. Short networks using the 250kbps versions
need not be terminated, however, terminations are recommended
unless power dissipation is an overriding concern.
In point-to-point, or point-to-multipoint (single driver on bus like
RS-422) networks, the main cable should be terminated in its
characteristic impedance (typically 120Ω) at the end farthest
from the driver. In multi-receiver applications, stubs connecting
receivers to the main cable should be kept as short as possible.
Multipoint (multi-driver) systems require that the main cable be
terminated in its characteristic impedance at both ends. Stubs
connecting a transceiver to the main cable should be kept as
short as possible.
Built-In Driver Overload Protection
As stated previously, the RS-485 specification requires that
drivers survive worst case bus contentions undamaged. These
transceivers meet this requirement via driver output short circuit
current limits, and on-chip thermal shutdown circuitry.
The driver output stages incorporate a double foldback short
circuit current limiting scheme which ensures that the output
current never exceeds the RS-485 specification, even at the
common mode and fault condition voltage range extremes. The
first foldback current level (≈70mA) is set to ensure that the
driver never folds back when driving loads with common mode
voltages up to ±25V. The very low second foldback current
setting (≈9mA) minimizes power dissipation if the Tx is enabled
when a fault occurs.
In the event of a major short circuit condition, devices also include
a thermal shutdown feature that disables the drivers whenever the
die temperature becomes excessive. This eliminates the power
dissipation, allowing the die to cool. The drivers automatically
re-enable after the die temperature drops about +15°C. If the
contention persists, the thermal shutdown/re-enable cycle repeats
until the fault is cleared. Receivers stay operational during thermal
shutdown.
Low Power Shutdown Mode
These CMOS transceivers all use a fraction of the power required
by competitive devices, but they also include a shutdown feature
that reduces the already low quiescent ICC to a 10µA trickle.
These devices enter shutdown whenever the receiver and driver
are simultaneously disabled (RE =V
CC and DE = GND) for a
period of at least 600ns. Disabling both the driver and the
receiver for less than 60ns guarantees that the transceiver will
not enter shutdown.
Note that receiver and driver enable times increase when the
transceiver enables from shutdown. Refer to Notes 13, 14, 15,
16 and 17, at the end of the “Electrical Specification” table on
page 10, for more information.
FIGURE 9. HOT PLUG PERFORMANCE (ISL3149xE) vs ISL83088E
WITHOUT HOT PLUG CIRCUITRY
TIME (40µs/DIV)
VCC
RECEIVER OUTPUT (V)
DRIVER Y OUTPUT (V)
2.5
5.0
2.5
5.0
VCC (V)
RL = 1kΩ
RO
0
2.5
5.0
0
0
A/Y
RL = 1kΩ
2.8V
3.5V
ISL3149xE
ISL3149xE
RE = GND
DE, DI = VCC
ISL83088E
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
15 FN7637.1
December 22, 2011
Typical Performance Curves VCC = 5V, TA = +25°C; Unless Otherwise Specified.
FIGURE 10. DRIVER OUTPUT CURRENT vs DIFFERENTIAL OUTPUT
VOLTAGE
FIGURE 11. DRIVER DIFFERENTIAL OUTPUT VOLTAGE vs
TEMPERATURE
FIGURE 12. SUPPLY CURRENT vs TEMPERATURE FIGURE 13. RECEIVER OUTPUT CURRENT vs RECEIVER OUTPUT
VOLTAGE
FIGURE 14. BUS PIN CURRENT vs BUS PIN VOLTAGE FIGURE 15. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE (ISL31490E, ISL31491E, ISL31492E)
DIFFERENTIAL OUTPUT VOLTAGE (V)
DRIVER OUTPUT CURRENT (mA)
0123 45
0
10
20
30
40
50
60
70
80
90
+25°C
RD = 54Ω
RD = 100Ω
RD = 30Ω
RD = 20Ω
+85°C
-40 0 50 85
TEMPERATURE (°C)
DIFFERENTIAL OUTPUT VOLTAGE (V)
-25 25 75
RD = 54Ω
RD = 100Ω
2.2
2.4
2.6
2.8
3.0
3.2
3.4
3.6
-40 0 50 85
TEMPERATURE (°C)
ICC (mA)
-25 25 75
2.00
2.05
2.10
2.15
2.20
2.25
2.30
2.35
2.40
2.45
DE = VCC, RE = X
DE = GND, RE = GND
RECEIVER OUTPUT VOLTAGE (V)
RECEIVER OUTPUT CURRENT (mA)
-30
-20
-10
0
10
20
30
40
50
60
70
VOH, +25°C
VOH, +85°C
VOL, +25°C VOL, +85°C
012345
BUS PIN VOLTAGE (V)
BUS PIN CURRENT (µA)
-600
-400
-200
0
200
400
600
800
-70 -50 -30 -10 0 10 30 50 70
A/Y OR B/Z
Y OR Z
-40 0 50 85
TEMPERATURE (°C)
-25 25 75
PROPAGATION DELAY (ns)
tPLH
tPHL
300
305
310
315
320
325
330
335
340
RD = 54Ω, CD = 50pF
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
16 FN7637.1
December 22, 2011
FIGURE 16. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
(ISL31490E, ISL31491E, ISL31492E)
FIGURE 17. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE (ISL31493E, ISL31495E)
FIGURE 18. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE
(ISL31493E, ISL31495E)
FIGURE 19. DRIVER DIFFERENTIAL PROPAGATION DELAY vs
TEMPERATURE (ISL31496E, ISL31498E)
FIGURE 20. DRIVER DIFFERENTIAL SKEW vs TEMPERATURE (ISL31496E, ISL31498E)
Typical Performance Curves VCC = 5V, TA = +25°C; Unless Otherwise Specified. (Continued)
-40 0 50 85
TEMPERATURE (°C)
SKEW (ns)
-25 25 75
|tPLH - tPHL|
0
1
2
3
4
5
6
7
8
RD = 54Ω, CD = 50pF
-40 0 50 85
TEMPERATURE (°C)
-25 25 75
PROPAGATION DELAY (ns)
50
55
60
65
70
75
80
85
tPLH
tPHL
RD = 54Ω, CD = 50pF
-40 0 50 85
TEMPERATURE (°C)
SKEW (ns)
-25 25 75
2.0
2.5
3.0
3.5
4.0
|tPLH - tPHL|
RD = 54Ω, CD = 50pF
-40 0 50 85
TEMPERATURE (°C)
-25 25 75
PROPAGATION DELAY (ns)
15
17
19
21
23
25
27
tPLH
tPHL
RD = 54Ω, CD = 50pF
-40 0 50 85
TEMPERATURE (°C)
SKEW (ns)
-25 25 75
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
|tPLH - tPHL|
RD = 54Ω, CD = 50pF
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
17 FN7637.1
December 22, 2011
FIGURE 21. ±25V RECEIVER PERFORMANCE (ISL31490E, ISL31491E,
ISL31492E)
FIGURE 22. ±25V RECEIVER PERFORMANCE (ISL31493E, ISL31495E)
FIGURE 23. ±25V RECEIVER PERFORMANCE (ISL31496E, ISL31498E) FIGURE 24. DRIVER AND RECEIVER WAVEFORMS (ISL31490E,
ISL31491E, ISL31492E)
FIGURE 25. DRIVER AND RECEIVER WAVEFORMS (ISL31493E,
ISL31495E)
FIGURE 26. DRIVER AND RECEIVER WAVEFORMS (ISL31496E,
ISL31498E)
Typical Performance Curves VCC = 5V, TA = +25°C; Unless Otherwise Specified. (Continued)
TIME (1µs/DIV)
VOLTAGE (V)
-25
-20
-15
-10
-5
0
5RO
A
B
0
5
10
15
20
25
RO
A
BVID = ±1V
TIME (400ns/DIV)
VOLTAGE (V)
-25
-20
-15
-10
-5
0
5RO
A
B
0
5
10
15
20
25
RO
A
BVID = ±1V
TIME (20ns/DIV)
VOLTAGE (V)
-25
-20
-15
-10
-5
0
5RO
A
B
0
5
10
15
20
25
RO
A
BVID = ±1V
TIME (1µs/DIV)
RECEIVER OUTPUT (V)
RD = 54Ω, CD = 50pF
0
5
DRIVER OUTPUT (V)
0
5
DRIVER INPUT (V)
DI
RO
A/Y - B/Z
-3
-2
-1
0
1
2
3
TIME (400ns/DIV)
RECEIVER OUTPUT (V)
RD = 54Ω, CD = 50pF
0
5
DRIVER OUTPUT (V)
0
5
DRIVER INPUT (V)
DI
RO
A/Y - B/Z
-3
-2
-1
0
1
2
3
TIME (20ns/DIV)
RECEIVER OUTPUT (V)
RD = 54Ω, CD = 50pF
0
5
DRIVER OUTPUT (V)
0
5
DRIVER INPUT (V)
DI
RO
A/Y - B/Z
-3
-2
-1
0
1
2
3
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
18 FN7637.1
December 22, 2011
Die Characteristics
SUBSTRATE POTENTIAL (Powered Up) AND TDFN EPAD:
GND
PROCESS:
Si Gate BiCMOS
Typical Performance Curves VCC = 5V, TA = +25°C; Unless Otherwise Specified. (Continued)
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
19
Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted
in the quality certifications found at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7637.1
December 22, 2011
For additional products, see www.intersil.com/product_tree
Products
Intersil Corporation is a leader in the design and manufacture of high-performance analog semiconductors. The Company's products
address some of the industry's fastest growing markets, such as, flat panel displays, cell phones, handheld products, and notebooks.
Intersil's product families address power management and analog signal processing functions. Go to www.intersil.com/products for a
complete list of Intersil product families.
For a complete listing of Applications, Related Documentation and Related Parts, please see the respective device information page on
intersil.com: ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E, ISL31496E, ISL31498E
To report errors or suggestions for this datasheet, please go to www.intersil.com/askourstaff
FITs are available from our website at http://rel.intersil.com/reports/search.php
Revision History
The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to web to make sure you
have the latest Rev.
DATE REVISION CHANGE
December 15, 2011 FN7637.1 In “Ordering Information” on page 2, changed Package Drawing Number for ISL31492EIRTZ, 8 Ld TDFN from
L8.3x3A to L8.3x3K . Updated Tape & Reel note from "Add “-T” suffix for tape and reel." to new standard "Add
“-T*” suffix for tape and reel." The "*" covers all possible tape and reel options
In “Thermal Information” on page 6, updated Theta JC for 14 Ld SOIC Package from 38 to 39.
Updated M8.118 on page 20. Corrected lead width dimension in side view 1 from "0.25 - 0.036" to "0.25 - 0.36"
Changed L8.3x3A to L8.3x3K on page 22. In the bottom view, lead height changed from "0.3±0.1" to
"0.4±0.05". Lead width changed from "0.3±0.05" to "0.25±0.05". In the land pattern, lead width changed from
"0.3" to "0.25". In Detail X, changed "0.2 REF" to "0.203 REF".
Updated M8.15 on page 26. Updated to new POD format by removing table and moving dimensions onto
drawing and adding land pattern.
June 17, 2010 FN7637.0 Initial Release
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
20 FN7637.1
December 22, 2011
Package Outline Drawing
M8.118
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
Rev 4, 7/11
DETAIL "X"
SIDE VIEW 2
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
PIN# 1 ID
0.25 - 0.36
DETAIL "X"
0.10 ± 0.05
(4.40)
(3.00)
(5.80)
H
C
1.10 MAX
0.09 - 0.20
3°±3°
GAUGE
PLANE 0.25
0.95 REF
0.55 ± 0.15
B
0.08 C A-B D
3.0±0.05
12
8
0.85±010
SEATING PLANE
A
0.65 BSC
3.0±0.05 4.9±0.15
(0.40)
(1.40)
(0.65)
D
5
5
SIDE VIEW 1
Dimensioning and tolerancing conform to JEDEC MO-187-AA
Plastic interlead protrusions of 0.15mm max per side are not
Dimensions in ( ) are for reference only.
Dimensions are measured at Datum Plane "H".
Plastic or metal protrusions of 0.15mm max per side are not
Dimensions are in millimeters.
3.
4.
5.
6.
NOTES:
1.
2.
and AMSEY14.5m-1994.
included.
included.
0.10 C
M
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
21 FN7637.1
December 22, 2011
Mini Small Outline Plastic Packages (MSOP)
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Da tum Plane. Mold flash, p rotrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions
and are measured at Datum Plane. Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08 mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Datums and to be determined at Datum plane
.
11. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only
L
0.25
(0.010)
L1
R1
R
4X θ
4X θ
GAUGE
PLANE
SEATING
PLANE
EE1
N
12
TOP VIEW
INDEX
AREA
-C-
-B-
0.20 (0.008) ABC
SEATING
PLANE
0.20 (0.008) C
0.10 (0.004) C
-A-
-H-
SIDE VIEW
b
e
D
A
A1
A2
-B-
END VIEW
0.20 (0.008) CD
E1
C
L
C
a
- H -
-A - - B -
- H -
M10.118 (JEDEC MO-187BA)
10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.037 0.043 0.94 1.10 -
A1 0.002 0.006 0.05 0.15 -
A2 0.030 0.037 0.75 0.95 -
b 0.007 0.011 0.18 0.27 9
c 0.004 0.008 0.09 0.20 -
D 0.116 0.120 2.95 3.05 3
E1 0.116 0.120 2.95 3.05 4
e 0.020 BSC 0.50 BSC -
E 0.187 0.199 4.75 5.05 -
L 0.016 0.028 0.40 0.70 6
L1 0.037 REF 0.95 REF -
N10 107
R 0.003 - 0.07 - -
R1 0.003 - 0.07 - -
5o15o5o15o-
α0o6o0o6o-
Rev. 0 12/02
θ
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
22 FN7637.1
December 22, 2011
Package Outline Drawing
L8.3x3K
8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
Rev 1, 9/11
BOTTOM VIEW
DETAIL "X"
SIDE VIEW
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
C 0 . 203 REF
0 . 05 MAX.
0 . 02 NOM.
5
3.00 A
B
3.00
(4X) 0.15
6
PIN 1
INDEX AREA
PIN #1
6X 0.65
1.50 ±0.10
8
1
0.40 ± 0.05
6
0.75 ±0.05
SEE DETAIL "X"
0.08
0.10 C
C
C
( 2.90 )
(1.50)
( 8 X 0.25)
( 8X 0.50)
( 1.95)
2.30 ±0.10
0.10
8X 0.25 ±0.05
AMC B
4
2X 1.95
(6x 0.65)
INDEX AREA
PIN 1
located within the zone indicated. The pin #1 identifier may be
Unless otherwise specified, tolerance : Decimal ± 0.05
Tiebar shown (if present) is a non-functional feature.
The configuration of the pin #1 identifier is optional, but must be
between 0.15mm and 0.20mm from the terminal tip.
Dimension applies to the metallized terminal and is measured
Dimensions in ( ) for Reference Only.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
6.
either a mold or mark feature.
3.
5.
4.
2.
Dimensions are in millimeters.1.
NOTES:
Compliant to JEDEC MO-229 WEEC-2 except for the foot length.
7.
( 2.30)
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
23 FN7637.1
December 22, 2011
Package Outline Drawing
L10.3x3A
10 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
Rev 5, 3/10
located within the zone indicated. The pin #1 identifier may be
Unless otherwise specified, tolerance : Decimal ± 0.05
Tiebar shown (if present) is a non-functional feature.
The configuration of the pin #1 identifier is optional, but must be
between 0.15mm and 0.30mm from the terminal tip.
Dimension applies to the metallized terminal and is measured
Dimensions in ( ) for Reference Only.
Dimensioning and tolerancing conform to ASME Y14.5m-1994.
6.
either a mold or mark feature.
3.
5.
4.
2.
Dimensions are in millimeters.1.
NOTES:
BOTTOM VIEW
DETAIL "X"
SIDE VIEW
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
INDEX AREA
(10 X 0.50)
(2.90)
( 8X 0 .50 )
( 10X 0.25 )
(1.50)
0 . 05 MAX.
0 . 00 MIN.
0 . 2 REF
5
(4X)
( 2.30 )
3.00
0.15
0 .80 MAX
2.30
10
SEE DETAIL "X"
0.10 C
5
1.50
INDEX AREA
B
3.00 A
PIN 1
6
PIN 1
6
1
2.0 REF
8X 0.50 BSC
5
C
SEATING PLANE
C0.08
BC
0.10 M A
10 X 0.25
4
M0.05 C
10X 0 . 30
C
Angular ±2.50°
Compliant to JEDEC MO-229-WEED-3 except exposed pad length (2.30mm).
7.
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
24 FN7637.1
December 22, 2011
Package Outline Drawing
M14.15
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 1, 10/09
A
D
4
0.25 A-BMC
C
0.10 C
5B
D
3
0.10 A-BC
4
0.20 C 2X
2X
0.10 DC 2X
H
0.10 C
6
36
ID MARK
PIN NO.1 (0.35) x 45°
SEATING PLANE
GAUGE PLANE
0.25
(5.40)
(1.50)
1.27
0.31-0.51
4° ± 4°
DETAIL"A" 0.22±0.03
0.10-0.25
1.25 MIN
1.75 MAX
(1.27) (0.6)
6.0
8.65
3.9
7
14 8
Dimensioning and tolerancing conform to AMSEY14.5m-1994.
Dimension does not include interlead flash or protrusions.
Dimensions in ( ) for Reference Only.
Interlead flash or protrusions shall not exceed 0.25mm per side.
Datums A and B to be determined at Datum H.
4.
5.
3.
2.
Dimensions are in millimeters.
NOTES:
1.
The pin #1 indentifier may be either a mold or mark feature.
6. Does not include dambar protrusion. Allowable dambar protrusion
7. Reference to JEDEC MS-012-AB.
shall be 0.10mm total in excess of lead width at maximum condition.
DETAIL "A"
SIDE VIEW
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
25 FN7637.1
December 22, 2011
Dual-In-Line Plastic Packages (PDIP)
C
L
E
eA
C
eB
eC
-B-
E1
INDEX 12 3 N/2
N
AREA
SEATING
BASE
PLANE
PLANE
-C-
D1
B1
B
e
D
D1
A
A2
L
A1
-A-
0.010 (0.25) C AMBS
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between
English and Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated
in JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protru-
sions. Mold flash or protrusions shall not exceed 0.010 inch
(0.25mm).
6. E and are measured with the leads constrained to be per-
pendicular to datum .
7. eB and eC are measured at the lead tips with the leads uncon-
strained. eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions.
Dambar protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,
E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch
(0.76 - 1.14mm).
eA-C-
E8.3 (JEDEC MS-001-BA ISSUE D)
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A - 0.210 - 5.33 4
A1 0.015 - 0.39 - 4
A2 0.115 0.195 2.93 4.95 -
B 0.014 0.022 0.356 0.558 -
B1 0.045 0.070 1.15 1.77 8, 10
C 0.008 0.014 0.204 0.355 -
D 0.355 0.400 9.01 10.16 5
D1 0.005 - 0.13 - 5
E 0.300 0.325 7.62 8.25 6
E1 0.240 0.280 6.10 7.11 5
e 0.100 BSC 2.54 BSC -
eA0.300 BSC 7.62 BSC 6
eB- 0.430 - 10.92 7
L 0.115 0.150 2.93 3.81 4
N8 89
Rev. 0 12/93
ISL31490E, ISL31491E, ISL31492E, ISL31493E, ISL31495E,
26 FN7637.1
December 22, 2011
Package Outline Drawing
M8.15
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
Rev 3, 3/11
DETAIL "A"
TOP VIEW
INDEX
AREA
123
-C-
SEATING PLANE
x 45°
NOTES:
1. Dimensioning and tolerancing per ANSI Y14.5M-1982.
2. Package length does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
3. Package width does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
4. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
5. Terminal numbers are shown for reference only.
6. The lead width as measured 0.36mm (0.014 inch) or greater above the
seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch).
7. Controlling dimension: MILLIMETER. Converted inch dimensions are not
necessarily exact.
8. This outline conforms to JEDEC publication MS-012-AA ISSUE C.
SIDE VIEW “A
SIDE VIEW “B”
1.27 (0.050)
6.20 (0.244)
5.80 (0.228)
4.00 (0.157)
3.80 (0.150)
0.50 (0.20)
0.25 (0.01)
5.00 (0.197)
4.80 (0.189)
1.75 (0.069)
1.35 (0.053)
0.25(0.010)
0.10(0.004)
0.51(0.020)
0.33(0.013)
8°
0°
0.25 (0.010)
0.19 (0.008)
1.27 (0.050)
0.40 (0.016)
1.27 (0.050)
5.20(0.205)
1
2
3
45
6
7
8
TYPICAL RECOMMENDED LAND PATTERN
2.20 (0.087)
0.60 (0.023)
