FQD7N10L - Fairchild - Datasheet.Directory

FQD7N10L / FQU7N10L

FQD7N10L / FQU7N10 L

100V LOGIC N-Channel MOSFET

General Description

These N-Channel enhancement mode power field effect

transistors are produced using Fairchild’s proprietary,

planar stripe, DMOS technology.

This advanced technology is especially tailored to minimize

on-state resistance, provide superior switching

performance, and withstand high energy pulse in the

avalanche and commutation modes. These devices are

well suited for low voltage applications such as high

efficiency switching DC/DC converters, and DC motor

control.

Features

• 5.8A, 100V, RDS(on) = 0.35Ω @VGS = 10 V

• Low gate charge ( typical 4.6 nC)

• Low Crss ( typical 12 pF)

• Fast switching

• 100% avalanche tested

• Improved dv/dt capability

• Low level gate drive requirments allowing

direct operation from logic drives

Absolute Maximu m Rating s TC = 25°C unless otherwise noted

Thermal Characteristics

Symbol Parameter FQD7N10L / FQU7N10L Units

VDSS Drain-Source Voltage 100 V

IDDrain Current - Continuous (TC = 25°C) 5.8 A

- Continuous (TC = 100°C) 3.67 A

IDM Drain Current - Pulsed (Note 1) 23.2 A

VGSS Gate-Source Voltage ± 20 V

EAS Single Pulsed Avalanche Energy (Note 2) 50 mJ

IAR Avalanche Current (Note 1) 5.8 A

EAR Repetitive Avalanche Energy (Note 1) 2.5 mJ

dv/dt Peak Diode Recovery dv/dt (Note 3) 6.0 V/ns

PDPower Dissipation (TA = 25°C) * 2.5 W

Power Dissipation (TC = 25°C) 25 W

- Derate above 25°C 0.2 W/°C

TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C

TLMaximum lead temperature for soldering purposes,

1/8” from case for 5 seconds 300 °C

Symbol Parameter Typ Max Units

RθJC Thermal Resistance, Junction-to-Case -- 5.0 °C/W

RθJA Thermal Resistance, Junction-to-Ambient * -- 50 °C/W

RθJA Thermal Resistance, Junction-to-Ambient -- 110 °C/W

* When mounted on the minimum pad size recommended (PCB Mount)

I-PAK

FQU Series

D-P AK

FQD Series GS

October 2008

QFET

• RoHS Compliant

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Rev. A3, October 2008

FQD7N10L / FQU7N10L

(Note 4)

(Note 4, 5)

(Note 4)

Electrical Characteristics TC = 25°C unless otherwise noted

Notes:

1. Repetitive Rating : Pulse width limited by maximum junction temperature

2. L = 2.23mH, IAS = 5.8A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C

3. ISD ≤ 7.3A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C

4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%

5. Essentially independent of operating temperature

Symbol Parame ter Test Condit ions Min Typ Max Units

Off Characteristics

BVDSS Drain-S ource Breakdown Voltage VGS = 0 V, I D = 250 µA100 -- -- V

∆BVDSS

/ ∆TJ

Breakdown Voltage Temperature

Coefficient ID = 250 µA, Referenced to 25°C -- 0.1 -- V/°C

IDSS Zero Gate Voltage Drain Current VDS = 100 V, VGS = 0 V -- -- 1 µA

VDS = 80 V, TC = 125°C -- -- 10 µA

IGSSF Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V -- -- 100 nA

IGSSR Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -- -- -100 nA

On Characteri st ics

VGS(th) Gate Threshold Volt age VDS = VGS, ID = 250 µA1.0 -- 2.0 V

RDS(on) Static Drain-Source

On-Resistance VGS = 10 V, ID = 2.9 A

VGS = 5 V, I D = 2.9 A -- 0.275

0.300 0.35

0.38 Ω

gFS Forward Transconductance VDS = 30 V, ID = 2.9 A -- 4.6 -- S

Dynamic Characteristics

Ciss Input Capacitance VDS = 25 V, VGS = 0 V,

f = 1.0 MHz

-- 220 290 pF

Coss Output Capacitance -- 55 72 pF

Crss Reverse Transfer Capacitance -- 12 15 pF

Switching Characteristics

td(on) Turn-On Delay Time VDD = 50 V, ID = 7.3 A,

RG = 25 Ω

-- 9 30 ns

trTurn-On Rise Time -- 100 210 ns

td(off) Turn-Off D e l a y Time -- 17 45 ns

tfTurn -Off Fall Time -- 5 0 110 ns

QgTotal Gate Cha rge VDS = 80 V, ID = 7.3 A,

VGS = 5 V

-- 4.6 6.0 nC

Qgs Gate-Source Charge -- 1.0 -- nC

Qgd Gate-Drain Charge -- 2.6 -- nC

Drain-Source Diode Characteristics and Maximum Ratings

ISMaximum Continuous Drain-Source Diode Forward Current -- -- 5.8 A

ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- 23. 2 A

VSD Drain-Source Diode Forward Voltage VGS = 0 V, I S = 5.8 A -- -- 1.5 V

trr Reverse Recovery Time VGS = 0 V, I S = 7.3 A,

dIF / dt = 100 A/µs

-- 70 -- ns

Qrr Reverse Recovery Charge -- 140 -- nC

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FQD7N10L / FQU7N10L

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0

10-1

100

101

25℃

150℃

※ Notes :

1. VGS = 0V

2. 250μ

s Pulse Test

IDR , Reverse Drain Current [A]

VSD , Sou rce - Dr a in Volta g e [V]

0246810

10-1

100

101

※ No tes :

1. VDS = 30V

2. 250μ

s Pulse Test

-55℃

150℃

25℃

ID , Drain Cur re n t [A]

VGS , Gate- S ou r c e Vo ltag e [V]

10-1 100101

10-1

100

101

V GS

Top : 10.0 V

8.0 V

6.0 V

5.0 V

4.5 V

4.0 V

3.5 V

Bottom : 3.0 V

※ Notes :

1. 250μ

s Pulse Test

2. TC = 25℃

ID, Drain Current [A]

VDS, Drain-Source Voltage [V]

012345678

VDS = 50V

VDS = 80V

※ Note : ID = 7.3 A

VGS, Gate-Source Voltage [V]

QG, Tota l Ga t e Cha rg e [nC]

10-1 100101

100

200

300

400

500

600 Ciss = Cgs + Cgd (Cds = shorted)

Coss = Cds + Cgd

Crss = Cgd

※ Notes :

1. VGS = 0 V

2. f = 1 MH z

Crss

Coss

Ciss

Capacitance [pF]

VDS, Drain-Source Voltage [V]

0 5 10 15 20

0.0

0.3

0.6

0.9

1.2

1.5

VGS = 10V

VGS = 5V

※ N ote : T J = 25℃

RDS(ON) [Ω],

Drain-Source On-Resistance

ID, Drain Current [A]

Typical Characteristics

Figure 5. Capacitance C haracterist ics Figure 6. Gate Charge Characteris tics

Figure 3. On-Resist anc e Variation vs.

Drain Current and Gate Voltage Figure 4. Body Diode Fo rward Voltage

Variation vs. Source Current

and Temperature

Figure 2. Transfer CharacteristicsFigure 1. On- R egi on Character i st ics

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FQD7N10L / FQU7N10L

Rev. A3, October 2008

10-5 10-4 10-3 10-2 10-1 100101

10-1

100※ No te s :

1 . ZθJC(t) = 5 .0 ℃/W M a x .

2 . D uty Fa c to r , D= t1/t2

3 . TJM - T C = PDM * Z θJC(t)

single pulse

D=0.5

0.02

0.2

0.05

0.1

0.01

ZθJC

(t), Thermal Response

t1, Sq u a re W a ve P u lse Du ra tio n [se c ]

25 50 75 100 125 150

ID, Drain C urrent [A]

TC, Case Temperature [℃

]

100101102

10-1

100

101

102

DC 10 ms

1 ms

100 µs

Operation in This Area

is Limited by R DS(on)

※ Notes :

1. TC = 25 oC

2. TJ = 150 oC

3. Single Pulse

ID, Drain Current [A]

VDS, Drain-Source Voltage [V]

-100 -50 0 50 100 150 200

0.0

0.5

1.0

1.5

2.0

2.5

3.0

※ Notes :

1. VGS = 5 V

2. ID = 2.9 A

RDS(ON) , (Norm alized)

Drain-Source On-Resistance

TJ, Junction Temperature [oC]

-100 -50 0 50 100 150 200

0.8

0.9

1.0

1.1

1.2

※ Notes :

1 . VGS = 0 V

2 . ID = 250 μ

BV DSS , (N ormaliz e d )

Drain-Sou rce Breakdow n Voltage

TJ, Junction Tempe rature [oC]

Typical Characteristics (Continued)

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current

vs. Case Temperature

Figu re 7. Br ea kdown Voltage Variatio n

vs. Temperature Figure 8. On-Resistance Variation

vs. Temperature

Figure 11. Transient Thermal Respons e Cur ve

PDM

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FQD7N10L / FQU7N10L

Charge

VGS

5V Qg

Qgs Qgd

3mA

VGS

DUT

VDS

300nF

50KΩ

200nF

12V

Same Type

as DUT

Charge

VGS

5V Qg

Qgs Qgd

3mA

VGS

DUT

VDS

300nF

50KΩ

200nF

12V

Same Type

as DUT

VGS

VDS

10%

90%

td(on) tr

ton toff

td(off) tf

VDD

VDS RL

DUT

VGS

VDS

10%

90%

td(on) tr

ton toff

td(off) tf

VDD

VDS RL

DUT

VGS

EAS =LI

AS2

----

1--------------------

BVDSS -V

BVDSS

VDD

VDS

BVDSS

t p

VDD

IAS

VDS (t)

ID (t)

Time

10V DUT

t p

EAS =LI

AS2

----

EAS =LI

AS2

----

1--------------------

BVDSS -V

BVDSS

VDD

VDS

BVDSS

t p

VDD

IAS

VDS (t)

ID (t)

Time

10V DUT

t p

Gate Charge Test Circuit & Waveform

Resistive Switching Test Circuit & Waveforms

Unclamped Inductive Switching Test Circuit & Waveforms

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FQD7N10L / FQU7N10L

Rev. A3, October 2008

Peak Diode Recovery dv/dt Test Circuit & Waveform s

DUT

VDS

Driver

RGSame Type

as DUT

VGS • dv/dt controlled by RG

•I

SD con troll ed by pulse period

VDD

ISD

10V

VGS

( Driver )

ISD

( DUT )

VDS

( DUT )

VDD

Body Diode

Forward Voltage Drop

VSD

IFM , Body Diode Forward Current

Body Diode Reverse Current

IRM

Body Diode Recovery dv/dt

di/dt

D = Gate Pulse Width

Gate Pu lse P eri od

--------------------------

DUT

VDS

Driver

RGSame Type

as DUT

VGS • dv/dt controlled by RG

•I

SD con troll ed by pulse period

VDD

ISD

10V

VGS

( Driver )

ISD

( DUT )

VDS

( DUT )

VDD

Body Diode

Forward Voltage Drop

VSD

IFM , Body Diode Forward Current

Body Diode Reverse Current

IRM

Body Diode Recovery dv/dt

di/dt

D = Gate Pulse Width

Gate Pu lse P eri od

--------------------------

D = Gate Pulse Width

Gate Pu lse P eri od

--------------------------

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FQD7N10L / FQU7N10L

6.60 ±0.20

2.30 ±0.10

0.50 ±0.10

5.34 ±0.30

0.70 ±0.20

0.60 ±0.20

0.80 ±0.20

9.50 ±0.30

6.10 ±0.20

2.70 ±0.20 9.50 ±0.30

6.10 ±0.20

2.70 ±0.20

MIN0.55

0.76 ±0.10 0.50 ±0.10

1.02 ±0.20

2.30 ±0.20

6.60 ±0.20

0.76 ±0.10

(5.34)

(1.50)

(2XR0.25)

(5.04)

0.89 ±0.10

(0.10) (3.05)

(1.00)

(0.90)

(0.70)

0.91 ±0.10

2.30TYP

[2.30±0.20]

Dimensions in Millimeters

Mechanical Dimensions

D - PAK

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FQD7N10L / FQU7N10L

Rev. A3, October 2008

6.60 ±0.20

0.76 ±0.10

MAX0.96

2.30TYP

[2.30±0.20] 2.30TYP

[2.30±0.20]

0.60 ±0.20

0.80 ±0.10

1.80 ±0.20

9.30 ±0.30

16.10 ±0.30

6.10 ±0.20

0.70 ±0.20

5.34 ±0.20

0.50 ±0.10

2.30 ±0.20

(0.50) (0.50

Mechanical Dimensions

Dimensions in Millimeters

I - PAK

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FQD7N10L / FQU7N10L

FQD7N10L / FQU7N10L Rev. A3www.fairchildsemi.com

Rev. I37

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Advance Information Formative / In Design Datasheet contains the design specifications for product development. Specifications

may change in any manner without notice.

Preliminary First Production

Datasheet contains preliminary data; supplementary data will be published at a later

date. Fairchild Semiconductor reserves the right to make changes at any time without

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