LM139A/LM239A/LM339A NS Voltage Comparators LM139A/LM239A/LM339A low offset voltage quad comparators general description The LM139A series consists of four independent precision voltage comparators with an offset volt- age specification of 2 mV max. for all four comparators which were designed specifically to operate from a single power supply over a wide range of voltages. Operation from split power supplies is also possible and the low power supply current drain is independent of the magnitude of the power supply voltage. These comparators also have a unique characteristic in that the input common-mode voltage range includes ground, even though operated from a single power supply voltage. Application areas include limit comparators, simple analog to digital converters; pulse, squarewave and time delay generators; wide range VCO; MOS clock timers; multivibrators and high voltage digital logic gates. The LM139A series was designed to directly interface with TTL and CMOS. When operated from both plus and minus power supplies, the LM339A will directly interface with MOS logic--where the low power drain of the LM339A is a distinct advantage over standard comparators. advantages m High precision comparators Reduced Vog drift over temperature Eliminates need for dua! supplies ws Allows sensing near GND = Compatible with all forms of logic Power drain suitable for battery operation features m@ Wide single supply Voltage range or dual supplies 2Voc to 36 Voc +1Vpc to +18 Voc w Very low supply current drain (0.8 mA) independent of supply voltage (1 mW/com- parator at +5 Voc) Low input biasing current 35 nA Low input offset current 3 nA and maximum offset voltage amv {Input common-mode voltage range includes ground a Differential input voltage range equal to the power supply voltage @ Low output saturation voltage TmV at 5uA 70 mV at 1mA Output voltage compatible with TTL, DTL, ECL, MOS and CMOS logic systems schematic and connection diagrams ve -n QO CY) 190.4 Qs 00H L@. oH az a3 INPUT o1 INPUT O= pg typical applications (v*=5.0 Vgc) +8 Voc Basic Comparator OUTPUT Driving CMOS Dual-In-Line and Flat Package QUTPUT3 OUTPUTS =GNO INPUT 4+ INPUT 4~ INPUT 3+ INPUT 3- 14 3 2 W 10 8 a <q L 1 2 a 4 5 6 ? QutPuT2 OUTPUT I ve (NPUT 1- INPUT 1+ INPUT 2- INPUT 2> TOP VIEW Order Number LM139AF See Package 4 Order Number LM139AD, LM239AD or LM339AD See Package 1 Order Number LM339AN See Package 22 2 10k 18 DMSAXX 1/8 DM5AXX Driving TTL 1-34absolute maximum ratings Supply Voltage, V* 36 Voc or #18 Voc Input Current (Vinqy < 0.3 Voc) (Note 3) 50 mA Differential Input Voltage 36 Voc Operating Temperature Range Input Voltage 0.3 Ving to +36 Voc LM339A 0C to +70C Power Dissipation (Note 1) LM239A 25C ta +85C Molded DIP (LM339AN) 570 mW LM139A 55C to +125C Cavity DIP. (LM139AD, LM239AD, Storage Temperature Range 65C to +150C and LM339AD) 900 mW Lead Temperature (Soldering, 10 seconds) 300C Flat Pack (LM139AF}) 800 mW Output Short-Circuit to GND (Note 2) Continuous electrical characteristics (v*=+5.0 Voc, see Note 4) LM139A LM239A, LM339A PARAMETER CONDITIONS UNITS MIN TYP MAX MIN TYP MAX input Offset Voltage Ta = +25C (Note 9) +4 +2.0 44 +2.0 mWVoc Input Bias Current (Note 5) Finis) OF lig () with Output in 25 100 25 250 nApe Linear Range, T, = +25C Input Offset Current Uwied whiney. Ta = 428C +3 +25 5 +50 Abc Input Common-Mode Voltage Ta = t28C Q VIALS 0 vt-15 Voc Range (Note 6) Supply Current RL. = on all Comparators 0.8 2.0 0.8 2.0 mApc Ta = 425C Voltage Gain R, > 15k2, Ta = +25C, S50 200 50 200 Vimv Vt = 15 Voc (To Support Large Vo Swing) Large Signal Response Time Vin = TTL Logic Swing, Veer = 300 300 ns +1.4Vpc, VAL =5 Voc. RL= 5.1kQ and Ta" = +28C Response Time (Note 7} Vay = 5 Voc and Ry = .1k2, 1.3 1.3 is Ta = +25C Output Sink Current Ving 2 +t Voc, Ving) =, 6.0 16 6.0 16 mAgc and Vo <+1.5 Voc. Ta, = +25C Saturation Voltage Viney 241 Voc, Vinay = 9, 250 500 250 500 mMVoc and Iging <4 MA, Ta = +25C Output Leakage Current Vin 241 Voc, Viney =O 0.1 0.1 nAge and Vo = 5 Voc, Ta = 425C Input Offset Voltage {Note 9) 40 4.0 moc Input Offset Current hin te 7 ding +100 +150 nApe Input Bias Current Fintey OF Eng. with Output in 300 400 nAnc Linear Range Input Common-Mode Voltage 0 vt-2.0 0 vt-2.0 Voc Range Saturation Voltage Vinee 241 Voc. Viney = 9 700 700 mVne and Isink <4 mA Output Leakage Current Viney 2+1 Yb, Vins = 9 1.0 10 BAne and Vo = 30 Voc Differential Input Voltage Keep all Vins 20 Vog (or V7, if yr vr Voc (Note 8) used) Note 1: For operating at high temperatures, the LM339A must be derated based on a +125C maximum junction temperature and a,thermal resistance of +175C/W which applies for the device soldered in a printed circuit board, operating in a still air ambient. The LM239A and LM139A must be derated based on a +150C maximum junction temperature. The low bias dissipation and the ON-OFF characteristic of the outputs keeps the chip dissipation very small (Pd < 100 mW}, provided the output transistors are allowed to saturate. Note 2: Short circuits from the output to vt can cause excessive heating and eventual destruction. The maximum output current is approximately 20) mA independent of the magnitude of Vt. Note 3: This input current will only exist when the voltage at any of the input leads is driven negative. It is due to the collector-base junction of the input PNP transistors becoming forward biased and thereby acting as input diode clamps. in addition to this diode action, there is also lateral NPN parasitic transistor action on the IC chip. This transistor action can cause the output voltages of the comparators to go to the V+ voltage level {ar to ground for a large overclrive) for the time durstion that an input is driven negative. This is not destructive and normal output states wili re-establish when the input voltage, which was negative, again returns to a value greater than 0.3 Voc. Note 4: These specifications apply for Vt = +5Vpc and -55C < Ta < +125C, unless otherwise stated. With the LM239A all temperature specifications are limited to 25C < Ta < +85C and the LM339A temperature specifications are limited to OC < Ta < +70C. Note 5: The direction of the input current is out of the IC due to the PNP input stage. This current is essentially constant, independent of the state of the output so no loading change exists on the reference or input lines. Note 6: The input common-mode voltage or either input signal voltage should not be allowed to go negative by more than 0,3V. The upper end of the common-mode voltage range is V+ 1.5V, but either or both inputs can go to +30 Voc without damage. Note 7: The response time specified is for a 100 mV imput step with 5 mV overdrive. For larger overdrive signals 300 ns can be obtained, see typical performance characteristics section. Note 8: If the voltage applied to any input exceeds V*, all four comparator outputs will go to the high voltage level. The low input voltage state must not be fess than ~0.3 Voc (or 0.3 Voc below the magnitude of the negative power supply, if used). Note 9: At output switch point, Vg = 1.4 Vpc, Rg = 02 with v* from Vp to 30 Voc: and over the full input common mode range (0 Vpc to vt 1.5 Vpel. 1-35 VG6EEWT/V6EECWNT/VG6ELWILM139A/LM239A/LM339A typical performance characteristics Supply Current ! 80 0 yt iere z =e 2 = os Ta= OC = 50 & i = 06 a = +26C z 5 = ap : Ta = 470C a zg O4 5 5 . S a Ta 2 +125C = 19 = | oe 1 Ta = 2eC z RL = - a 10 20 30 a0 0 vt SUPPLY VOLTAGE (Voc) Response Time for Various Input Overdrives Negative Transition SmV = INPUT OVERDRIVE Ps oe OUTPUT VOLTAGE, Vo (V} Now a6 Ta = 28C iNPUT VOLTAGE, Vin (mV} 88 6 0 05 1.0 1.5 2.0 TIME (us) application hints The LM139A is a high gain, wide bandwidth device; which, like most comparators, can easily oscillate if the output lead is inadvertently allowed to capacitively couple to the inputs via stray capacitance. This shows up only during the output voltage transition intervals as the comparator changes states. Power supply bypassing is not required to solve this problem. Standard PC board layout is helpful as it reduces stray input-output coupling. Reducing the input resistors to << 10 kQ reduces the feedback signal levels and finally, adding even a small amount (1 to 10 mV) of positive feedback (hysteresis) causes such a rapid transition that oscillations due to stray feedback are not possible. Simply socketing the IC and attaching resistors to the pins will cause input- output oscillations during the small transition intervals unless hysteresis is used. If the input signal is a pulse waveform, with relatively fast rise and fall times, hysteresis is not required. All pins of any unused comparators should be grounded. The bias network of the LM139A establishes a drain current which is independent of the magni- tude of the power supply voltage over the range of from 2 Voc to 30 Voc. It is usually unnecessary to use a bypass capacitor across the power supply line. Input Current 10 20 vt SUPPLY VOLTAGE (Vpc) Output Saturation Voltage Vinicm = @ Voc 8 OUT OF Rinicny * 10892 2 SATURATION 8 10 = 3 > Ta = 4125C So - = Ta = 58C zt ec 2 = 408" = Oat i Ta = 425C a Tq = +25C Ta = 470C > 0.001 30 40 0.91 a4 1.0 10 100 Ig OUTPUT SINK CURRENT (mA) Response Time for Various input Overdrives Positive Transition Vo (V) Vin (mV) (INPUT VOLTAGE, OUTPUT VOLTAGE, 0 a5 1.0 15 2.0 TIME (us) The differential input voltage may be larger than vt without damaging the device (see Note 8). Protection should be provided to prevent the input voltages from going negative more than ~0.3 Voc (at 25C). An input clamp diode can be used as shown in the applications section. The output of the LM139A is the uncommitted collector of a grounded-emitter NPN output tran- sistor. Many collectors can be tied together to provide an output ORing function. An output pull-up resistor can be connected to any available power supply voltage within the permitted supply voltage range and there is no restriction on this voltage due to the magnitude of the voltage which is applied to the V* terminal of the LM139A package. The output can also be used as a simple SPST switch to ground (when a pull-up resistor is not used). The amount of current which the output device can sink is limited by the drive available (which is independent of Vt) and the 8 of this device. When the maximum current limit is reached (approximately 16 mA), the output transistor will come out of saturation and the output voltage will rise very rapidly. The output saturation voltage is limited by the approximately 602 reat Of the output transistor. The low offset voltage of the output transistor (1 mV) allows the output to clamp essentially to ground level for small load currents.