1
MRF5003MOTOROLA RF DEVICE DATA
The RF MOSFET Line
    
N–Channel Enhancement–Mode
The MRF5003 is designed for broadband commercial and industrial
applications at frequencies to 520 MHz. The high gain and broadband
performance of this device makes it ideal for large–signal, common source
amplifier applications in 7.5 Volt and 12.5 Volt mobile, portable, and base
station FM equipment.
Guaranteed Performance at 512 MHz, 7.5 Volts
Output Power = 3.0 Watts
Power Gain = 9.5 dB
Efficiency = 45%
Characterized with Series Equivalent Large–Signal Impedance Parameters
S–Parameter Characterization at High Bias Levels
Excellent Thermal Stability
All Gold Metal for Ultra Reliability
Capable of Handling 20:1 VSWR, @ 15.5 Vdc, 512 MHz, 2.0 dB Overdrive
Suitable for 12.5 Volt Applications
True Surface Mount Package
Available in Tape and Reel by Adding R1 Suffix to Part Number.
R1 Suffix = 500 Units per 16 mm, 7 inch Reel.
Circuit board photomaster available upon request by contacting
RF Tactical Marketing in Phoenix, AZ.
MAXIMUM RATINGS
Rating Symbol Value Unit
Drain–Source Voltage VDSS 36 Vdc
Drain–Gate Voltage (RGS = 1.0 Meg Ohm) VDGR 36 Vdc
Gate–Source Voltage VGS ±20 Vdc
Drain Current — Continuous ID1.7 Adc
Total Device Dissipation @ TC = 25°C
Derate above 25°CPD12.5
0.07 Watts
W/°C
Storage Temperature Range Tstg 65 to +150 °C
Operating Junction Temperature TJ200 °C
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Thermal Resistance, Junction to Case RθJC 14 °C/W
NOTE – CAUTION – MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and
packaging MOS devices should be observed.
Order this document
by MRF5003/D

SEMICONDUCTOR TECHNICAL DATA
3.0 W, 7.5 V, 512 MHz
N–CHANNEL
BROADBAND
RF POWER FET
CASE 430–01, STYLE 2
Motorola, Inc. 1994
REV 6
MRF5003
2MOTOROLA RF DEVICE DATA
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted.)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0, ID = 2.5 mAdc) V(BR)DSS 36 Vdc
Zero Gate Voltage Drain Current
(VDS = 15 Vdc, VGS = 0) IDSS 1.0 mAdc
Gate–Source Leakage Current
(VGS = 20 Vdc, VDS = 0) IGSS 1.0 µAdc
ON CHARACTERISTICS
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 5.0 mAdc) VGS(th) 1.25 2.25 3.5 Vdc
Drain–Source On–Voltage
(VGS = 10 Vdc, ID = 0.5 Adc) VDS(on) 0.375 Vdc
Forward Transconductance
(VDS = 10 Vdc, ID = 0.5 Adc) gfs 0.6 mho
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 12.5 Vdc, VGS = 0, f = 1.0 MHz) Ciss 16.5 pF
Output Capacitance
(VDS = 12.5 Vdc, VGS = 0, f = 1.0 MHz) Coss 37 pF
Reverse Transfer Capacitance
(VDS = 12.5 Vdc, VGS = 0, f = 1.0 MHz) Crss 3.5 4.4 5.4 pF
FUNCTIONAL TESTS (In Motorola Test Fixture)
Common–Source Amplifier Power Gain
(VDD = 7.5 Vdc, Pout = 3.0 W, IDQ = 50 mA) f = 512 MHz
f = 175 MHz
Gps 9.5
10.5
15
dB
Drain Efficiency
(VDD = 7.5 Vdc, Pout = 3.0 W, IDQ = 50 mA) f = 512 MHz
f = 175 MHz
h45
50
55
%
3
MRF5003MOTOROLA RF DEVICE DATA
10
8
6
4
2
00 100 200 300 400 500
f = 400 MHz
470 MHz
520 MHz
VDD = 12.5 V
IDQ = 50 mA
Pin, INPUT POWER (MILLIWATTS)
Pout , OUTPUT POWER (WATTS)
5
4
3
2
1
00 100 200 300 400 500
f = 400 MHz
470 MHz
520 MHz
VDD = 7.5 V
IDQ = 50 mA
Pin, INPUT POWER (MILLIWATTS)
Pout , OUTPUT POWER (WATTS)
C1, C3, C7, C8 0 to 20 pF Johanson
C2, C9 56 pF, 100 mil Chip
C4 10 pF, 100 mil Chip
C5 47 pF, Miniature Clamped Mica Capacitor
C6 22 pF, 100 mil Chip
C10, C15 10 µF, 50 V, Electrolytic
C11, C14 0.1 µF, Capacitor
C12 1000 pF, 100 mil Chip
C13 160 pF, 100 mil Chip
R1 35 , 1/4 W Carbon
R2 30 , 0.1 W Chip
R3 1.0 k, 0.1 W Chip
R4 1.0 M, 1/4 W Carbon
B1 Fair Rite Products Short Ferrite Bead (2743021446)
Board — Glass Teflon, 31 mils
Note: Plated ceramic part locators (0.1 x 0.15) soldered onto Z6 and Z7.
Z1 0.350 x 0.08 Microstrip
Z2 0.190 x 0.08 Microstrip
Z3 0.800 x 0.08 Microstrip
Z4 0.380 x 0.08 Microstrip
Z5 0.150 x 0.08 Microstrip
Z6 0.285 x 0.08 Microstrip
Z7 0.340 x 0.08 Microstrip
Z8 0.070 x 0.08 Microstrip
Z9 0.280 x 0.08 Microstrip
Z10 0.840 x 0.08 Microstrip
Z11 0.180 x 0.08 Microstrip
Z12 0.600 x 0.08 Microstrip
L1 7 Turns, 0.076 ID, #24 AWG Enamel
L2 5 Turns, 0.126 ID, #20 AWG Enamel
Input/Output Connectors — Type N
Figure 1. 512 MHz Narrowband Test Circuit
TYPICAL CHARACTERISTICS
Figure 2. Output Power versus Input Power Figure 3. Output Power versus Input Power
VGG
RF
INPUT
RF
OUTPUT
C10 C11 R4
R3 C12 C13 C14 C15
B1
L2
Z7 Z8 Z9 Z10 Z11 Z12
C6 C7 C8 C9
Z6Z5Z4Z3Z2Z1
C1 C3 R1
C5
R2
VDD
C2 D.U.T.
L1C4
MRF5003
4MOTOROLA RF DEVICE DATA
125
100
75
50
25
00 2 4 6 14
Coss
Ciss
Crss
VGS = 0 V
f = 1.0 MHz
VDS, DRAIN–SOURCE VOLTAGE (VOLTS)
8 10 12
C, CAPACITANCE (pF)
1000
800
600
400
200
00 1 2 3 4
VGS, GATE–SOURCE VOLTAGE (VOLTS) 5
VDS = 10 V
ID, DRAIN CURRENT (MILLIAMPS)
5
4
3
2
1
00 1 2 3 4
VGS, GATE–SOURCE VOLTAGE (VOLTS) 5
VDD = 7.5 V
Pin = 0.3 W
f = 470 MHz
TYPICAL DEVICE SHOWN
VGS(th) = 2.4 V
10
8
6
4
2
06 8 10 12 14
Pin = 300 mW
200 mW
100 mW
f = 520 MHz
ID = 50 mA
VDD, SUPPLY VOLTAGE
10
8
6
4
2
06 8 10 12 14
Pin = 300 mW
200 mW
100 mW
f = 470 MHz
ID = 50 mA
VDD, SUPPLY VOLTAGE
10
8
6
4
2
06 8 10 12 14
Pin = 300 mW
200 mW
100 mW
f = 400 MHz
ID = 50 mA
VDD, SUPPLY VOLTAGE
Figure 4. Output Power versus Supply Voltage Figure 5. Output Power versus Supply Voltage
Figure 6. Output Power versus Supply Voltage Figure 7. Output Power versus Gate Voltage
Figure 8. Drain Current versus Gate Voltage
(Typical Device Shown) Figure 9. Capacitance versus Voltage
Pout , OUTPUT POWER (WATTS)Pout , OUTPUT POWER (WATTS)
Pout , OUTPUT POWER (WATTS) Pout , OUTPUT POWER (WATTS)
TYPICAL CHARACTERISTICS
2
1
1.5
1
0.5
010 36 V 100
TC = 25
°
C
VDS, DRAIN SOURCE VOLTAGE (VOLTS)
ID, DRAIN CURRENT (AMPS)
1.06
0.94
0.92
0.90
0.88
0.86
–25 0 25 50 150
IDQ = 150 mA
75 mA
25 mA
VDD = 12.5 V
TC, CASE TEMPERATURE (
°
C)
0.96
0.98
1.00
1.02
1.04
75 100 125
VGS, GATE-SOURCE VOLTAGE (NORMALIZED)
Figure 10. Gate–Source Voltage versus
Case Temperature
Note: Zol* was chosen based on tradeoffs between gain, drain efficiency, and device stability.
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Series Equivalent Input and Output Impedance
Zin
f = 400 MHz
520 MHz
ZOL*
f = 400 MHz
Zo = 10
460 MHz
520 MHz
460 MHz
VDD = 7.5 V, IDQ = 50 mA, Pout = 3.0 W
Zin = Conjugate of source impedance with parallel 35
Zin = resistor and 47 pF capacitor in series with gate.
ZOL* = Conjugate of the load impedance at given output
ZOL* = power, voltage, frequency, and
η
D > 50%.
5
MRF5003MOTOROLA RF DEVICE DATA
f
MHz Zin
Ohms ZOL*
Ohms
400 2.8 – j9.2 3.6 – j1.7
430 2.7 – j8.5 3.3 – j1.5
460 2.5 – j7.8 2.7 – j1.1
490 2.0 – j7.2 2.5 – j0.8
520 1.3 – j6.5 2.4 – j0.5
MRF5003
6MOTOROLA RF DEVICE DATA
Table 1. Common Source Scattering Parameters (VDS = 10 V)
ID = 50 mA
f S11 S21 S12 S22
MHz |S11|φ|S21|φ|S12|φ|S22|φ
50 0.69 90 10.8 117 0.07 29 0.74 119
100 0.58 120 6.0 96 0.08 10 0.78 146
200 0.58 139 3.0 75 0.08 7 0.81 161
300 0.64 147 1.9 61 0.07 16 0.84 166
400 0.70 152 1.3 50 0.06 21 0.86 169
500 0.75 157 0.99 41 0.05 24 0.88 172
700 0.82 165 0.61 28 0.03 15 0.92 176
850 0.86 171 0.45 21 0.02 13 0.94 179
1000 0.89 176 0.34 16 0.02 47 0.95 178
ID = 500 mA
f S11 S21 S12 S22
MHz |S11|φ|S21|φ|S12|φ|S22|φ
50 0.76 124 15.0 109 0.04 23 0.76 151
100 0.72 150 7.9 94 0.04 12 0.81 165
200 0.72 163 4.0 80 0.04 6 0.83 172
300 0.73 168 2.6 71 0.04 5 0.84 175
400 0.75 171 1.9 62 0.04 7 0.85 176
500 0.77 173 1.5 55 0.03 12 0.86 178
700 0.81 177 0.97 42 0.03 29 0.89 180
850 0.84 180 0.75 35 0.03 44 0.90 178
1000 0.86 177 0.60 29 0.04 55 0.92 176
ID = 1.0 A
f S11 S21 S12 S22
MHz |S11|φ|S21|φ|S12|φ|S22|φ
50 0.80 125 14.6 110 0.04 23 0.75 155
100 0.76 150 7.8 95 0.04 10 0.81 167
200 0.76 164 3.9 81 0.04 1 0.83 173
300 0.77 169 2.6 71 0.04 3 0.84 175
400 0.79 172 1.9 63 0.03 5 0.85 176
500 0.80 174 1.4 56 0.03 5 0.86 177
700 0.83 178 0.95 43 0.03 1 0.88 179
850 0.85 179 0.73 35 0.02 9 0.90 179
1000 0.87 177 0.58 28 0.02 22 0.91 178
7
MRF5003MOTOROLA RF DEVICE DATA
C1, C9 100 pF 100 mil Chip
C2 16 pF, 100 mil Chip
C3 24 pF, 100 mil Chip
C4 68 pF, 100 mil Chip
C5 51 pF, 100 mil Chip
C6 39 pF, 100 mil Chip
C7 6.2 pF, 100 mil Chip
C8 9.1 pF, 100 mil Chip
C10, C15 39000 pF, 100 mil Chip
C11, C16 10 µF, 50 V Electrolytic
C12 10000 pF, 100 mil Chip
B1 Fair Rite Products Short Ferrite Bead (2743021446)
C13 0.1 µF, 100 mil Chip
C14 160 pF, 100 mil Chip
R1 43 , 0.1 W Chip Resistor
R2 1000 , 0.1 W Chip Resistor
R3 10 k Potentiometer
R4 3000 , 0.1 W Chip Resistor
L1 5 Turns, 0.126 ID, #20 AWG Enamel
Z1 to Z13 See Photomaster
D1 1N4734 Motorola Zener
Board — G10, 1/32
Input/Output Connectors — SMA
Figure 13. Schematic of Broadband Demonstration Amplifier
RF
INPUT
RF
OUTPUT
C10 C11
R4
R3
C12
C13
C14
C15
B1
Z7 Z8 Z9 Z10 Z11 Z12
C6 C7 C8 C9
Z6Z5Z4Z3Z2Z1
C1 C3
R1
C5
R2
VDD
C2 D.U.T.
L1
C4
D1 C16
Z13
MRF5003
8MOTOROLA RF DEVICE DATA
5
4
3
2
1
00 1 2 3 5
f = 400 MHz
470 MHz
TYPICAL DEVICE SHOWN
VGS(th) = 2.4 V
VDD = 7.5 V
Pin = 0.3 W
VGS, GATE–SOURCE VOLTAGE (VOLTS)
Pout , OUTPUT POWER (WATTS)
4
5
4
3
2
1
0
400 410 420 430 470
VSWR
f, FREQUENCY (MHz)
Pout , OUTPUT POWER (WATTS)
60
55
50
45
40
35
30
1.75
1.50
1.25
1.00
440 450 460
Po
η
VSWR
5
4
3
2
1
00 200 400 600 800
Pin, INPUT POWER (MILLIWATTS)
Pout , OUTPUT POWER (WATTS)
1000 1200
Figure 14. Output Power versus Input Power Figure 15. Output Power, Drain Efficiency and
VSWR versus Frequency
Figure 16. Output Power versus Gate Voltage
PERFORMANCE CHARACTERISTICS OF BROADBAND DEMONSTRATION AMPLIFIER
f = 400 MHz
VDD = 7.5 V
IDQ = 50 mA
470 MHz
, DRAIN EFFICIENCY (%)
η
9
MRF5003MOTOROLA RF DEVICE DATA
DESIGN CONSIDERATIONS
The MRF5003 is a common–source, RF power, N–Chan-
nel enhancement mode, Metal–Oxide Semiconductor Field–
Effect Transistor (MOSFET). Motorola RF MOSFETs feature
a vertical structure with a planar design. Motorola Application
Note AN211A, “FETs in Theory and Practice”, is suggested
reading for those not familiar with the construction and char-
acteristics of FETs.
This surface mount packaged device was designed pri-
marily for VHF and UHF power amplifier applications.
Manufacturability is improved by utilizing the tape and reel
capability for fully automated pick and placement of parts.
The major advantages of RF power MOSFETs include
high gain, simple bias systems, relative immunity from ther-
mal runaway, and the ability to withstand severely mis-
matched loads without suffering damage.
MOSFET CAPACITANCES
The physical structure of a MOSFET results in capacitors
between all three terminals. The metal oxide gate structure
determines the capacitors from gate–to–drain (Cgd), and
gate–to–source (Cgs). The PN junction formed during fab-
rication of the RF MOSFET results in a junction capacitance
from drain–to–source (Cds). These capacitances are charac-
terized as input (Ciss), output (Coss) and reverse transfer
(Crss) capacitances on data sheets. The relationships be-
tween the inter–terminal capacitances and those given on
data sheets are shown below. The C iss can be specified in
two ways:
1. Drain shorted to source and positive voltage at the gate.
2. Positive voltage of the drain in respect to source and zero
volts at the gate.
In the latter case, the numbers are lower . However, neither
method represents the actual operating conditions in RF ap-
plications.
Cgd
GATE
SOURCE
Cgs
DRAIN
Cds Ciss = Cgd + Cgs
Coss = Cgd + Cds
Crss = Cgd
DRAIN CHARACTERISTICS
One critical figure of merit for a FET is its static resistance
in the full–on condition. This on–resistance, RDS(on), occurs
in the linear region of the output characteristic and is speci-
fied at a specific gate–source voltage and drain current. The
drain–source voltage under these conditions is termed
VDS(on). For MOSFET s, VDS(on) has a positive temperature
coefficient at high temperatures because it contributes to the
power dissipation within the device.
GATE CHARACTERISTICS
The gate of the RF MOSFET is a polysilicon material, and
is electrically isolated from the source by a layer of oxide.
The input resistance is very high — on the order of 109
resulting in a leakage current of a few nanoamperes.
Gate control is achieved by applying a positive voltage to
the gate greater than the gate–to–source threshold voltage,
VGS(th).
Gate Voltage Rating — Never exceed the gate voltage
rating. Exceeding the rated VGS can result in permanent
damage to the oxide layer in the gate region.
Gate Termination — The gates of these devices are es-
sentially capacitors. Circuits that leave the gate open–cir-
cuited or floating should be avoided. These conditions can
result in turn–on of the devices due to voltage build–up on
the input capacitor due to leakage currents or pickup.
Gate Protection — These devices do not have an internal
monolithic zener diode from gate–to–source. If gate protec-
tion is required, an external zener diode is recommended
with appropriate RF decoupling.
Using a resistor to keep the gate–to–source impedance
low also helps dampen transients and serves another impor-
tant function. Voltage transients on the drain can be coupled
to the gate through the parasitic gate–drain capacitance. If
the gate–to–source impedance and the rate of voltage
change on the drain are both high, then the signal coupled to
the gate may be large enough to exceed the gate–threshold
voltage and turn the device on.
DC BIAS
Since the MRF5003 is an enhancement mode FET, drain
current flows only when the gate is at a higher potential than
the source. See Figure 8 for a typical plot of drain current ver-
sus gate voltage. RF power FETs operate optimally with a
quiescent drain current (IDQ), whose value is application de-
pendent. The MRF5003 was characterized at IDQ = 50 mA,
which is the suggested value of bias current for typical ap-
plications. For special applications such as linear amplifica-
tion, IDQ may have to be selected to optimize the critical
parameters.
The gate is a dc open circuit and draws no current. There-
fore, the gate bias circuit may generally be just a simple re-
sistive divider network. Some special applications may
require a more elaborate bias system.
GAIN CONTROL
Power output of the MRF5003 may be controlled from its
rated value down to zero (negative gain) with a low power dc
control signal, thus facilitating applications such as manual
gain control, ALC/AGC and modulation systems. Figure 16 is
an example of output power variation with gate–source bias
voltage. This characteristic is very dependent on frequency
and load line.
MOUNTING
The specified maximum thermal resistance of 14°C/W as-
sumes a majority of the 0.100 x 0.200 source contact on
the back side of the package is in good contact with an ap-
propriate heat sink. In the test fixture shown in Figure 1, the
device is clamped directly to a copper pedestal. In the dem-
onstration amplifier, the device was mounted on top of the
G10 circuit board and heat removal was accomplished
through several solder filled plated through holes. As with all
RF power devices, the goal of the thermal design should be
to minimize the temperature at the back side of the package.
MRF5003
10 MOTOROLA RF DEVICE DATA
AMPLIFIER DESIGN
Impedance matching networks similar to those used with
bipolar transistors are suitable for the MRF5003. For exam-
ples see Motorola Application Note AN721,Impedance
Matching Networks Applied to RF Power Transistors”. Both
small–signal S–parameters and large–signal impedances
are provided. While the S–parameters will not produce an
exact design solution for high power operation, they do yield
a good first approximation. This is an additional advantage of
RF power MOSFETs.
Since RF power MOSFETs are triode devices, they are not
unilateral. This coupled with the very high gain of the
MRF5003 yield a device capable of self oscillation. Stability
may be achieved by techniques such as drain loading, input
shunt resistive loading, or output to input feedback. Different
stabilizing techniques were applied to the test fixture and
demonstration amplifiers. The RF test fixture implements a
parallel resistor and capacitor in series with the gate while
the demonstration amplifier utilizes a 43 shunt resistor
from gate to ground. Both circuits have a load line selected
for a higher efficiency, lower gain, and more stable operating
region.
Two port stability analysis with the MRF5003 S–parame-
ters provides a useful tool for selection of loading or feed-
back circuitry to assure stable operation. See Motorola
Application Note AN215A, “RF Small–Signal Design Using
Two–Port Parameters”, for a discussion of two port network
theory and stability.
PACKAGE DIMENSIONS
CASE 430–01
ISSUE O
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ÉÉÉÉÉÉ
ÉÉÉÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
ÉÉ
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ÉÉÉÉÉ
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NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
NA
R
B
2
3
1
C
E
D
G
F S
L
2
3
1
SEATING
PLANE
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
A0.260 0.270 6.60 6.86
B0.200 0.210 5.08 5.33
C0.090 0.104 2.29 2.64
D0.040 0.050 1.02 1.27
E0.022 0.028 0.56 0.71
F0.015 0.025 0.38 0.64
G0.005 0.015 0.13 0.38
L0.100 0.110 2.54 2.79
N0.226 0.236 5.74 5.99
R0.166 0.176 4.22 4.47
S0.025 0.035 0.64 0.89
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MRF5003/D
*MRF5003/D*