Low Cost, Precision JFET
Input Operational Amplifiers
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A
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FEATURES
High slew rate: 20 V/μs
Fast settling time
Low offset voltage: 1.70 mV maximum
Bias current: 40 pA maximum
±4 V to ±18 V operation
Low voltage noise: 16 nV/√Hz
Unity gain stable
Common-mode voltage includes +VS
Wide bandwidth: 5 MHz
APPLICATIONS
Reference gain/buffers
Level shift/driving
Active filters
Power line monitoring/control
Current/voltage sense or monitoring
Data acquisition
Sample-and-hold circuits
Integrators
GENERAL DESCRIPTION
The ADA4000-1/ADA4000-2/ADA4000-4 are JFET input
operational amplifiers featuring precision, very low bias current,
and low power. Combining high input impedance, low input
bias current, wide bandwidth, fast slew rate, and fast settling
time, the ADA4000-1/ADA4000-2/ADA4000-4 are ideal
amplifiers for driving analog-to-digital inputs and buffering
digital-to-analog converter outputs. The input common-mode
voltage includes the positive power supply, which makes the
part an excellent choice for high-side signal conditioning.
Additional applications for the ADA4000-1/ADA4000-2/
ADA4000-4 include electronic instruments, ATE amplification,
buffering, integrator circuits, instrumentation-quality photodiode
amplification, and fast precision filters (including PLL filters).
The parts also include utility functions, such as reference
buffering, level shifting, control I/O interface, power supply
control, and monitoring functions.
PIN CONFIGURATIONS
O
UT
1
V–
2
+IN
3
V+
5
–IN
4
ADA4000-1
TOP VIEW
(Not to Scale)
05791-001
Figure 1. 5-Lead TSOT (UJ-5)
NC
1
–IN
2
+IN
3
V–
4
NC
8
V+
7
OUT
6
NC
5
NC = NO CONNECT
ADA4000-1
TOP VIEW
(Not to Scale)
05791-002
Figure 2. 8-Lead SOIC (R-8)
OUT A
1
–IN A
2
+IN A
3
–V
4
+V
8
OUT B
7
–IN B
6
+IN B
5
ADA4000-2
TOP VIEW
(Not to Scale)
05791-027
Figure 3. 8-Lead SOIC (R-8)
OUT A
1
–IN A
2
+IN A
3
–V
4
+V
8
OUT B
7
–IN B
6
+IN B
5
ADA4000-2
TOP VIEW
(Not to Scale)
05791-028
Figure 4. 8-Lead MSOP (RM-8)
OUT A
1
–IN A
2
+IN A
3
+V
4
OUT D
14
–IN D
13
+IN D
12
–V
11
+IN B
5
+IN C
10
–IN B
6
–IN C
9
OUT B
7
OUT C
8
ADA4000-4
TOP VIEW
(Not to Scale)
05791-029
Figure 5. 14-Lead SOIC (R-14)
ADA4000-4
1
2
3
4
5
6
7
–IN A
+IN A
+V
OUT B
–IN B
+IN B
OUT A 14
13
12
11
10
9
8
–IN D
+IN D
–V
OUT C
–IN C
+IN C
OUT D
TOP VIEW
(Not to Scale)
05791-030
Figure 6. 14-Lead TSSOP (RU-14)
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Pin Configurations ........................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Electrical Characteristics ............................................................. 3
Absolute Maximum Ratings ............................................................ 5
Thermal Resistance ...................................................................... 5
Power Sequencing .........................................................................5
ESD Caution...................................................................................5
Typical Performance Characteristics ..............................................6
Applications ..................................................................................... 10
Output Phase Reversal and Input Noise ................................. 10
Capacitive Load Drive ............................................................... 10
Settling Time ............................................................................... 11
Outline Dimensions ....................................................................... 12
Ordering Guide .......................................................................... 14
REVISION HISTORY
3/09—Rev. 0 to Rev. A
Changes to Input Voltage Range Parameter ................................. 4
Changes to Common-Mode Rejection Ration Parameter .......... 4
Updated Outline Dimensions ....................................................... 12
Changes to Ordering Guide .......................................................... 14
5/07—Revision 0: Initial Version
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 3 of 16
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VS = ±15.0 V, VCM = VS/2 V, TA = 25°C, unless otherwise specified.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS 0.2 1.70 mV
−40°C ≤ TA ≤ +125°C 3.0 mV
Input Bias Current IB 5 40 pA
−40°C ≤ TA ≤ +85°C 170 pA
−40°C ≤ TA ≤ +125°C 4.5 nA
Input Offset Current IOS 2 40 pA
−40°C ≤ TA ≤ +85°C 80 pA
−40°C ≤ TA ≤ +125°C 500 pA
Input Voltage Range IVR −11 +15 V
Common-Mode Rejection Ratio CMRR −11 V ≤ VCM ≤ +15 V 80 100 dB
−40°C ≤ TA ≤ +125°C 100 dB
Open-Loop Gain AVO R
L = 2 kΩ, VO = ±10 V 100 110 dB
Offset Voltage Drift ΔVOS/ΔT −40°C ≤ TA ≤ +125°C 2 μV/°C
OUTPUT CHARACTERISTICS
Output Voltage High VOH R
L = 2 kΩ to ground 13.60 13.90 V
−40°C ≤ TA ≤ +125°C 13.40 V
Output Voltage Low VOL R
L = 2 kΩ to ground −13.4 −13.0 V
−40°C ≤ TA ≤ +125°C −12.80 V
Short-Circuit Current ISC ±28 mA
POWER SUPPLY
Power Supply Rejection Ratio PSRR VS = ±4.0 V to ±18.0 V 82 92 dB
Supply Current/Amplifier ISY 1.35 1.65 mA
−40°C ≤ TA ≤ +125°C 1.80 mA
DYNAMIC PERFORMANCE
Slew Rate SR VI = 10 V, RL = 2 kΩ 20 V/μs
Gain Bandwidth Product GBP 5 MHz
Phase Margin ΦM 60 Degrees
NOISE PERFORMANCE
Voltage Noise en p-p 0.1 Hz to 10 Hz 1 μV p-p
Voltage Noise Density en f = 1 kHz 16 nV/√Hz
Current Noise Density in f = 1 kHz 0.01 pA/√Hz
INPUT IMPEDANCE
Differential Mode (R||C)IN-DIFF 10||4 GΩ||pF
Common Mode (R||C)INCM 103||5.5 GΩ||pF
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 4 of 16
VS = ±5 V, VCM = VS/2 V, TA = 25°C, unless otherwise specified.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage VOS 0.20 1.70 mV
−40°C ≤ TA ≤ +125°C 3.0 mV
Input Bias Current IB 5 40 pA
−40°C ≤ TA ≤ +85°C 170 pA
−40°C ≤ TA ≤ +125°C 3 nA
Input Offset Current IOS 2 40 pA
−40°C ≤ TA ≤ +85°C 80 pA
−40°C ≤ TA ≤ +125°C 500 pA
Input Voltage Range IVR −1.0 +5.0 V
Common-Mode Rejection Ratio CMRR −1.0 V ≤ VCM ≤ +5.0 V 72 80 dB
−40°C ≤ TA ≤ +125°C 80 dB
Open-Loop Gain AVO R
L = 2 kΩ, VO = ±2.5 V 106 114 dB
Offset Voltage Drift ΔVOS/ΔT −40°C ≤ TA ≤ +125°C 2 μV/°C
OUTPUT CHARACTERISTICS
Output Voltage High VOH R
L = 2 kΩ to ground 4.0 4.20 V
−40°C ≤ TA ≤ +125°C 3.80 V
Output Voltage Low VOL R
L = 2 kΩ to ground −3.45 −3.20 V
−40°C ≤ TA ≤ +125°C −3.00 V
Short-Circuit Current ISC ±28 mA
POWER SUPPLY
Supply Current/Amplifier ISY 1.25 1.65 mA
−40°C ≤ TA ≤ +125°C 1.80 mA
DYNAMIC PERFORMANCE
Slew Rate SR VI = 10 V, RL = 2 kΩ 20 V/μs
Gain Bandwidth Product GBP 5 MHz
Phase Margin ΦM 55 Degrees
NOISE PERFORMANCE
Voltage Noise en p-p 0.1 Hz to 10 Hz 1 μV p-p
Voltage Noise Density en f = 1 kHz 16 nV/√Hz
Current Noise Density in f = 1 kHz 0.01 pA/√Hz
INPUT IMPEDANCE
Differential Mode (R||C)IN-DIFF 10||4 GΩ||pF
Common Mode (R||C)INCM 103||5.5 GΩ||pF
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
Supply Voltage ±18 V
Input Voltage ±V supply
Differential Input Voltage ±V supply
Output Short-Circuit Duration to GND Indefinite
Storage Temperature Range −65°C to +150°C
Operating Temperature Range −40°C to +125°C
Junction Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type θJA θ
JC Unit
5-Lead TSOT (UJ-5) 172.92 61.76 °C/W
8-Lead SOIC (R-8) 112.38 61.6 °C/W
8-Lead MSOP (RM-8) 141.9 43.7 °C/W
14-Lead SOIC (R-14) 88.2 56.3 °C/W
14-Lead TSSOP (RU-14) 114 23.3 °C/W
POWER SEQUENCING
The op amp supply voltages must be established simultaneously
with, or before, any input signals are applied. If this is not
possible, the input current must be limited to 10 mA.
ESD CAUTION
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 6 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
05791-003
50
45
40
35
30
25
20
15
10
5
0
NUMBER OF AMPLIFIERS
–2.0 –1.5 –1.0 –0.5 0 0.5 1.0 1.5 2.0
OFFSET VOLTAGE (mV)
V
S
= ±15V
T
A
= 25°C
V
CM
= 0V
Figure 7. Input Offset Voltage Distribution, VS = ±15 V
05791-004
4
2
0
6
8
10
12
14
16
18
02468101214161820
NUMBER OF AMPLIFIERS
TCV
OS
(µV/°C)
V
S
= ±15V
Figure 8. Offset Voltage Drift Distribution, VS = ±15 V
80
–20
1k 100M
FREQUENCY (Hz)
GAIN (dB)
05791-010
0
20
40
60
180
–45
PHASE MARGIN (Degrees)
0
45
90
135
10k 100k 1M 10M
V
S
= ±15V
T
A
= 25°C
C
L
= 35pF
60°
Figure 9. Open-Loop Gain and Phase Margin vs. Frequency, VS = ±15 V
05791-018
50
45
40
35
30
25
20
15
10
5
0
NUMBER OF AMPLIFIERS
–2.0 –1.5 –1.0 –0.5 0 0.5 1.0 1.5 2.0
OFFSET VOLTAGE (mV)
V
S
= ±5V
T
A
= 25°C
V
CM
= 0V
Figure 10. Input Offset Voltage Distribution, VS = ±5 V
05791-019
4
2
0
6
8
10
12
14
024 68101214161820
NUMBER OF AMPLIFIERS
TCV
OS
(µV/°C)
V
S
= ±5V
Figure 11. Offset Voltage Drift Distribution, VS = ±5 V
80
–20
1k 100M
FREQUENCY (Hz)
GAIN (dB)
05791-020
0
20
40
60
180
–45
PHASE MARGIN (Degrees)
0
45
90
135
10k 100k 1M 10M
VS = ±5V
TA = 25°C
CL = 35pF
55°
Figure 12. Open-Loop Gain and Phase Margin vs. Temperature, VS = ±5 V
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 7 of 16
120
20
100 10M
FREQUENCY (Hz)
CMRR (dB)
05791-013
40
60
80
100
1k 10k 100k 1M
VS = ±15V
TA = 25°C
Figure 13. Common-Mode Rejection Ratio vs. Frequency, VS = ±15 V
15
–15
TIME (1µs/DIV)
VOLTAGE (V)
05791-015
–5
10
0
5
–10
V
S
= ±15V
A
V
= +1
R
L
= 2kΩ
T
A
= 25°C
Figure 14. Large Signal Transient Response, VS = ±15 V
TIME (2µs/DIV)
VOLTAGE (20mV/DIV)
V
S
= ±15V
C
L
= 300pF
A
V
= +1
T
A
= 25°C
05791-016
Figure 15. Small Signal Transient Response, VS = ±15 V
100
20
1k 10M
FREQUENCY (Hz)
CMRR (dB)
05791-021
60
10k 100k 1M
80
40
V
S
= ±5V
T
A
= 25°C
Figure 16. Common-Mode Rejection Ratio vs. Frequency, VS = ±5 V
TIME (1µs/DIV)
VOLTAGE (V)
05791-023
4
3
2
1
0
–1
–2
–3
–4
V
S
= ±5V
A
V
= –1
R
L
= 2kΩ
T
A
= 25°C
Figure 17. Large Signal Transient Response, VS = ±5 V
TIME (2µs/DIV)
VOLTAGE (20mV/DIV)
05791-024
V
S
= ±5V
C
L
= 300pF
A
V
= +1
T
A
= 25°C
Figure 18. Small Signal Transient Response, VS = ±5 V
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 8 of 16
3.5
1.0
±5 ±15
SUPPLY VOLTAGE (V)
INPUT BIAS CURRENT (pA)
05791-006
3.0
2.5
2.0
1.5
±6 ±7 ±8 ±9 ±10 ±11 ±12 ±13 ±14
T
A
= 25°C
Figure 19. Input Bias Current vs. Supply Voltage
10000
–40
TEMPERATURE (°C)
INPUT BIAS CURRENT (pA)
05791-005
1
0.1
10
100
1000
–25 –10 5 20 35 50 65 80 95 110 125
V
S
= ±15V
V
S
= ±5V
Figure 20. Input Bias Current vs. Temperature
1.44
1.20
–40 125
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
05791-012
1.40
1.36
1.32
1.28
1.24
–25 –10 5 20 35 50 65 80 95 110
V
S
= ±5V
V
S
= ±15V
Figure 21. Supply Current vs. Temperature
1.40
1.35
1.30
1.25
1.20
1.15
1.10
SUPPLY CURRENT (mA)
±4 ±5 ±6 ±7 ±8 ±9 ±10 ±11 ±12 ±13 ±14 ±15
SUPPLY VOLTAGE (V)
05791-008
T
A
= 25°C
NO LOAD
Figure 22. Supply Current vs. Supply Voltage
16
0
02
LOAD CURRENT (mA)
OUTPUT VOLTAGE (V)
5.0
05791-009
14
12
10
8
6
4
2
2.5 5.0 7.5 10.0 12.5 15.0 17.5 20.0 22.5
VS = ±15V
VS = ±5V
|VOL|
VOH
|VOL|
VOH
Figure 23. Output Voltage vs. Load Current
120
–20
100 10M
FREQUENCY (Hz)
PSRR (dB)
05791-014
20
80
1k 10k 100k 1M
100
40
60
0
VS = ±5V, ±15V
PSRR–
PSRR+
Figure 24. PSRR vs. Frequency
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 9 of 16
10 100 1k
100
1
1 10k
FREQUENCY (Hz)
VOLTAGE NOISE DENSITY (nV/√Hz)
05791-026
10
VS = ±5V, ±15V
TA = 25°C
Figure 25. Voltage Noise Density vs. Frequency
120
0
1k 100M
FREQUENCY (Hz)
Z
OUT
(Ω)
05791-017
60
80
10k 100k 1M 10M
100
20
40
VS = ±15V
TA = 25°C
Av = +100
Av = +10 Av = +1
Figure 26. Output Impedance vs. Frequency
60
0
0600400200
LOAD CAPACITANCE (pF)
OVERSHOOT (%)
05791-022
800 1000
50
40
30
20
10
V
IN
= 100mV p-p
V
S
= ±5V, ±15V
R
L
= 0
A
V
= +1
+OVERSHOOT
–OVERSHOOT
Figure 27. Overshoot vs. Load Capacitance
0.6
–0.6
–5
TIME (Seconds)
V p-p (µV)
05791-025
5
0.4
0.2
0
–0.2
–0.4
–4–3–2–101234
V
S
= ±5V, ±15V
Figure 28. 0.1 Hz to 10 Hz Input Voltage Noise
50
–30
100 1k 100M
FREQUENCY (Hz)
CLOSED-LOOP GAIN (dB)
05791-011
–10
0
30
10k 100k 1M 10M
40
10
20
–20
A
V
= +100
A
V
= +10
A
V
= +1
V
S
= ±5V, ±15V
Figure 29. Closed-Loop Gain vs. Frequency
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 10 of 16
APPLICATIONS
OUTPUT PHASE REVERSAL AND INPUT NOISE
Phase reversal is a change of polarity in the transfer function of
the amplifier. This can occur when the voltage applied at the
input of the amplifier exceeds the maximum common-mode
voltage. Phase reversal happens when the part is configured in
the gain of 1.
Most JFET amplifiers invert the phase of the input signal if the
input exceeds the common-mode input. Phase reversal is a
temporary behavior of the ADA4000-x family. Each part
returns to normal operation by bringing back the common-
mode voltage. The cause of this effect is saturation of the input
stage, which leads to the forward-biasing of a drain-gate diode.
In noninverting applications, a simple fix for this is to insert a
series resistor between the input signal and the noninverting
terminal of the amplifier. The value of the resistor depends on
the application, because adding a resistor adds to the total input
noise of the amplifier. The total noise density of the circuit is
()
SS
nn
nTOTAL kTRRiee 4
2
2++=
where:
en is the input voltage noise density of the part.
in is the input current noise density of the part.
RS is the source resistance at the noninverting terminal.
k is Boltzmann’s constant (1.38 × 10−23 J/K).
T is the ambient temperature in Kelvin (T = 273 + °C).
In general, it is good practice to limit the input current to less
than 5 mA to avoid driving a great deal of current into the
amplifier inputs.
CAPACITIVE LOAD DRIVE
The ADA4000-1/ADA4000-2/ADA4000-4 are stable at all gains
in both inverting and noninverting configurations. The parts
are capable of driving up to 1000 pF of capacitive loads without
oscillations in unity gain configurations.
However, as with most amplifiers, driving larger capacitive loads
in a unity gain configuration can cause excessive overshoot and
ringing. A simple solution to this problem is to use a snubber
network (see Figure 30).
ADA4000-1
V+
V–
+15
V
–15V
R
S
C
S
C
L
500pF
R
L
10kΩ
0
SNUBBER NETWORK
400mV p-p
05791-031
0
V1
3
2
1
U1
Figure 30. Snubber Network Configuration
The advantage of this compensation method is that the swing at
the output is not reduced because RS is out of the feedback
network, and the gain accuracy does not change. Depending on
the capacitive loading of the circuit, the values of RS and CS
change, and the optimum value can be determined empirically.
In Figure 31, the oscilloscope image shows the output of the
ADA4000-x family in response to a 400 mV pulse. The circuit is
configured in the unity gain configuration with 500 pF in
parallel with 10 kΩ of load capacitive.
05791-032
TIME (1µs/DIV)
VOLTAGE (200mV/DIV)
INPUT SIGNAL
OUTPUT SIGNAL
Figure 31. Capacitive Load Drive Without Snubber Network
When the snubber circuit is used, the overshoot is reduced from
30% to 6% with the same load capacitance. Ringing is virtually
eliminated, as shown in Figure 32. In this circuit, RS is 41 Ω and
CS is 10 nF.
05791-033
TIME (1µs/DIV)
VOLTAGE (200mV/DIV)
INPUT SIGNAL
OUTPUT SIGNAL
Figure 32. Capacitive Load with Snubber Network
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 11 of 16
)
SETTLING TIME
Settling time is the amount of time it takes the amplifier output
to reach and remain within a percentage of its final value. This
is an important parameter in data acquisition systems. Because
most bipolar DAC converters have current output, an external
op amp is required to convert the current to voltage. Therefore,
the amplifier settling time plays a role in the total settling time
of the output signal. A good approximation for the total settling
time is
()(
22 AMPtDACtTotalt SSS +=
The ADA4000-1/ADA4000-2/ADA4000-4 settle to within 0.1%
of their final value in less than 1.2 μs. The settling time has been
tested by using the configuration circuit in Figure 34.
The input signal is a 10 V pulse and the output is the error
signal for the settling time shown in Figure 33.
05791-035
200ns/DIV
200mV/DIV
5V/DIV
Figure 33. Settling Time Measurement Using the False Summing Node Method
ADA4000-1
V+
V–
+15
V
–15V
10V p-
p
05791-034
3
2
1
10kΩ
10kΩ
10kΩ
AD828
V+
V–
+15V
–15V
20kΩ
V
OUT
1kΩ
8
4
10kΩ
V1
0
Figure 34. Settling Time Test Circuit
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 12 of 16
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-A A
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 35. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
100708-A
*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH
THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.
1.60 BSC 2.80 BSC
1.90
BSC
0.95 BSC
0.20
0.08
0.60
0.45
0.30
8°
4°
0°
0.50
0.30
0.10 MAX
*1.00 MAX
*0.90 MAX
0.70 MIN
2.90 BSC
54
123
SEATING
PLANE
Figure 36. 5-Lead Thin Small Outline Transistor Package [TSOT]
(UJ-5)
Dimensions shown in millimeters
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 13 of 16
COMPLIANT TO JEDEC STANDARDS MO-187-AA
0.80
0.60
0.40
8°
0°
4
8
1
5
PIN 1
0.65 BSC
SEATING
PLANE
0.38
0.22
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.08
3.20
3.00
2.80
5.15
4.90
4.65
0.15
0.00
0
.95
0
.85
0
.75
Figure 37. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
COMPLIANT TO JEDEC STANDARDS MO-153-AB-1
061908-A
8°
0°
4.50
4.40
4.30
14 8
7
1
6.40
BSC
PIN 1
5.10
5.00
4.90
0.65 BSC
0.15
0.05 0.30
0.19
1.20
MAX
1.05
1.00
0.80 0.20
0.09 0.75
0.60
0.45
COPLANARITY
0.10
SEATING
PLANE
Figure 38. 14-Lead Standard Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 14 of 16
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AB
060606-A
14 8
7
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
8.75 (0.3445)
8.55 (0.3366)
1.27 (0.0500)
BSC
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
COPLANARITY
0.10
8°
0°
45°
Figure 39. 14-Lead Standard Small Outline Package [SOIC_N]
(R-14)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option Branding
ADA4000-1ARZ1 −40°C to +125°C 8-Lead SOIC_N R-8
ADA4000-1ARZ-R71 −40°C to +125°C 8-Lead SOIC_N R-8
ADA4000-1ARZ-RL1 −40°C to +125°C 8-Lead SOIC_N R-8
ADA4000-1AUJZ-R21 −40°C to +125°C 5-Lead TSOT UJ-5 A14
ADA4000-1AUJZ-R71 −40°C to +125°C 5-Lead TSOT UJ-5 A14
ADA4000-1AUJZ-RL1 −40°C to +125°C 5-Lead TSOT UJ-5 A14
ADA4000-2ARZ1 −40°C to +125°C 8-Lead SOIC_N R-8
ADA4000-2ARZ-R71 −40°C to +125°C 8-Lead SOIC_N R-8
ADA4000-2ARZ-RL1 −40°C to +125°C 8-Lead SOIC_N R-8
ADA4000-2ARMZ1 −40°C to +125°C 8-Lead MSOP RM-8 A1H
ADA4000-2ARMZ-RL1 −40°C to +125°C 8-Lead MSOP RM-8 A1H
ADA4000-4ARZ1 −40°C to +125°C 14-Lead SOIC_N R-14
ADA4000-4ARZ-R71 −40°C to +125°C 14-Lead SOIC_N R-14
ADA4000-4ARZ-RL1 −40°C to +125°C 14-Lead SOIC_N R-14
ADA4000-4ARUZ1 −40°C to +125°C 14-Lead TSSOP RU-14
ADA4000-4ARUZ-RL1 −40°C to +125°C 14-Lead TSSOP RU-14
1 Z = RoHS Compliant Part.
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 15 of 16
NOTES
ADA4000-1/ADA4000-2/ADA4000-4
Rev. A | Page 16 of 16
NOTES
©2007—2009 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05791-0-3/09(A)
