© 2007 IXYS CORPORATION All rights reserved
600 Volt, 6 Ampere High & Low-side Driver
for N-Channel MOSFETs and IGBTs
IX6R11
Features
Floating High Side Driver with boot-strap Power
supply along with a Low Side Driver.
Fully operational to 600V
± 50V/ns dV/dt immunity
Gate drive power supply range: 10 - 35V
Undervoltage lockout for both output drivers
Separate Logic power supply range: 3.3V to VCL
• Built using the advantages and compatibility
of CMOS and IXYS HDMOSTM processes
Latch-Up protected over entire
operating range
High peak output current: 6A
Low output impedance
Low power supply current
• Immune to negative voltage transients
General Description
The IX6R11 Bridge Driver for N-channel MOSFETs and
IGBTs with a high side and low side output, whose input
signals reference the low side. The High Side driver can
control a MOSFET or IGBT connected to a positive bus
voltage up to 600V. The logic input stages are
compatible with TTL or CMOS, have built-in hysteresis
and are fully immune to latch up over the entire
operating range. The IX6R11 can withstand dV/dt on the
output side up to ± 50V/ns.
Applications
Driving MOSFETs and IGBTs in half-bridge circuits
High voltage, high side and low side drivers
Motor Controls
Switch Mode Power Supplies (SMPS)
DC to DC Converters
Class D Switching Amplifiers
Ordering Information
The IX6R11 is available in the 14-Pin DIP, the 16-Pin
SOIC, and the heat-sinkable 18-Pin SOIC CooltabTM
packages.
DS99037G(10/07)
Figure 1. Typical Circuit Connection
IX6R11S6
IX6R11S3
Part Number Package Type
IX6R11P7 14-Pin DIP
IX6R11S3 16-Pin SOIC
IX6R11S6 18-Pin SOIC
Warning: The IX6R11 is ESD Sensitive
Precaution: when performing the High-Voltage tests,
adequate safety precautions should be taken!
Up to 600V
*Operational voltage rating of 600V determined in a typical half-bridge circuit configuration (refer to Figure 10 and Figure 11).
Operational voltage in other circuit configurations may vary.
IX6R11
IXYS reserves the right to change limits, test conditions, and dimensions.
Figure 2 - IX6R11 Functional Block Diagram
IX6R11P7
14-PIN DIP
1
2
3
4
5
6
78
9
10
11
12
13
14
LGO
LS
VCL
N/C
HS
VCH
HGO
NC
DG
LIN
ENB
HIN
VDD
N/C
IX6R11S3
16-PIN SOIC 18-PIN SOIC w/CooltabTM
IX6R11S6
SYMBOL FUNCTION DESCRIPTION
VDD Logic Supply Positive power supply for chip CMOS functions
HIN HS Input High side input signal, TTL or CMOS compatible; HGO in phase
LIN LS Input Low side input signal, TTL or CMOS compatible; LGO in phase
ENB Enable Chip enable, active low. When driven high, both outputs go low
DG Ground Logic reference ground
VCH Supply Voltage High side power supply, referenced to HS
HGO Output High side driver output
HS Return High side voltage return pin
VCL Supply Voltage Low side power supply, referenced to LS
LGO Output Low side driver output
LS Ground Low side voltage return pin
Pin Description and Configuration
HIN Low to High
VDD
DG
HIN
HIN
OUT
IN
RST
VDD
HIN
LIN
ENB
DG 1
DG
VCH
UVCC
Isolated High Side
HS
Gate Current
Output
VCL
HS
HGO
VCH
VCL
Low to High
Side Delay
Equalizer
and
Shutdown
Shutdown
Logic
LS
UVCC
Detect
LS
LGO
Gate Current
Output
Detect
Cooltab is a trademark of IXYS Corporation
© 2007 IXYS CORPORATION All rights reserved
IX6R11
Symbol Definition Min Max Units
VCH High side floating supply voltage -0.3 +35 V
VHS High side floating supply offset Voltage -200 +600 V
VHGO High side floating output voltage VHS-0.3 VCH+0.3 V
VCL Low side fixed supply voltage -0.3 35 V
VLGO Low side output voltage -0.3 VCL+0.3 V
VDD Logic supply voltage -0.3 VCL+0.3 V
VDG Logic supply offset voltage VLS-3.8 VLS+3.8 V
VIN Logic input voltage(HIN & LIN) VLS-0.3 VCL+0.3 V
dVS/dt Allowable offset supply voltage transient 50 V/ns
PDPackage power dissipation@ TA 25C 1.25 W
PDPackage power dissipation@ TC 25C 2.5 W
RTHJA Thermal resistance, junction-to-ambient 100 K/W
Absolute Maximum Ratings
Symbol Definition Min Max Units
VCH High side floating supply absolute voltage VHS+10 VHS+20 V
VHS High side floating supply offset voltage -20 +600 V
VHGO High side floating output voltage VHS VCH+20 V
VCL Low side fixed supply voltage 10 20 V
VLGO Low side output voltage 0 VCC V
VDD Logic supply voltage VDG+3 VDG+VCL V
VDG Logic supply offset voltage VLS-0.5 VLS+0.5 V
VIN Logic input voltage(HIN, LIN, ENbar) VDG VDD V
TAAmbient Temperature -40 125 oC
Recommended Operating Conditions
IX6R11
IXYS reserves the right to change limits, test conditions, and dimensions.
Dynamic Electrical Characteristics*
Symbol Definition Test Conditions Min Typ Max Units
ton Turn-on propagation delay VHS= 0V 120 160 ns
toff Turn-off propagation delay VHS= 600V 94 125 ns
tenb Device not enable delay 110 140 ns
tr Turn-on rise time 25 35 ns
tf Turn-off fall time 17 25 ns
tdm Delay matching, HS & LS turn-on/off 25 50 ns
Static Electrical Characteristics
VINH Logic “1” input voltage, HIN, LIN, ENB VDD= VCL= 15V 9.5 V
VINL Logic “0” input voltage, HIN, LIN, ENB VDD= VCL= 15V 0 6 V
VHLGO // VHHGO High level output voltage, IO= 0A 0.1 V
VCH-VHGO or VCL-VLGO
VLLGO // VLHGO Low level output voltage, IO= 0A 0.1 V
VHGO or VLGO
IHL HS to LS bias current. VHS= VCH= 600V 170 µA
IQHS Quiescent VCH supply current VIN= 0V or VDD = 15V 1 3 mA
IQLS Quiescent VCL supply current VIN= 0V or VDD = 15V 1 3 mA
IQDD Quiescent VDD supply current VIN= 0V or VDD = 15V 15 30 µA
IIN+ Logic “1” input bias current VIN= VDD 20 40 µA
IIN- Logic “0” input voltage VIN= 0V 1 µA
VCHUV+V
CH supply undervoltage positive going threshold. 7.5 8.6 9.7 V
VCHUV-V
CH supply undervoltage negative going threshold. 7 8.2 9.4 V
VCLUV+V
CL supply undervoltage positive going threshold 7.4 8.5 9.6 V
VCLUV-V
CL supply undervoltage negative going threshold. 7 8.2 9.4 V
IGO+ HS or LS Output high short circuit current; VGO= 15V, VIN= 15V, PW<10us 4 6 A
IGO- HS or LS Output low short circuit current; VGO= 0V, VIN=0V, PW<10us -7 -5 A
* These characteristics are guaranteed by design only. Tested on a sample basis.
Symbol Definition Test Conditions Min Typ Max Units
VCL = VCH = VDD = +15V, Cload = 5nF, and VDG = VLS unless otherwise specified. The dynamic electrical characteristics are
measured using Figure 7.
© 2007 IXYS CORPORATION All rights reserved
IX6R11
Figure 6. Definitions of Delay Matching WaveformsFigure 5. Definitions of Switching Time Waveforms
Figure 7. Switching Time Test Circuit
13
(0 to 600V)
10
uF
10
uF
0.1
uF
CL
CL
0.1
uF 10
uF
HIN
ENB
LIN
HGO
LGO
VCH
VHS
VCL=15V
2
1
7
5
639
10
12
11
+
-
IX6R11
50% 50%
10%
90%
Input Signal
Outgoing Signal
H
IN
L
IN
HGOLGO
LGO HG
O
tdm
tdm
~
~~
~
~
~
200kHz 500kHz 1MHz
600V
400V
0
f
PWM
V++ Buss (V)
HS
Sample Tested for Operation
500V
Figure 3. INPUT/OUPUT Timing Diagram
HIN/LIN
ENB
LGO/HGO
Figure 4. ENABLE Waveform Definitions
Figure 8. Device operating range: Buss voltage vs. Frequency
Tested in typical circuit configuration (refer to Figure 10 & 11)
ENB
LGO/HGO
t
enb
50%
10%
HIN/LIN
HGO/LGO
tdon tr
50% 50%
90%
10%
90%
10%
tdoff tf
IX6R11
IXYS reserves the right to change limits, test conditions, and dimensions.
Figure 9. Test circuit for allowable offset supply voltage transient.
IX6R11S6
V
CH
HGO
HS
NC
NC
LS
V
CL
LGO
LS
HS
NC
NC
V
DD
HIN
ENB
LIN
DG
LS
1k
1k
1k
HIN
ENB
LIN
V
DD
10uF/35V
1uF/35V MLCC
10
11
12
14
15
16
17
18
13
VIN+
VOUT-
VOUT+
GND
VOUT-
VOUT+
NDY1215C
10uF/35V
1uF /3 5V M LC C
1k
V
CL
1uF/35V MLCC
10uF/35V
15
5.1 1N5817
1N5817
5.1
15
18uH
0.47uF 0.47uF
20/5W
20/5W
0.1uF/1kV
Up to 400V
V
CH
1
10
11
12
15
14
1
2
3
4
5
6
7
8
9
IXCP
10M90S
1
2
3
30
IXTH14N60P
IXTH14N60P
Figure 10. Test circuit for high frequency, 750kHz, operation.
VDD, VCH, VCL = 15V
IX6R11
HS
VDD
HIN
ENB
LIN
DG
LS
VCH
HGO
HS
LS
VCL
LGO
LS
U1
U2 15V
1
V1 18V
BATTERY GND1
2
3
Vin
GND
Vout
78L15
C2
+10uF C5
0.1uF
GND2
L1
200uH
C3
C6 10uF
0.1uF
GND1
+
DSEI 12-10A
D1 C1
100uF/250V
GND2
+
OUTPUT MONITOR
HV SCOPE PRO BE
HV
600V
BNC PULSE
GND2
U3
2
3HCPL-314J
½
VCC
16
OUT
15
14
VEE
GND3
15V
V3
U2
21,8 6,7
4,5
-600V
IXDD414
C8
0.1uF 10uF
C9
IXFP4N100Q
Q1
D2
DSEI12-10A
GND3
Measure dV/dt (HV Scope Probe)
dVs/dt > 50V/ns
HGO
HS
10K
© 2007 IXYS CORPORATION All rights reserved
IX6R11S6
V
CH
HGO
HS
NC
NC
LS
V
CL
LGO
LS
HS
NC
NC
V
DD
HIN
ENB
LIN
DG
LS
1k
1k
1k
HIN
ENB
LIN
V
DD
10uF/35V
1uF/35V M L C C
10
11
12
14
15
16
17
18
13
VIN+
VOUT-
VOUT+
GND
VOUT-
VOUT+
NDY1215C
10uF/35V
1uF /35V MLCC
1k
V
CL
1uF/35V M L C C
10uF/35V
1N5817
5.1
15
0.1uF/1kV
Up to 600V
V
CH
1
10
11
12
15
14
1
2
3
4
5
6
7
8
9
IXCP
10M90S
1
2
3
30
36
1N5817
5.1
15
36
IXTH14N60P
IXTH14N60P
Figure 11. Test circuit for low frequency, 75kHz, operation.
VDD, VCH, VCL = 15V
IX6R11
IX6R11
IXYS reserves the right to change limits, test conditions, and dimensions.
VDD Supply Voltage - Voltage
4 6 8 101214161820
Time - nanoseconds
75
100
125
150
175
200
225
VDD Supply Voltage- Volts
4 6 8 10 12 14 16 18 20
Time - nanaseconds
40
80
120
160
200
VCH Supply Voltage - Volts
10 15 20 25 30 35
Time - nanaseconds
60
70
80
90
100
110
120
130
140
150
VCL Supply Voltage - Volts
5 101520253035
Time - nanonseconds
100
110
120
130
140
150
160
170
180
190
Temperature - Degrees C
-50-250 255075100125
75
100
125
150
175
200
225
Temperature - Degrees C
-50 -25 0 25 50 75 100 125
Time - nanoseconds
50
75
100
125
150
175
Time - nanoseconds
Max. toff
Typ. toff
Typ. ton
Typ. ton
Max. toff Typ. toff
Max. ton
Typ. ton
Max. toff
Typ. toff
Max. ton
Typ. ton Max. toff
Typ. toff
Max. ton
Typ. ton
Max. toff Max. ton
Typ. toff
Max. ton
Max. toff
Typ. toff
Typ. ton
Max. ton
Fig. 12a. Low side turn-on and turn-off delay times
vs. temperature. Fig. 12b. High side turn-on and turn-off times
vs. temperature.
Fig. 13a. Low side turn-on and turn-off delay times vs. VCL.Fig. 13b. High side turn-on and turn-off delay times vs. VCH.
Fig. 14a. Low side turn-on and turn-off delay times
vs. VDD supply voltage. Fig. 14b. High side turn-on and turn-off delay times vs. VDD.
© 2007 IXYS CORPORATION All rights reserved
VCL/VCH Su pply Vo lt age - Volt s
10 15 20 25 30 35
Turn-off Fall Time - ns
10
15
20
25
VCL/VCH Su pply Vo lt age - Volt s
10 15 20 25 30 35
Turn-on Rise Time - ns
10
15
20
25
Tem perature - Degrees C
-50 -25 0 25 50 75 100 125
Turn-o n & Turn - o ff R i se Time - n s
10
15
20
25
30
VDD S upp ly Voltage - Volt s
4 6 8 10 12 14 16 18 20
Enable Delay Time - ns
0
75
150
225
300
VCL/VCH Supply Voltage - Volts
10 12 14 16 18 20 22 24 26 28 30
Enable Delay Time - ns
50
100
150
200
250
Tem perature - Degrees C
-50 -25 0 25 50 75 100 125
Enable Delay Time - ns
50
75
100
125
150
175
200
M a x . tu rn-o ff
Typ. turn -off
Typ. turn -on
M a x . tu rn-o n
Typ. Low side
Max. Low side
M ax. High Side
Typ. High Side
Typ. Low side
M ax. Low side
M ax. High Side
Typ. High Side
Typ. Low side
M ax. Low side
M ax. High Side
Typ . High S ide
Typ. Low side
Max. Low side
Max. High Side
Typ. High Side
Typ. Low side
M ax. Low side
M ax. High Side
Typ. High Side
Fig. 15a. High and Low side ENABLE (Shutdown) times
vs. temperature. Fig.15b. High and Low side ENABLE (Shutdown) times
vs. supply voltage.
Fig. 15c. High and Low side ENABLE (Shutdown) times
vs. supply voltage. Fig. 16a. Turn-on and turn-off rise times vs. temperature.
Fig. 16b. Turn-on rise times vs. bias supply voltages. Fig. 16c. Turn-off delay times vs. bias supply voltages.
IX6R11
IX6R11
IXYS reserves the right to change limits, test conditions, and dimensions.
Fig. 17. Logic input threshold voltage vs bias supply voltage. Fig. 18. Offset supply leakage current vs. temperature.
Fig. 19. Logic input current vs. bias voltage.
Fig. 21a. Output source current vs. temperature Fig. 21b. Output source current vs supply voltatge
Fig. 20. IX6R11S3 Case temperature rise vs. operating
frequency
V
BIAS
Supply Voltag e (V)
10 15 20 25 30 35
OutputSourceCurrent(A)
0
2
4
6
8
10
12
14
16
18
Temperature - Degrees C
-50 -25 0 25 50 75 100 125
OutputSourceCurrent(A)
2
3
4
5
6
7
8
9
10
Frequency - kHz
1002003004005006007008009001000
CaseTemperature-
o
C
25
30
35
40
45
50
V
DD
Lo gi c S upply Voltage (V)
02468101214161820
LogicInputBiasCurrent-A
0
10
20
30
40
50
60
Temper at u r e - Degrees C
-50 -25 0 25 50 75 100 125
OffsetSupplyLeakageCurrent-
150
175
200
225
250
275
300
V
DD
Logic Supply Voltage - Volt s
048121620
LogicInputThreshold-Volts
0
2
4
6
8
10
12
Maximum
Typical
Maximum
Typical
Maximum
Typical
Maximum
Typical
V = 500V
V
= 320V
V
= 140V
Load: IXTU01N100
V = 15V
CH
HIN & LIN Max Logic 1
ENB Max Logic ‘1’
ENB Min Logic ‘0’
HIN & LIN Min Logic 0
µ
A
µ
© 2007 IXYS CORPORATION All rights reserved
IX6R11
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Minimum
Typical
Temperature - oC
-50 -25 0 25 50 75 100 125
Output Current - Amperes
2
3
4
5
6
7
8
9
10
11
12
Bia s Volt a ge - V olts
10 15 20 25 30 35
Output Current - Amperes
0
2
4
6
8
10
12
14
16
18
20
Te mperature - oC
-50-250 255075100125
Undervoltage Locko ut (+) - Volts
5
6
7
8
9
10
11
12
13
14
15
Te mperature - oC
-50 -25 0 25 50 75 100 125
Under v ol ta ge Lo ck o ut (-) - Vo l ts
4
5
6
7
8
9
10
11
12
13
14
15
16
Temperature - oC
-50-250 255075100125
Undervoltage Lockout (+) - Volts
5
6
7
8
9
10
11
12
13
14
15
Temperature - oC
-50-250 255075100125
Undervoltage Lock o u t (-) - Volts
5
6
7
8
9
10
11
12
13
14
15
Typical
Minimum
Fig. 22a. Output sink current vs. temperature Fig. 22b. Output sink current vs. bias voltage
Fig. 23a. VCH Undervoltage positive trip vs. temperature. Fig. 23b. VCH Undervoltage negative trip vs. temperature.
Fig. 24a. VCL Undervoltage positive trip vs. temperature. Fig. 24b. VCL Undervoltage negative trip vs. temperature.
-
-
--
-
-
-
-
-
-
-
-
-
-
-
-
- -
-
-
-
IX6R11
IXYS reserves the right to change limits, test conditions, and dimensions.
Freque ncy - kHz
100 200 300 400 500 600 700 800 900 1000
Case Temperature -
o
C
25
30
35
40
45
50
55
60
65
70
75
Tempe r atur e -
o
C
-50 -25 0 25 50 75 100 125
V
CL
Current -
µ
A
600
650
700
750
800
850
900
950
1000
Tempe r atur e -
o
C
-50 -25 0 25 50 75 100 125
V
CH
Current -
µ
A
600
700
800
900
1000
1100
Maximum
Typical
Maximum
Typical
E
B
CD
A
F
Frequenc
y
- kHz
100 200 300 400 500 600 700 800 900 1000
Case Temperature -
o
C
25
30
35
40
45
50
55
60
65
70
75
V
CH
Voltage - Volts
10 15 20 25 30 35
V
CH
Current -
µ
A
600
700
800
900
1000
1100
Maximum
Typical
E
BC
D
A
F
Fig. 25a. Quiescent current vs. temperature for the
high side power supply. Fig. 25b. Quiescent current vs. voltage for the high side
power supply.
Fig. 26. Quiescent current vs. temperature for the low
side power supply
Fig. 27b. Case temperature rise vs. switching frequency
for IX6R11S6
Fig. 27a. Case temperature rise vs. switching frequency
for IX6R11S3
Load Conditions:
A: IXFK21N100F @ VCH= 400V
B: IXFK21N100F @ VCH= 200V
C: IXFH14N100Q @ VCH=400V
D: IXFH14N100Q @ VCH=200V
E: IXTU01N100 @ VCH= 400V
F: IXTU01N100 @ VCH= 200V
Load Conditions:
A: IXFK21N100F @ VCH= 400V
B: IXFK21N100F @ VCH= 200V
C: IXFH14N100Q @ VCH=400V
D: IXFH14N100Q @ VCH=200V
E: IXTU01N100 @ VCH= 400V
F: IXTU01N100 @ VCH= 200V
© 2007 IXYS CORPORATION All rights reserved
E1
E
eA
L
eB
e
D
D1
c
b2
b
A2
HE
e
DA
BA1
Lc
L
h
H
e
B
E
C
D
h x 45%%d
M
N
N
M
h
e
H
E
D
Be A1
A
Lc
h x 45°
D1
E1
IX6R11