BLF8G09LS-400PW; BLF8G09LS-400PGW Power LDMOS transistor Rev. 4 -- 28 July 2015 Product data sheet 1. Product profile 1.1 General description 400 W LDMOS power transistor for base station applications at frequencies from 716 MHz to 960 MHz. Table 1. Typical performance Typical RF performance at Tcase = 25 C in a common source class-AB production test circuit, tested on straight lead device. Test signal 2-carrier W-CDMA [1] f IDq VDS PL(AV) Gp D ACPR5M (MHz) (mA) (V) (W) (dB) (%) (dBc) 716 to 728 3400 28 95 20.6 30 35 [1] 3GPP test model 1; 64 DPCH; PAR = 8.4 dB at 0.01 % probability on CCDF; 10 MHz carrier spacing. 1.2 Features and benefits Excellent ruggedness Device can operate with the supply current delivered through the video leads High efficiency Low thermal resistance providing excellent thermal stability Designed for broadband operation Lower output capacitance for improved performance in Doherty applications Decoupling leads to enable improved video bandwidth (45 MHz typical) Designed for low memory effects providing excellent pre-distortability Internally matched for ease of use Integrated ESD protection Design optimized for gull-wing Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances (RoHS) 1.3 Applications RF power amplifiers for base stations and multi carrier applications in the 716 MHz to 960 MHz frequency range BLF8G09LS-400P(G)W NXP Semiconductors Power LDMOS transistor 2. Pinning information Table 2. Pinning Pin Description Simplified outline Graphic symbol BLF8G09LS-400PW (SOT1242B) 1 drain1 2 drain2 3 gate1 4 gate2 5 source [1] 6 decoupling1 [2] 7 decoupling2 [2] 8 n.c. 9 n.c. DDD BLF8G09LS-400PGW (SOT1242C) 1 drain1 2 drain2 3 gate1 4 gate2 5 source [1] 6 decoupling1 [2] 7 decoupling2 [2] 8 n.c. 9 n.c. DDD [1] Connected to flange. [2] Device can operate with the supply current delivered through the combined decoupling leads. 3. Ordering information Table 3. Ordering information Type number BLF8G09LS-400PW_8G09LS-400PGW Product data sheet Package Name Description Version BLF8G09LS-400PW - earless flanged ceramic package; 8 leads SOT1242B BLF8G09LS-400PGW - earless flanged ceramic package; 8 leads SOT1242C All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 July 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 2 of 17 BLF8G09LS-400P(G)W NXP Semiconductors Power LDMOS transistor 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS Min Max Unit drain-source voltage - 65 V VGS gate-source voltage 0.5 +13 V Tstg storage temperature 65 +150 C - 225 C [1] junction temperature Tj [1] Conditions Continuous use at maximum temperature will affect the reliability, for details refer to the on-line MTF calculator. 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Typ Unit Rth(j-c) thermal resistance from junction to case Tcase = 80 C; PL = 95 W 0.26 K/W 6. Characteristics Table 6. DC characteristics Tj = 25 C; per section unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit V(BR)DSS drain-source breakdown voltage VGS = 0 V; ID = 3 mA 65 - - V VDS = 10 V; ID = 300 mA 1.5 1.8 2.3 V VGS(th) gate-source threshold voltage VGSq gate-source quiescent voltage VDS = 28 V; ID = 1700 mA 1.7 2 2.5 V IDSS drain leakage current VGS = 0 V; VDS = 28 V - - 2.8 A IDSX drain cut-off current VGS = VGS(th) + 3.75 V; VDS = 10 V 55 - A IGSS gate leakage current VGS = 11 V; VDS = 0 V - - 280 nA gfs forward transconductance VDS = 10 V; ID = 15 A - 26 - S RDS(on) drain-source on-state resistance VGS = VGS(th) + 3.75 V; ID = 12.25 A - 0.06 - Table 7. RF characteristics Test signal: 2-carrier W-CDMA; PAR = 8.4 dB at 0.01 % probability on the CCDF; 3GPP test model 1; 1-64 DPCH; f1 = 718.5 MHz; f2 = 723.5 MHz; f3 = 720.5 MHz; f4 = 725.5 MHz; RF performance at VDS = 28 V; IDq = 3400 mA; Tcase = 25 C; unless otherwise specified; in a class-AB production test circuit, tested on straight lead device. Symbol Parameter Conditions Min Typ Max Unit Gp power gain PL(AV) = 95 W 18.8 20.6 - dB RLin input return loss PL(AV) = 95 W - 19 11 dB D drain efficiency PL(AV) = 95 W 26 30 - % PL(AV) = 95 W - 35 32 dBc ACPR5M adjacent channel power ratio (5 MHz) BLF8G09LS-400PW_8G09LS-400PGW Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 July 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 3 of 17 BLF8G09LS-400P(G)W NXP Semiconductors Power LDMOS transistor 7. Test information 7.1 Ruggedness in class-AB operation The BLF8G09LS-400PW and BLF8G09LS-400PGW are capable of withstanding a load mismatch corresponding to VSWR = 7 : 1 through all phases under the following conditions: VDS = 28 V; IDq = 3400 mA; 2-carrier W-CDMA signal; PL = 200 W; f = 716 MHz; 5 MHz carrier spacing; 46 % clipping. 7.2 Impedance information Table 8. Typical impedance Measured load-pull data for the top-half of the push-pull package; IDq = 1800 mA; VDS = 28 V; Tcase = 25 C, water cooled. f ZS[1] ZL[1] (MHz) () () BLF8G09LS-400PW (straight lead) 720 1.26 j2.89 1.8 j1.94 757 1.44 j3.82 2 j1.6 769 1.55 j3.64 1.9 j1.75 805 1.7 j4.5 1.5 j1.3 BLF8G09LS-400PGW (gull-wing) 720 1.37 j3 1.7 j2.1 757 1.4 j3.6 1.6 j2.3 769 1.3 j3.9 1.7 j2.2 805 1.6 j4.3 1.48 j1.97 [1] ZS and ZL defined in Figure 1. GUDLQ =/ JDWH =6 DDI Fig 1. Definition of transistor impedance 7.3 VBW in class-AB operation The BLF8G09LS-400PW and BLF8G09LS-400PGW show 45 MHz (typical) video bandwidth in class-AB test circuit in 722 MHz band at VDS = 28 V and IDq = 3400 mA. BLF8G09LS-400PW_8G09LS-400PGW Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 July 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 4 of 17 BLF8G09LS-400P(G)W NXP Semiconductors Power LDMOS transistor 7.4 Test circuit PP PP & & & 5 & & & & & 5 & & PP & & 5 & & & & & & 5 & 5 & & & & & & & DDD Printed-Circuit Board (PCB): Rogers RO4350B; r = 3.66; thickness = 0.508 mm; thickness copper plating = 35 m. See Table 9 for a list of components. Fig 2. Component layout Table 9. List of components For test circuit see Figure 2. BLF8G09LS-400PW_8G09LS-400PGW Product data sheet Component Description Value Remarks C1, C2, C3, C8, C9 multilayer ceramic chip capacitor 100 pF ATC 100A C4, C5 multilayer ceramic chip capacitor 9.1 pF ATC 100A C6, C7 multilayer ceramic chip capacitor 10 pF ATC 100A C10, C11, C13, C17 multilayer ceramic chip capacitor 1 F, 50 V Murata C12, C16 multilayer ceramic chip capacitor 100 nF, 50 V Murata C14, C15, C18, C19 multilayer ceramic chip capacitor 10 F, 50 V Murata C20, C21 multilayer ceramic chip capacitor 5.1 pF ATC 100A C22 multilayer ceramic chip capacitor 82 pF ATC 100B C23, C24 electrolytic capacitor 470 F, 63 V C25, C26 multilayer ceramic chip capacitor 3 pF R1 resistor 10 R2, R3, R4, R5 resistor 5.1 All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 July 2015 ATC 100A (c) NXP Semiconductors N.V. 2015. All rights reserved. 5 of 17 BLF8G09LS-400P(G)W NXP Semiconductors Power LDMOS transistor 7.5 Graphical data 7.5.1 Pulsed CW DDD DDD *S G% ' 3/ G%P VDS = 28 V; IDq = 3400 mA; tp = 100 s; = 10 %. (1) f = 716 MHz (2) f = 722 MHz (2) f = 722 MHz (3) f = 728 MHz (3) f = 728 MHz Power gain as a function of output power; typical values BLF8G09LS-400PW_8G09LS-400PGW Product data sheet 3/ G%P VDS = 28 V; IDq = 3400 mA; tp = 100 s; = 10 %. (1) f = 716 MHz Fig 3. Fig 4. Drain efficiency as a function of output power; typical values All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 July 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 6 of 17 BLF8G09LS-400P(G)W NXP Semiconductors Power LDMOS transistor 7.5.2 IS-95 DDD DDD *S G% ' 3/ G%P VDS = 28 V; IDq = 3400 mA. 3/ G%P VDS = 28 V; IDq = 3400 mA. (1) f = 716 MHz (1) f = 716 MHz (2) f = 722 MHz (2) f = 722 MHz (3) f = 728 MHz (3) f = 728 MHz Fig 5. Power gain as a function of output power; typical values DDD $&35N G%F Fig 6. Drain efficiency as a function of output power; typical values DDD $&35N $&35 G%F 3/ G%P VDS = 28 V; IDq = 3400 mA. (1) f = 716 MHz (2) f = 722 MHz (2) f = 722 MHz (3) f = 728 MHz (3) f = 728 MHz Adjacent channel power ratio (885 kHz) as a function of output power; typical values BLF8G09LS-400PW_8G09LS-400PGW Product data sheet 3/ G%P VDS = 28 V; IDq = 3400 mA. (1) f = 716 MHz Fig 7. Fig 8. Adjacent channel power ratio (1980 kHz) as a function of output power; typical values All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 July 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 7 of 17 BLF8G09LS-400P(G)W NXP Semiconductors Power LDMOS transistor DDD DDD 3/ 0 G%P 3$5 G% 3/ G%P VDS = 28 V; IDq = 3400 mA. 3/ G%P VDS = 28 V; IDq = 3400 mA. (1) f = 716 MHz (1) f = 716 MHz (2) f = 722 MHz (2) f = 722 MHz (3) f = 728 MHz (3) f = 728 MHz Fig 9. Peak-to-average ratio as a function of output power; typical values Fig 10. Peak output power as a function of output; typical values 7.5.3 1-Carrier W-CDMA DDD DDD *S G% ' 3/ G%P VDS = 28 V; IDq = 3400 mA. (1) f = 716 MHz (2) f = 722 MHz (2) f = 722 MHz (3) f = 728 MHz (3) f = 728 MHz Fig 11. Power gain as a function of output power; typical values Product data sheet 3/ G%P VDS = 28 V; IDq = 3400 mA. (1) f = 716 MHz BLF8G09LS-400PW_8G09LS-400PGW Fig 12. Drain efficiency as a function of output power; typical values All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 July 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 8 of 17 BLF8G09LS-400P(G)W NXP Semiconductors Power LDMOS transistor DDD DDD 5/LQ G% 3$5 G% 3/ G%P VDS = 28 V; IDq = 3400 mA. 3/ G%P VDS = 28 V; IDq = 3400 mA. (1) f = 716 MHz (1) f = 716 MHz (2) f = 722 MHz (2) f = 722 MHz (3) f = 728 MHz (3) f = 728 MHz Fig 13. Peak-to-average ratio as a function of output power; typical values Fig 14. Input return loss as a function of output power; typical values 7.5.4 2-Carrier W-CDMA DDD DDD *S G% ' 3/ G%P VDS = 28 V; IDq = 3400 mA. (1) f = 716 MHz (2) f = 722 MHz (2) f = 722 MHz (3) f = 728 MHz (3) f = 728 MHz Fig 15. Power gain as a function of output power; typical values Product data sheet 3/ G%P VDS = 28 V; IDq = 3400 mA. (1) f = 716 MHz BLF8G09LS-400PW_8G09LS-400PGW Fig 16. Drain efficiency as a function of output power; typical values All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 July 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 9 of 17 BLF8G09LS-400P(G)W NXP Semiconductors Power LDMOS transistor DDD 5/LQ G% 3/ G%P VDS = 28 V; IDq = 3400 mA. (1) f = 716 MHz (2) f = 722 MHz (3) f = 728 MHz Fig 17. Input return loss as a function of output power; typical values DDD $&350 G%F DDD $&350 G%F 3/ G%P VDS = 28 V; IDq = 3400 mA. (1) f = 716 MHz (2) f = 722 MHz (2) f = 722 MHz (3) f = 728 MHz (3) f = 728 MHz Fig 18. Adjacent channel power ratio (5 MHz) as a function of output power; typical values Product data sheet 3/ G%P VDS = 28 V; IDq = 3400 mA. (1) f = 716 MHz BLF8G09LS-400PW_8G09LS-400PGW Fig 19. Adjacent channel power ratio (10 MHz) as a function of output power; typical values All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 July 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 10 of 17 BLF8G09LS-400P(G)W NXP Semiconductors Power LDMOS transistor 7.5.5 2-Tone VBW DDD ,0' G%F ,0' ,0' ,0' FDUULHUVSDFLQJ 0+] VDS = 28 V; IDq = 3400 mA. (1) IMD low (2) IMD high Fig 20. VBW capability in class-AB test circuit BLF8G09LS-400PW_8G09LS-400PGW Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 July 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 11 of 17 BLF8G09LS-400P(G)W NXP Semiconductors Power LDMOS transistor 8. Package outline (DUOHVVIODQJHGFHUDPLFSDFNDJHOHDGV 627% ' $ ) ' Y $ 8 F % \ + 8 ( ( $ E E Z 4 % H H PP VFDOH 'LPHQVLRQV 8QLW PP PD[ QRP PLQ $ E E F ' H ' H ( ( ) + 4 8 8 Y Z \ PD[ LQFKHV QRP PLQ 1RWH 0LOOLPHWHUGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOLQFKGLPHQVLRQV 'LPHQVLRQLVPHDVXUHGLQFK PP IURPWKHERG\ 2XWOLQH YHUVLRQ 5HIHUHQFHV ,(& -('(& -(,7$ VRWEBSR (XURSHDQ SURMHFWLRQ ,VVXHGDWH 627% Fig 21. Package outline SOT1242B BLF8G09LS-400PW_8G09LS-400PGW Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 July 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 12 of 17 BLF8G09LS-400P(G)W NXP Semiconductors Power LDMOS transistor (DUOHVVIODQJHGFHUDPLFSDFNDJHOHDGV 627& PPJDXJHSODQH ' /S ) $ ' \ 4 GHWDLO; Y $ 8 + % F ; ( 8 $ E E ( Z % H H PP VFDOH 'LPHQVLRQV 8QLW PP PD[ QRP PLQ $ E E F ' ' H H ( ( ) + /S 4 8 8 Y Z \ PD[ LQFKHV QRP PLQ 1RWH 0LOOLPHWHUGLPHQVLRQVDUHGHULYHGIURPWKHRULJLQDOLQFKGLPHQVLRQV 2XWOLQH YHUVLRQ 5HIHUHQFHV ,(& -('(& -(,7$ VRWFBSR (XURSHDQ SURMHFWLRQ ,VVXHGDWH 627& Fig 22. Package outline SOT1242C BLF8G09LS-400PW_8G09LS-400PGW Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 July 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 13 of 17 BLF8G09LS-400P(G)W NXP Semiconductors Power LDMOS transistor 9. Handling information CAUTION This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling electrostatic sensitive devices. Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or equivalent standards. 10. Abbreviations Table 10. Abbreviations Acronym Description 3GPP 3rd Generation Partnership Project CCDF Complementary Cumulative Distribution Function CW Continuous Wave DPCH Dedicated Physical CHannel ESD ElectroStatic Discharge IS-95 Interim Standard 95 LDMOS Laterally Diffused Metal Oxide Semiconductor MTF Median Time to Failure PAR Peak-to-Average Ratio VBW Video Bandwidth VSWR Voltage Standing Wave Ratio W-CDMA Wideband Code Division Multiple Access 11. Revision history Table 11. Revision history Document ID Release date BLF8G09LS-400PW_ 20150728 8G09LS-400PGW v.4 Modifications: * Data sheet status Change notice Supersedes Product data sheet - BLF8G09LS-400PW_ 8G09LS-400PGW v.3 Figure 21 on page 12: This figure has been updated BLF8G09LS-400PW_ 20140324 8G09LS-400PGW v.3 Product data sheet - BLF8G09LS-400PW_ 8G09LS-400PGW v.2 BLF8G09LS-400PW_ 20131220 8G09LS-400PGW v.2 Preliminary data sheet - BLF8G09LS-400PW_ 8G09LS-400PGW v.1 BLF8G09LS-400PW_ 20130927 8G09LS-400PGW v.1 Objective data sheet - - BLF8G09LS-400PW_8G09LS-400PGW Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 July 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 14 of 17 BLF8G09LS-400P(G)W NXP Semiconductors Power LDMOS transistor 12. Legal information 12.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term `short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft -- The document is a draft version only. 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This document supersedes and replaces all information supplied prior to the publication hereof. BLF8G09LS-400PW_8G09LS-400PGW Product data sheet Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. 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Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 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The English version shall prevail in case of any discrepancy between the translated and English versions. 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com BLF8G09LS-400PW_8G09LS-400PGW Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 -- 28 July 2015 (c) NXP Semiconductors N.V. 2015. All rights reserved. 16 of 17 NXP Semiconductors BLF8G09LS-400P(G)W Power LDMOS transistor 14. Contents 1 1.1 1.2 1.3 2 3 4 5 6 7 7.1 7.2 7.3 7.4 7.5 7.5.1 7.5.2 7.5.3 7.5.4 7.5.5 8 9 10 11 12 12.1 12.2 12.3 12.4 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . 3 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 4 Ruggedness in class-AB operation . . . . . . . . . 4 Impedance information . . . . . . . . . . . . . . . . . . . 4 VBW in class-AB operation . . . . . . . . . . . . . . . 4 Test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Graphical data . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pulsed CW . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 IS-95 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1-Carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . . 8 2-Carrier W-CDMA . . . . . . . . . . . . . . . . . . . . . . 9 2-Tone VBW . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 12 Handling information. . . . . . . . . . . . . . . . . . . . 14 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information. . . . . . . . . . . . . . . . . . . . . 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'. (c) NXP Semiconductors N.V. 2015. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 28 July 2015 Document identifier: BLF8G09LS-400PW_8G09LS-400PGW