VNQ810PEP-E Quad channel high side driver Features Type RDS(on) IOUT VCC VNQ830PEP-E 160 m(1) 5 A(1) 36 V 1. Per each channel. PowerSSO-24 CMOS compatible inputs Open Drain status outputs On-state open load detection Off-state open load detection Shorted load protection Undervoltage and overvoltage shutdown Loss of ground protection Very low standby current Reverse battery protection(a) In compliance with the 2002/95/EC european directive Description The VND810PEP-E is a monolithic device made using| STMicroelectronics VIPower M0-3 Technology. The VNQ810PEP-E is intended for driving any type of multiple load with one side connected to ground. The Active VCC pin voltage clamp protects the device against low energy spikes (see ISO7637 transient compatibility table). Active current limitation combined with thermal shutdown and automatic restart protects the device against overload. The device detects the open load condition in both the on and off-state. In the off-state the device detects if the output is shorted to VCC. The device automatically turns off in the case where the ground pin becomes disconnected. a. See Application schematic on page 17 Table 1. Device summary Package PowerSSO-24 July 2009 Order codes Tube Tape and reel VNQ810PEP-E VNQ810PEPTR-E Doc ID 10872 Rev 7 1/28 www.st.com 1 Contents VNQ810PEP-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.1 4 6 2/28 3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 17 3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 18 3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.4 Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . . 20 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.1 5 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.1 ECOPACK(R) packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.2 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Doc ID 10872 Rev 7 VNQ810PEP-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 13V; Tj = 25C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electrical transient requirements (part 1/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electrical transient requirements (part 2/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electrical transient requirements (part 3/3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Doc ID 10872 Rev 7 3/28 List of figures VNQ810PEP-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. 4/28 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Openload on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Openload off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Openload detection in Off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 21 PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 22 Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 22 PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 PowerSSO-24 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Doc ID 10872 Rev 7 VNQ810PEP-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram VCC VCC CLAMP OUTPUT1 OVERVOLTAGE VCC INPUT2 CONTROL & PROTECTION STATUS2 EQUIVALENT TO CHANNEL1 UNDERVOLTAGE CLAMP 1 GND INPUT1 OUTPUT2 DRIVER 1 LOGIC VCC STATUS1 INPUT3 CONTROL & PROTECTION STATUS3 EQUIVALENT TO CHANNEL1 CURRENT LIMITER 1 OVERTEMP. 1 INPUT2 OUTPUT3 OPENLOAD ON 1 STATUS2 VCC INPUT3 INPUT4 CONTROL & PROTECTION STATUS4 EQUIVALENT TO CHANNEL1 OPENLOAD OFF 1 STATUS3 INPUT4 OUTPUT4 STATUS4 Figure 2. Configuration diagram (top view) OUTPUT1 OUTPUT1 OUTPUT1 OUTPUT2 OUTPUT2 OUTPUT2 OUTPUT3 OUTPUT3 OUTPUT3 OUTPUT4 OUTPUT4 OUTPUT4 VCC GND INPUT1 STATUS1 INPUT2 STATUS2 INPUT3 STATUS3 INPUT4 STATUS4 N.C. VCC TAB = VCC Table 2. Suggested connections for unused and not connected pins Connection / pin Status N.C. Output Input Floating X X X X To ground X Doc ID 10872 Rev 7 Through 10K resistor 5/28 Electrical specifications VNQ810PEP-E 2 Electrical specifications 2.1 Absolute maximum ratings Stressing the device above the rating listed in the "Absolute maximum ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality document. Table 3. Absolute maximum ratings Symbol VCC DC supply voltage Value Unit 41 V - VCC Reverse DC supply voltage - 0.3 V - IGND DC reverse ground pin current - 200 mA Internally limited A -6 A DC input current +/- 10 mA ISTAT DC Status current +/- 10 mA VESD Electrostatic discharge (human body model: R=1.5K; C = 100pF) - Input - Status - Output - VCC 4000 4000 5000 5000 V V V V EMAX Maximum switching energy (L = 0.6mH; RL = 0; Vbat = 13.5V; Tjstart = 150C; IL= 7.5A) 22 mJ Power dissipation (per island) at Tlead = 25C 66 W Internally limited C IOUT - IOUT IIN Ptot DC output current Reverse DC output current Tj Junction operating temperature Tc Case operating temperature - 40 to 150 C Storage temperature - 55 to 150 C Tstg 6/28 Parameter Doc ID 10872 Rev 7 VNQ810PEP-E 2.2 Electrical specifications Thermal data Table 4. Thermal data (per island) Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient (one chip ON) Value Unit 1.9 C/W 56(1) 42(2) C/W 1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35 m thick). Horizontal mounting and no artificial air flow. 2. When mounted on a standard single-sided FR-4 board with 8cm2 of Cu (at least 35 m thick). Horizontal mounting and no artificial air flow. 2.3 Electrical characteristics Values specified in this section are for 8V < VCC < 36V; -40C < Tj < 150C, unless otherwise stated. Figure 3. Current and voltage conventions IS VF1 (*) IINn VINn VCC VCC INPUTn IOUTn ISTATn OUTPUTn STATUSn VOUTn VSTATn GND IGND Note: VFn = VCCn - VOUTn during reverse battery condition. Doc ID 10872 Rev 7 7/28 Electrical specifications Table 5. Symbol Parameter Operating supply voltage VUSD Test conditions Min. Typ. Max. Unit 5.5 13 36 V Undervoltage shutdown 3 4 5.5 V VOV Overvoltage shutdown 36 RON On-state resistance V IOUT = 1A; Tj = 25C IOUT = 1A; VCC > 8V Supply current 160 120 m m Off-state; VCC = 13V; VIN = VOUT = 0V 20 60 A Off-state; VCC = 13V; VIN = VOUT = 0V; Tj = 25C 20 40 A On-state; VCC = 13V; VIN = 5V; IOUT = 0A 8.5 13.5 mA 0 50 A -75 0 A IL(off1) Off-state output current VIN = VOUT = 0V IL(off2) Off-state output current VIN = 0V; VOUT = 3.5V IL(off3) Off-state output current VIN = VOUT = 0V; VCC = 13V; Tj = 125C 5 A IL(off4) Off-state output current VIN = VOUT = 0V; VCC = 13V; Tj = 25C 3 A Table 6. Symbol Protections and diagnostics Min. Typ. Max. Unit Shutdown temperature 150 175 200 C TR Reset temperature 135 Thyst Thermal hysteresis 7 tSDL Status delay in overload conditions Tj > TTSD Ilim Current limitation VCC = 13V 5.5V < VCC < 36V Turn-off output clamp voltage IOUT = 1A; L = 6mH TTSD Vdemag 8/28 Power output VCC IS Note: VNQ810PEP-E Parameter Test conditions 5 C 15 7.5 C 20 s 10 10 A A VCC - VCC - VCC 41 48 55 V To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration and number of activation cycles. Doc ID 10872 Rev 7 VNQ810PEP-E Electrical specifications Table 7. VCC - output diode Symbol Parameter VF Forward on voltage Table 8. Symbol Test conditions Min. Typ. Max. Unit - - 0.6 V - IOUT = 0.5A; Tj = 150C Switching (VCC = 13V; Tj = 25C) Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL = 13 from VIN rising edge to VOUT = 1.3V (see Figure 5) - 30 - s td(off) Turn-off delay time RL = 13 from VIN falling edge to VOUT = 11.7V (see Figure 5) - 30 - s dVOUT/dt(on) Turn-on voltage slope RL = 13 from VOUT = 1.3V to VOUT = 10.4V (see Figure 5) - See Figure 10 - V/s dVOUT/dt(off) Turn-off voltage slope RL = 13 from VOUT = 11.7V to VOUT = 1.3V (see Figure 5) - See Figure 12 - V/s Min. Typ. Table 9. Symbol Logic inputs Parameter Test conditions VIL Input low level IIL Low level input current VIH Input high level IIH High level input current VI(hyst) Input hysteresis voltage VICL Table 10. Symbol VIN = 1.25V Unit 1.25 V 1 A 3.25 V VIN = 3.25V 10 0.5 IIN = 1mA IIN = -1mA Input clamp voltage Max. A V 6 6.8 - 0.7 8 V V Status pin Parameter Test conditions Min. Typ. Max. Unit VSTAT Status low output voltage ISTAT = 1.6mA 0.5 V ILSTAT Status leakage current Normal operation; VSTAT = 5V 10 A CSTAT Status pin input capacitance Normal operation; VSTAT = 5V 100 pF VSCL Status clamp voltage ISTAT = 1mA ISTAT = - 1mA 8 V V Table 11. 6.8 - 0.7 Openload detection Symbol Parameter IOL Openload On-state detection threshold VIN = 5V Openload On-state detection delay IOUT = 0A tDOL(on) 6 Test conditions Doc ID 10872 Rev 7 Min. 20 Typ. Max. 40 Unit 80 mA 200 s 9/28 Electrical specifications Table 11. VNQ810PEP-E Openload detection (continued) Symbol Parameter Test conditions VOL Openload Off-state voltage detection threshold tDOL(off) Openload detection delay at turn-off Figure 4. Min. VIN = 0V 1.5 Typ. Max. 2.5 3.5 V 1000 s Status timings OPEN LOAD STATUS TIMING (with external pull-up) IOUT < IOL VOUT > VOL VINn OVER TEMP STATUS TIMING Tj > TTSD VINn VSTATn VSTATn tSDL tDOL(off) Figure 5. tSDL tDOL(on) Switching characteristics VOUTn 90% 80% dVOUT/dt(off) dVOUT/dt(on) 10% t VINn td(on) td(off) t 10/28 Doc ID 10872 Rev 7 Unit VNQ810PEP-E Electrical specifications Table 12. Truth table Conditions Input Output Status Normal operation L H L H H H Current limitation L H H L X X H (Tj < TTSD) H (Tj > TTSD) L Overtemperature L H L L H L Undervoltage L H L L X X Overvoltage L H L L H H Output voltage > VOL L H H H L H Output current < IOL L H L H H L Table 13. Electrical transient requirements (part 1/3) Test level ISO T/R 7637/1 Test pulse I II III IV Delays and impedance 1 - 25V - 50V - 75V - 100V 2ms, 10 2 + 25V + 50V + 75V + 100V 0.2ms, 10 3a - 25V - 50V - 100V - 150V 0.1s, 50 3b + 25V + 50V + 75V + 100V 0.1s, 50 4 - 4V - 5V - 6V - 7V 100ms, 0.01 5 + 26.5V + 46.5V + 66.5V + 86.5V 400ms, 2 Table 14. Electrical transient requirements (part 2/3) ISO T/R Test level 7637/1 Test pulse I II III IV 1 C C C C 2 C C C C 3a C C C C 3b C C C C 4 C C C C 5 C E E E Doc ID 10872 Rev 7 11/28 Electrical specifications Table 15. VNQ810PEP-E Electrical transient requirements (part 3/3) Class 12/28 Contents C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device is not performed as designed after exposure and cannot be returned to proper operation without replacing the device. Doc ID 10872 Rev 7 VNQ810PEP-E Electrical specifications Figure 6. Waveforms NORMAL OPERATION INPUTn OUTPUT VOLTAGEn STATUSn UNDERVOLTAGE VUSDhyst VCC VUSD INPUTn OUTPUT VOLTAGEn STATUSn undefined OVERVOLTAGE VCC<VOV VCC>VOV VCC INPUTn OUTPUT VOLTAGEn STATUSn OPEN LOAD with external pull-up INPUTn VOUT>VOL OUTPUT VOLTAGEn VOL STATUSn OPEN LOAD without external pull-up INPUTn OUTPUT VOLTAGEn STATUSn Tj TTSD TR OVERTEMPERATURE INPUTn OUTPUT CURRENTn STATUSn Doc ID 10872 Rev 7 13/28 Electrical specifications VNQ810PEP-E 2.4 Electrical characteristics curves Figure 7. Off-state output current Figure 8. IL (off1) (A) High level input current Iih (A) 2.8 8 2.45 7 Vcc=36 2.1 Vcc=13V Vin=3.25V 6 1.75 5 1.4 4 1.05 3 0.7 2 0.35 1 0 -50 -25 0 25 50 75 100 125 150 175 0 -50 Tc (C) Figure 9. -25 0 25 50 75 100 125 150 175 150 175 150 175 Tc (C) Input clamp voltage Figure 10. Turn-on voltage slope Vicl (V) dVout/dt (on) (V/ms) 8 0.9 7.8 0.8 Iin=1mA 7.6 Vcc=13V Rl=6.5Ohm 0.7 7.4 0.6 7.2 0.5 7 0.4 6.8 0.3 6.6 0.2 6.4 0.1 6.2 6 0 -50 -25 0 25 50 75 100 125 150 175 -50 -25 0 25 Tc (C) Figure 11. 50 75 100 125 Tc (C) Overvoltage shutdown Figure 12. Turn-off voltage slope Vov (V) dVout/dt (off) (V/ms) 50 0.5 0.45 47.5 Vcc=13V Rl=6.5Ohm 0.4 45 0.35 42.5 0.3 0.25 40 0.2 37.5 0.15 35 0.1 32.5 0.05 30 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) 14/28 -50 -25 0 25 50 75 Tc (C) Doc ID 10872 Rev 7 100 125 VNQ810PEP-E Electrical specifications Figure 13. ILIM vs Tcase Figure 14. On-state resistance vs VCC Ilim (A) Ron (mOhm) 26 180 160 24 Iout=2A Vcc=13V 140 22 Tc=150C 120 20 100 18 80 Tc=25C 16 60 14 40 12 Tc=-40C 20 10 0 -50 -25 0 25 50 75 100 125 150 175 0 5 10 15 Tc (C) 20 25 30 35 40 Vcc (V) Figure 15. Input high level Figure 16. Input hysteresis voltage Vih(V) Vhyst (V) 4 1.6 3.8 1.4 3.6 1.2 3.4 1 3.2 3 0.8 2.8 0.6 2.6 0.4 2.4 0.2 2.2 0 2 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 100 125 150 175 100 125 150 175 Tc (C) Tc (C) Figure 17. On-state resistance vs Tcase Ron (mOhm) Figure 18. Input low level Vil (V) 160 4 3.6 140 Iout=2A Vcc=8v; 13V; 36V 120 3.2 2.8 100 2.4 2 80 1.6 60 1.2 40 0.8 20 0.4 0 0 -50 -25 0 25 50 75 100 125 150 175 Tc (C) -50 -25 0 25 50 75 Tc (C) Doc ID 10872 Rev 7 15/28 Electrical specifications VNQ810PEP-E Figure 19. Status leakage current Figure 20. Status low output voltage Vstat (V) Istat (nA) 300 0.8 270 0.7 Vstat=5V Istat=1.6mA 240 0.6 210 0.5 180 0.4 150 120 0.3 90 0.2 60 0.1 30 0 0 -50 -25 0 25 50 75 100 125 150 -50 175 -25 0 25 50 75 100 125 150 175 Tc (C) Tc (C) Figure 21. Status clamp voltage Figure 22. Openload on-state detection threshold Iol (mA) Vscl (V) 0.13 8 0.12 7.8 Vcc=13V Iin=1mA 7.6 0.11 7.4 0.1 7.2 0.09 7 0.08 6.8 0.07 6.6 0.06 6.4 0.05 6.2 0.04 6 -50 -25 0 25 50 75 100 125 150 175 Figure 23. Openload off-state voltage detection threshold Vol (V) 3.8 3.6 Vin=0V 3.4 3.2 3 2.8 2.6 2.4 2.2 2 1.8 -50 -25 0 25 50 75 100 125 150 175 Tc (C) 16/28 -50 -25 0 25 50 75 Tc (C) Tc (C) Doc ID 10872 Rev 7 100 125 150 175 VNQ810PEP-E 3 Application information Application information Figure 24. Application schematic +5V +5V VCC Rprot STATUSn Dld C Rprot INPUTn OUTPUTn GND VGND 3.1 RGND DGND GND protection network against reverse battery This section provides two solutions for implementing a ground protection network against reverse battery. 3.1.1 Solution 1: a resistor in the ground line (RGND only) This can be used with any type of load. The following show how to dimension the RGND resistor: 1. RGND 600mV / 2 (IS(on)max) 2. RGND ( - VCC) / ( - IGND) where - IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. Power dissipation in RGND (when VCC < 0 during reverse battery situations) is: PD = ( - VCC)2/ RGND This resistor can be shared amongst several different HSDs. Please note that the value of this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the maximum on-state currents of the different devices. Doc ID 10872 Rev 7 17/28 Application information VNQ810PEP-E Please note that, if the microprocessor ground is not shared by the device ground, then the RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output values. This shift will vary depending on how many devices are ON in the case of several high side drivers sharing the same RGND . If the calculated power dissipation requires the use of a large resistor, or several devices have to share the same resistor, then ST suggests using solution 2 below. 3.1.2 Solution 2: a diode (DGND) in the ground line A resistor (RGND = 1k) should be inserted in parallel to DGND if the device will be driving an inductive load. This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in the input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network. Series resistor in INPUT and STATUS lines are also required to prevent that, during battery voltage transient, the current exceeds the Absolute Maximum Rating. Safest configuration for unused INPUT and STATUS pin is to leave them unconnected. 3.2 Load dump protection Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the VCC maximum DC rating. The same applies if the device is subject to transients on the VCC line that are greater than those shown in the ISO T/R 7637/1 table. 3.3 MCU I/O protection If a ground protection network is used and negative transients are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent the C I/O pins from latching up. The value of these resistors is a compromise between the leakage current of C and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of C I/Os: - VCCpeak / Ilatchup Rprot (VOHC - VIH - VGND) / IIHmax Example For the following conditions: VCCpeak = - 100V Ilatchup 20mA VOHC 4.5V 5k Rprot 65k. Recommended values are: Rprot = 10k 18/28 Doc ID 10872 Rev 7 VNQ810PEP-E 3.4 Application information Open load detection in off-state Off-state open load detection requires an external pull-up resistor (RPU) connected between OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the microprocessor. The external resistor has to be selected according to the following requirements: 1) no false open load indication when load is connected: in this case we have to avoid VOUT to be higher than VOlmin; this results in the following condition VOUT = (VPU / (RL + RPU))RL < VOlmin. 2) no misdetection when load is disconnected: in this case the VOUT has to be higher than VOLmax; this results in the following condition RPU < (VPU - VOLmax) / IL(off2). Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pullup resistor RPU should be connected to a supply that is switched OFF when the module is in standby. Figure 25. Openload detection in Off-state V batt. VPU VCC RPU INPUT DRIVER + LOGIC IL(off2) OUT + STATUS R VOL RL GROUND Doc ID 10872 Rev 7 19/28 Application information 3.5 VNQ810PEP-E Maximum demagnetization energy (VCC = 13.5V) Figure 26. Maximum turn-off current versus load inductance ILMAX (A) 100 10 A B C 1 0.01 0.1 1 10 100 L(mH) A = single pulse at TJstart = 150C B= repetitive pulse at TJstart = 100C C= repetitive pulse at TJstart = 125C VIN, IL Demagnetization Demagnetization Demagnetization t Note: Values are generated with RL = 0. In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. 20/28 Doc ID 10872 Rev 7 VNQ810PEP-E Package and PC board thermal data 4 Package and PC board thermal data 4.1 PowerSSO-24 thermal data Figure 27. PowerSSO-24 PC board Note: Layout condition of Rth and Zth measurements (PCB FR4 area= 78 mm x 78 mm, PCB thickness=2 mm, Cu thickness=70 mm (front and back side), Copper areas: from minimum pad lay-out to 8 cm2). Figure 28. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON) RTHj_amb(C/W) 60 55 50 45 40 35 30 0 2 4 6 8 10 PCB Cu heatsink area (cm^2) Doc ID 10872 Rev 7 21/28 Package and PC board thermal data VNQ810PEP-E Figure 29. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON) ZTH (C/W) 100 Footprint 8 cm2 10 1 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 Time (s) Figure 30. Thermal fitting model of a double channel HSD in PowerSSO-24 (b) b. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. 22/28 Doc ID 10872 Rev 7 VNQ810PEP-E Package and PC board thermal data Equation 1: pulse calculation formula Z TH = R TH +Z THtp (1 - ) where = tP/T Table 16. Thermal parameters Area/island (cm2) Footprint R1 = R7 = R9 = R11 (C/W) 0.1 R2 = R8 = R10 = R12 (C/W) 0.9 R3 (C/W) 1 R4 (C/W) 4 R5 (C/W) 13.5 R6 (C/W) 37 C1 = C7 = C9 = C11 (W.s/C) 0.0006 C2 = C8 = C10 = C12 (W.s/C) 0.0025 C3 (W.s/C) 0.025 C4 (W.s/C) 0.08 C5 (W.s/C) 0.7 C6 (W.s/C) 3 Doc ID 10872 Rev 7 8 22 5 23/28 Package and packing information VNQ810PEP-E 5 Package and packing information 5.1 ECOPACK(R) packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 5.2 PowerSSO-24 mechanical data Figure 31. PowerSSO-24 package dimensions 24/28 Doc ID 10872 Rev 7 VNQ810PEP-E Package and packing information PowerSSO-24 mechanical data(1) (2) Table 17. Millimeters Symbol Min. Typ. A Max. 2.45 A2 2.15 2.35 a1 0 0.10 b 0.33 0.51 c 0.23 0.32 D 10.10 10.50 E(3) 7.40 7.60 (3) e 0.8 e3 8.8 F 2.3 G 0.1 G1 0.06 H 10.1 10.5 h 0.4 k 0 8 L 0.55 0.85 O 1.2 Q 0.8 S 2.9 T 3.65 U 1 N 10 X 4.1 4.7 Y 6.5 4.9(4) 7.1 5.5(4) 1. No intrusion allowed inwards the leads. 2. Flash or bleeds on exposed die pad shall not exceed 0.4 mm per side 3. "D and E" do not include mold flash or protusions. Mold flash or protusions shall not exceed 0.15 mm. 4. Variations for small window leadframe option. Doc ID 10872 Rev 7 25/28 Package and packing information 5.3 VNQ810PEP-E Packing information Figure 32. PowerSSO-24 tube shipment (no suffix) C Base Q.ty Bulk Q.ty Tube length ( 0.5) A B C ( 0.1) B 49 1225 532 3.5 13.8 0.6 All dimensions are in mm. A Figure 33. PowerSSO-24 tape and reel shipment (suffix "TR") Reel dimensions Base Q.ty Bulk Q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 1000 1000 330 1.5 13 20.2 24.4 100 30.4 Tape dimensions According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 ( 0.1) P D ( 0.05) D1 (min) F ( 0.1) K (max) P1 ( 0.1) 24 4 12 1.55 1.5 11.5 2.85 2 End All dimensions are in mm. Start Top cover tape No components Components 500mm min No components 500mm min Empty components pockets saled with cover tape. User direction of feed 26/28 Doc ID 10872 Rev 7 VNQ810PEP-E 6 Revision history Revision history Table 18. Document revision history Date Revision 22-Nov-2004 1 Initial release. 07-Dec-2004 2 Electrical characterization curves insertion. PCB copper area correction. 01-Apr-2005 3 Changed document status from preliminary to definitive. 04-May-2005 4 Thermal fitting model parameters correction. Emax insertion. Maximum turn-off current versus load inductance curve insertion. 03-May-2006 5 Configuration diagram modification. Shipment data insertion. 6 Document reformatted and restructured. Added list of contents, tables and figures. Added ECOPACK(R) packages information. Update PowerSSO-24 mechanical data. 7 Table 17: PowerSSO-24 mechanical data: - Changed A (max) value from 2.50 to 2.45 - Changed A2 (max) value from 2.40 to 2.35 - Updated k values - Changed L (min) value from 0.6 to 0.55 - Changed L (min) value from 1 to 0.88 26-Nov-2008 02-Jul-2009 Changes Doc ID 10872 Rev 7 27/28 VNQ810PEP-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2009 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 28/28 Doc ID 10872 Rev 7