July 2009 Doc ID 10872 Rev 7 1/28
1
VNQ810PEP-E
Quad channel high side driver
Features
CMOS compatible inputs
Open Drain status outputs
On-state open load detection
Off-state open load detection
Shorted load protection
Undervoltage and overvoltage shutdown
Loss of ground protection
Very low standby current
Reverse battery protection(a)
In compliance with the 2002/95/EC european
directive
Description
The VND810PEP-E is a monolithic device made
using| STMicroelectronics VIPower M0-3
Technology. The VNQ810PEP-E is intended for
driving any type of multiple load with one side
connected to ground.
The Active VCC pin voltage clamp protects the
device against low energy spikes (see ISO7637
transient compatibility table).
Active current limitation combined with thermal
shutdown and automatic restart protects the
device against overload. The device detects the
open load condition in both the on and off-state.
In the off-state the device detects if the output is
shorted to VCC. The device automatically turns off
in the case where the ground pin becomes
disconnected.
Type RDS(on) IOUT VCC
VNQ830PEP-E 160 mΩ(1)
1. Per each channel.
5A
(1) 36 V
a. See Application schematic on page 17
PowerSSO-24
Table 1. Device summary
Package
Order codes
Tube Tape and reel
PowerSSO-24 VNQ810PEP-E VNQ810PEPTR-E
www.st.com
Contents VNQ810PEP-E
2/28 Doc ID 10872 Rev 7
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1 GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 17
3.1.1 Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 17
3.1.2 Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 18
3.2 Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.3 MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.4 Open load detection in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.5 Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . . 20
4 Package and PC board thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1 PowerSSO-24 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.2 PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
VNQ810PEP-E List of tables
Doc ID 10872 Rev 7 3/28
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 4. Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 5. Power output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 7. VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 8. Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 9. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 10. Status pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 11. Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 12. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 13. Electrical transient requirements (part 1/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 14. Electrical transient requirements (part 2/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 15. Electrical transient requirements (part 3/3). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 16. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Table 17. PowerSSO-24 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
List of figures VNQ810PEP-E
4/28 Doc ID 10872 Rev 7
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 7. Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 10. Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 11. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 12. Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 13. ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 14. On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 15. Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 16. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 17. On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 18. Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 19. Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 20. Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 21. Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 22. Openload on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 23. Openload off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 24. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 25. Openload detection in Off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 26. Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 27. PowerSSO-24 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. Rthj-amb vs. PCB copper area in open box free air condition (one channel ON). . . . . . . . 21
Figure 29. PowerSSO-24 thermal impedance junction ambient single pulse (one channel ON). . . . . 22
Figure 30. Thermal fitting model of a double channel HSD in PowerSSO-24 . . . . . . . . . . . . . . . . . . . 22
Figure 31. PowerSSO-24 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 32. PowerSSO-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 33. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
VNQ810PEP-E Block diagram and pin description
Doc ID 10872 Rev 7 5/28
1 Block diagram and pin description
Figure 1. Block diagram
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection / pin Status N.C. Output Input
Floating X X X X
To ground X Through 10KΩ
resistor
OVERTEMP. 1
VCC
GND
INPUT1
OUTPUT1
OVERVOLTAGE
LOGIC
DRIVER 1
STATUS1
VCC
CLAMP
UNDERVOLTAGE
CLAMP 1
OPENLOAD ON 1
CURRENT LIMITER 1
OPENLOAD OFF 1
OUTPUT3
INPUT2
STATUS2
OUTPUT2
OUTPUT4
CONTROL & PROTECTION
EQUIVALENT TO
CHANNEL1
INPUT3
STATUS3
INPUT4
STATUS4
INPUT2
STATUS2
VCC
CONTROL & PROTECTION
EQUIVALENT TO
CHANNEL1
INPUT3
STATUS3
VCC
CONTROL & PROTECTION
EQUIVALENT TO
CHANNEL1
INPUT4
STATUS4
VCC
OUTPUT1
OUTPUT1
OUTPUT2
OUTPUT2
INPUT2
INPUT3
STATUS3
STATUS2
GND
V
CC
INPUT1
STATUS1
INPUT4
STATUS4
N.C.
V
CC
OUTPUT2
OUTPUT3
OUTPUT3
OUTPUT4
OUTPUT4
OUTPUT4
OUTPUT1
OUTPUT3
TAB = V
CC
Electrical specifications VNQ810PEP-E
6/28 Doc ID 10872 Rev 7
2 Electrical specifications
2.1 Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
VCC DC supply voltage 41 V
- VCC Reverse DC supply voltage - 0.3 V
- IGND DC reverse ground pin current - 200 mA
IOUT DC output current Internally limited A
- IOUT Reverse DC output current - 6 A
IIN DC input current +/- 10 mA
ISTAT DC Status current +/- 10 mA
VESD
Electrostatic discharge (human body model: R=1.5KΩ;
C = 100pF)
Input
Status
Output
–V
CC
4000
4000
5000
5000
V
V
V
V
EMAX
Maximum switching energy
(L = 0.6mH; RL = 0; Vbat = 13.5V; Tjstart = 150ºC; IL= 7.5A) 22 mJ
Ptot Power dissipation (per island) at Tlead = 25°C 66 W
TjJunction operating temperature Internally limited °C
TcCase operating temperature - 40 to 150 °C
Tstg Storage temperature - 55 to 150 °C
VNQ810PEP-E Electrical specifications
Doc ID 10872 Rev 7 7/28
2.2 Thermal data
2.3 Electrical characteristics
Values specified in this section are for 8V < VCC < 36V; -40°C < Tj < 150°C, unless
otherwise stated.
Figure 3. Current and voltage conventions
Note: VFn = VCCn - VOUTn during reverse battery condition.
Table 4. Thermal data (per island)
Symbol Parameter Value Unit
Rthj-case Thermal resistance junction-case 1.9 °C/W
Rthj-amb
Thermal resistance junction-ambient
(one chip ON) 56(1)
1. When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35 µm thick). Horizontal
mounting and no artificial air flow.
42(2)
2. When mounted on a standard single-sided FR-4 board with 8cm2 of Cu (at least 35 µm thick). Horizontal
mounting and no artificial air flow.
°C/W
IS
IGND
VCC
GND
VCC
OUTPUTn
IOUTn
VOUTn
INPUTn
IINn
STATUSn
ISTATn
VINn
VSTATn
VF1 (*)
Electrical specifications VNQ810PEP-E
8/28 Doc ID 10872 Rev 7
Note: To ensure long term reliability under heavy overload or short circuit conditions, protection
and related diagnostic signals must be used together with a proper software strategy. If the
device is subjected to abnormal conditions, this software must limit the duration and number
of activation cycles.
Table 5. Power output
Symbol Parameter Test conditions Min. Typ. Max. Unit
VCC
Operating supply
voltage 5.5 13 36 V
VUSD Undervoltage shutdown 3 4 5.5 V
VOV Overvoltage shutdown 36 V
RON On-state resistance IOUT = 1A; Tj = 25°C
IOUT = 1A; VCC > 8V
160
120
mΩ
mΩ
IS Supply current
Off-state; VCC = 13V;
VIN = VOUT = 0V
Off-state; VCC = 13V;
VIN = VOUT = 0V;
Tj = 25°C
On-state; VCC = 13V; VIN = 5V;
IOUT = 0A
20
20
8.5
60
40
13.5
µA
µA
mA
IL(off1) Off-state output current VIN = VOUT = 0V 0 50 µA
IL(off2) Off-state output current VIN = 0V; VOUT = 3.5V -75 0 µA
IL(off3) Off-state output current VIN = VOUT = 0V; VCC = 13V;
Tj = 125°C A
IL(off4) Off-state output current VIN = VOUT = 0V; VCC = 13V;
Tj = 25°C A
Table 6. Protections and diagnostics
Symbol Parameter Test conditions Min. Typ. Max. Unit
TTSD Shutdown temperature 150 175 200 °C
TRReset temperature 135 °C
Thyst Thermal hysteresis 7 15 °C
tSDL
Status delay in overload
conditions Tj > TTSD 20 µs
Ilim Current limitation VCC = 13V
5.5V < VCC < 36V
57.510
10
A
A
Vdemag
Turn-off output clamp
voltage IOUT = 1A; L = 6mH VCC -
41
VCC -
48
VCC -
55 V
VNQ810PEP-E Electrical specifications
Doc ID 10872 Rev 7 9/28
Table 7. VCC - output diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
VFForward on voltage - IOUT = 0.5A; Tj = 150°C - - 0.6 V
Table 8. Switching (VCC = 13V; Tj = 25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
td(on) Turn-on delay time RL = 13Ω from VIN rising edge
to VOUT = 1.3V (see Figure 5)-30 -µs
td(off) Turn-off delay time
RL = 13Ω from VIN falling edge
to VOUT = 11.7V
(see Figure 5)
-30 -µs
dVOUT/dt(on) Turn-on voltage slope RL = 13Ω from VOUT = 1.3V to
VOUT = 10.4V (see Figure 5)-See
Figure 10 -V/µs
dVOUT/dt(off) Turn-off voltage slope RL = 13Ω from VOUT = 11.7V
to VOUT = 1.3V (see Figure 5)-See
Figure 12 -V/µs
Table 9. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
VIL Input low level 1.25 V
IIL Low level input current VIN = 1.25V 1 µA
VIH Input high level 3.25 V
IIH High level input current VIN = 3.25V 10 µA
VI(hyst) Input hysteresis voltage 0.5 V
VICL Input clamp voltage IIN = 1mA
IIN = -1mA
66.8
- 0.7
8V
V
Table 10. Status pin
Symbol Parameter Test conditions Min. Typ. Max. Unit
VSTAT Status low output voltage ISTAT = 1.6mA 0.5 V
ILSTAT Status leakage current Normal operation; VSTAT = 5V 10 µA
CSTAT Status pin input capacitance Normal operation; VSTAT = 5V 100 pF
VSCL Status clamp voltage ISTAT = 1mA
ISTAT = - 1mA
66.8
- 0.7
8V
V
Table 11. Openload detection
Symbol Parameter Test conditions Min. Typ. Max. Unit
IOL Openload On-state detection threshold VIN = 5V 20 40 80 mA
tDOL(on) Openload On-state detection delay IOUT = 0A 200 µs
Electrical specifications VNQ810PEP-E
10/28 Doc ID 10872 Rev 7
Figure 4. Status timings
Figure 5. Switching characteristics
VOL
Openload Off-state voltage detection
threshold VIN = 0V 1.5 2.5 3.5 V
tDOL(off) Openload detection delay at turn-off 1000 µs
Table 11. Openload detection (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
INn
V
STATn
t
DOL(off)
OPEN LOAD STATUS TIMING (with external pull-up)
V
INn
V
STATn
OVER TEMP STATUS TIMING
t
SDL
t
SDL
I
OUT
< I
OL
V
OUT
> V
OL
t
DOL(on)
T
j
> T
TSD
t
t
VOUTn
VINn
80%
10%
dVOUT/dt(on)
td(off)
90%
dVOUT/dt(off)
td(on)
VNQ810PEP-E Electrical specifications
Doc ID 10872 Rev 7 11/28
Table 12. Truth table
Conditions Input Output Status
Normal operation L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Overtemperature L
H
L
L
H
L
Undervoltage L
H
L
L
X
X
Overvoltage L
H
L
L
H
H
Output voltage > VOL
L
H
H
H
L
H
Output current < IOL
L
H
L
H
H
L
Table 13. Electrical transient requirements (part 1/3)
ISO T/R
7637/1
Test pulse
Test level
I II III IV Delays and impedance
1 - 25V - 50V - 75V - 100V 2ms, 10Ω
2 + 25V + 50V + 75V + 100V 0.2ms, 10Ω
3a - 25V - 50V - 100V - 150V 0.1µs, 50Ω
3b + 25V + 50V + 75V + 100V 0.1µs, 50Ω
4 - 4V - 5V - 6V - 7V 100ms, 0.01Ω
5 + 26.5V + 46.5V + 66.5V + 86.5V 400ms, 2Ω
Table 14. Electrical transient requirements (part 2/3)
ISO T/R
7637/1
Test pulse
Test level
IIIIIIIV
1C C C C
2C C C C
3a C C C C
3b C C C C
4C C C C
5C E E E
Electrical specifications VNQ810PEP-E
12/28 Doc ID 10872 Rev 7
Table 15. Electrical transient requirements (part 3/3)
Class Contents
CAll functions of the device are performed as designed after exposure to
disturbance.
EOne or more functions of the device is not performed as designed after exposure
and cannot be returned to proper operation without replacing the device.
VNQ810PEP-E Electrical specifications
Doc ID 10872 Rev 7 13/28
Figure 6. Waveforms
OPEN LOAD without external pull-up
STATUSn
INPUTn
NORMAL OPERATION
UNDERVOLTAGE
VCC
VUSD
VUSDhyst
INPUTn
OVERVOLTAGE
VCC
STATUSn
INPUTn
STATUSn
STATUSn
INPUTn
STATUSn
INPUTn
OPEN LOAD with external pull-up
undefined
OVERTEMPERATURE
INPUTn
STATUSn
TTSD
TR
Tj
OUTPUT VOLTAGEn
VCC<VOV
OUTPUT VOLTAGEn
OUTPUT VOLTAGEn
OUTPUT VOLTAGEn
OUTPUT VOLTAGEn
OUTPUT CURRENTn
VOUT>VOL
VOL
VCC>VOV
Electrical specifications VNQ810PEP-E
14/28 Doc ID 10872 Rev 7
2.4 Electrical characteristics curves
Figure 7. Off-state output current Figure 8. High level input current
Figure 9. Input clamp voltage Figure 10. Turn-on voltage slope
Figure 11. Overvoltage shutdown Figure 12. Turn-off voltage slope
-50 -25 0 25 50 75 100 125 150 175
Tc (° C)
0
0.35
0.7
1.05
1.4
1.75
2.1
2.45
2.8
IL (off1) (µA)
Vcc=36
-50 -25 0 25 50 75 100 125 150 175
Tc (° C)
0
1
2
3
4
5
6
7
8
Iih (µA)
Vcc=13V
Vin=3.25V
-50 -25 0 25 50 75 100 125 150 175
Tc ( ° C)
6
6.2
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
Vicl (V)
Iin=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
dVout/dt (on) (V/ms)
Vcc=13V
Rl=6.5Ohm
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
30
32.5
35
37.5
40
42.5
45
47.5
50
Vov (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
0.45
0.5
dVout/dt (off) (V/ms)
Vcc=13V
Rl=6.5Ohm
VNQ810PEP-E Electrical specifications
Doc ID 10872 Rev 7 15/28
Figure 13. ILIM vs Tcase Figure 14. On-state resistance vs VCC
Figure 15. Input high level Figure 16. Input hysteresis voltage
Figure 17. On-state resistance vs Tcase Figure 18. Input low level
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
10
12
14
16
18
20
22
24
26
Ilim (A)
Vcc=13V
0 5 10 15 20 25 30 35 40
Vcc (V)
0
20
40
60
80
100
120
140
160
180
Ron (mOhm)
Tc=150°C
Tc=25°C
Tc=-40°C
Iout=2A
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
3.8
4
Vih(V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
Vhyst (V)
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
20
40
60
80
100
120
140
160
Ron (mOhm)
Iout=2A
Vcc=8v; 13V; 36V
-50 -25 0 25 50 75 100 125 150 175
Tc ( ° C)
0
0.4
0.8
1.2
1.6
2
2.4
2.8
3.2
3.6
4
Vil (V)
Electrical specifications VNQ810PEP-E
16/28 Doc ID 10872 Rev 7
Figure 19. Status leakage current Figure 20. Status low output voltage
Figure 21. Status clamp voltage Figure 22. Openload on-state detection
threshold
Figure 23. Openload off-state voltage
detection threshold
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0
30
60
90
120
150
180
210
240
270
300
Istat (nA)
Vstat=5V
-50 -25 0 25 50 75 100 125 150 175
Tc ( ° C)
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
Vstat (V)
Istat=1.6mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
6
6.2
6.4
6.6
6.8
7
7.2
7.4
7.6
7.8
8
Vscl (V)
Iin=1mA
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
0.04
0.05
0.06
0.07
0.08
0.09
0.1
0.11
0.12
0.13
Iol (mA)
Vcc=13V
-50 -25 0 25 50 75 100 125 150 175
Tc (°C)
1.8
2
2.2
2.4
2.6
2.8
3
3.2
3.4
3.6
3.8
Vol (V)
Vin=0V
VNQ810PEP-E Application information
Doc ID 10872 Rev 7 17/28
3 Application information
Figure 24. Application schematic
3.1 GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1 Solution 1: a resistor in the ground line (RGND only)
This can be used with any type of load.
The following show how to dimension the RGND resistor:
1. RGND 600mV / 2 (IS(on)max)
2. RGND ≥ ( - VCC) / ( - IGND)
where - IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0 during reverse battery situations) is:
PD = ( - VCC)2/ RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
V
CC
D
ld
+5V
R
prot
OUTPUTn
STATUSn
INPUTn
+5V
GND
μ
C
D
GND
R
GND
V
GND
R
prot
Application information VNQ810PEP-E
18/28 Doc ID 10872 Rev 7
Please note that, if the microprocessor ground is not shared by the device ground, then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same RGND .
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
3.1.2 Solution 2: a diode (DGND) in the ground line
A resistor (RGND = 1kΩ) should be inserted in parallel to DGND if the device will be driving
an inductive load. This small signal diode can be safely shared amongst several different
HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in
the input threshold and the status output values if the microprocessor ground is not common
with the device ground. This shift will not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the Absolute Maximum
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
3.2 Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC maximum DC rating. The same applies if the device is subject to transients on the VCC
line that are greater than those shown in the ISO T/R 7637/1 table.
3.3 MCU I/O protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the µC I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os:
- VCCpeak / Ilatchup Rprot (VOHμC - VIH - VGND) / IIHmax
Example
For the following conditions:
VCCpeak = - 100V
Ilatchup 20mA
VOHμC 4.5V
5kΩ Rprot 65kΩ.
Recommended values are:
Rprot = 10kΩ
VNQ810PEP-E Application information
Doc ID 10872 Rev 7 19/28
3.4 Open load detection in off-state
Off-state open load detection requires an external pull-up resistor (RPU) connected between
OUTPUT pin and a positive supply voltage (VPU) like the +5V line used to supply the
microprocessor.
The external resistor has to be selected according to the following requirements:
1) no false open load indication when load is connected: in this case we have to avoid VOUT
to be higher than VOlmin; this results in the following condition
VOUT = (VPU / (RL + RPU))RL < VOlmin.
2) no misdetection when load is disconnected: in this case the VOUT has to be higher than
VOLmax; this results in the following condition RPU < (VPU - VOLmax) / IL(off2).
Because Is(OFF) may significantly increase if Vout is pulled high (up to several mA), the pull-
up resistor RPU should be connected to a supply that is switched OFF when the module is in
standby.
Figure 25. Openload detection in Off-state
VOL
V batt. VPU
RPU
RL
R
DRIVER
+
LOGIC
+
-
INPUT
STATUS
VCC
OUT
GROUND
IL(off2)
Application information VNQ810PEP-E
20/28 Doc ID 10872 Rev 7
3.5 Maximum demagnetization energy (VCC = 13.5V)
Figure 26. Maximum turn-off current versus load inductance
Note: Values are generated with RL = 0Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves B and C.
VIN, IL
t
Demagnetization Demagnetization Demagnetization
A = single pulse at TJstart = 150ºC
B= repetitive pulse at TJstart = 100ºC
C= repetitive pulse at TJstart = 125ºC
1
10
100
0.01 0.1 1 10 100
L(mH)
ILMAX (A)
A
B
C
VNQ810PEP-E Package and PC board thermal data
Doc ID 10872 Rev 7 21/28
4 Package and PC board thermal data
4.1 PowerSSO-24 thermal data
Figure 27. PowerSSO-24 PC board
Note: Layout condition of Rth and Zth measurements (PCB FR4 area= 78 mm x 78 mm, PCB
thickness=2 mm, Cu thickness=70 mm (front and back side), Copper areas: from minimum
pad lay-out to 8 cm2).
Figure 28.
R
thj-amb
vs. PCB copper area in open box free air condition (one channel ON)
30
35
40
45
50
55
60
0246810
RTHj_amb(°C/W)
PCB Cu heatsink area (cm^2)
Package and PC board thermal data VNQ810PEP-E
22/28 Doc ID 10872 Rev 7
Figure 29. PowerSSO-24 thermal impedance junction ambient single pulse (one
channel ON)
Figure 30. Thermal fitting model of a double channel HSD in PowerSSO-24 (b)
b. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
0.1
1
10
100
0.0001 0.001 0.01 0.1 1 10 100 1000
Time (s)
ZTH (°C/W)
Footprint
8 cm
2
VNQ810PEP-E Package and PC board thermal data
Doc ID 10872 Rev 7 23/28
Equation 1: pulse calculation formula
where δ = tP/T
Table 16. Thermal parameters
Area/island (cm2)Footprint8
R1 = R7 = R9 = R11 (°C/W) 0.1
R2 = R8 = R10 = R12 (°C/W) 0.9
R3 (°C/W) 1
R4 (°C/W) 4
R5 (°C/W) 13.5
R6 (°C/W) 37 22
C1 = C7 = C9 = C11 (W.s/°C) 0.0006
C2 = C8 = C10 = C12 (W.s/°C) 0.0025
C3 (W.s/°C) 0.025
C4 (W.s/°C) 0.08
C5 (W.s/°C) 0.7
C6 (W.s/°C) 3 5
ZTHδRTH δZTHtp 1δ()+=
Package and packing information VNQ810PEP-E
24/28 Doc ID 10872 Rev 7
5 Package and packing information
5.1 ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2 PowerSSO-24 mechanical data
Figure 31. PowerSSO-24 package dimensions
VNQ810PEP-E Package and packing information
Doc ID 10872 Rev 7 25/28
Table 17. PowerSSO-24 mechanical data(1) (2)
1. No intrusion allowed inwards the leads.
2. Flash or bleeds on exposed die pad shall not exceed 0.4 mm per side
Symbol
Millimeters
Min. Typ. Max.
A2.45
A2 2.15 2.35
a1 0 0.10
b0.33 0.51
c0.23 0.32
D(3)
3. “D and E” do not include mold flash or protusions.
Mold flash or protusions shall not exceed 0.15 mm.
10.10 10.50
E(3) 7.40 7.60
e0.8
e3 8.8
F2.3
G0.1
G1 0.06
H 10.1 10.5
h0.4
k0° 8°
L0.55 0.85
O1.2
Q0.8
S2.9
T3.65
U1
N10º
X4.1 4.7
Y6.5
4.9(4)
4. Variations for small window leadframe option.
7.1
5.5(4)
Package and packing information VNQ810PEP-E
26/28 Doc ID 10872 Rev 7
5.3 Packing information
Figure 32. PowerSSO-24 tube shipment (no suffix)
Figure 33. PowerSSO-24 tape and reel shipment (suffix “TR”)
A
CB
All dimensions are in mm.
Base Q.ty 49
Bulk Q.ty 1225
Tube length (± 0.5) 532
A3.5
B13.8
C (± 0.1) 0.6
Base Q.ty 1000
Bulk Q.ty 1000
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 24.4
N (min) 100
T (max) 30.4
Reel dimensions
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
All dimensions are in mm.
Tape width W 24
Tape Hole Spacing P0 (± 0.1) 4
Component Spacing P 12
Hole Diameter D (± 0.05) 1.55
Hole Diameter D1 (min) 1.5
Hole Position F (± 0.1) 11.5
Compartment Depth K (max) 2.85
Hole Spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min 500mm min
Empty components pockets
saled with cover tape.
User direction of feed
VNQ810PEP-E Revision history
Doc ID 10872 Rev 7 27/28
6 Revision history
Table 18. Document revision history
Date Revision Changes
22-Nov-2004 1 Initial release.
07-Dec-2004 2 Electrical characterization curves insertion.
PCB copper area correction.
01-Apr-2005 3 Changed document status from preliminary to definitive.
04-May-2005 4
Thermal fitting model parameters correction.
Emax insertion.
Maximum turn-off current versus load inductance curve insertion.
03-May-2006 5 Configuration diagram modification.
Shipment data insertion.
26-Nov-2008 6
Document reformatted and restructured.
Added list of contents, tables and figures.
Added ECOPACK® packages information.
Update PowerSSO-24 mechanical data.
02-Jul-2009 7
Table 17: PowerSSO-24 mechanical data:
Changed A (max) value from 2.50 to 2.45
Changed A2 (max) value from 2.40 to 2.35
Updated k values
Changed L (min) value from 0.6 to 0.55
Changed L (min) value from 1 to 0.88
VNQ810PEP-E
28/28 Doc ID 10872 Rev 7
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