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FSB50550AB Rev. A

FSB50550AB Smart Power Module (SPM®)

Motion-SPM

January 2012

FSB50550AB

Smart Power Module (SPM®)

Features

• 500V RDS(on)=1.4W(max) 3-phase FRFET inverter including

high voltage integrated circuit (HVIC)

• 3 divided negative dc-link terminals for inverter current sens-

ing applications

• HVIC for gate driving and undervoltage protection

• 3/5V CMOS/TTL compatible, active-high interface

• Optimized for low electromagnetic interference

• Isolation voltage rating of 1500Vrms for 1min.

• HVIC temperature sensing

• Embedded bootstrap diode in the package

• RoHS compliant

Applications

• Three-phase inverter driver for small power ac motor drives

General Description

FSB50550AB is a tiny smart power module (SPM®) based on

FRFET technology as a compact inverter solution for small

power motor drive applications such as fan motors and water

suppliers. It is composed of 6 fast-recovery MOSFET (FRFET),

and 3 half-bridge HVICs for FRFET gate driving. FSB50550AB

provides low electromagnetic interference (EMI) characteristics

with optimized switching speed. Moreover, since it employs

FRFET as a power switch, it has much better ruggedness and

larger safe operation area (SOA) than that of an IGBT-based

power module or one-chip solution. The package is optimized

for the thermal performance and compactness for the use in the

built-in motor application and any other application where the

assembly space is concerned. FSB50550AB is the best

solution for the compact inverter providing the energy efficiency,

compactness, and low electromagnetic interference.

2www.fairchildsemi.com

FSB50550AB Rev. A

FSB50550AB Smart Power Module (SPM®)

Absolute Maximum Ratings

Inverter Part (Each FRFET Unless Otherwise Specified)

Control Part (Each HVIC Unless Otherwise Specified)

Bootstrap Diode Part (Each Bootstrap diode Unless Otherwise Specified)

Thermal Resistance

Total System

Note:

1. For the measurement point of case temperature TC, please refer to Figure 4.

2. Marking “ * “ is calculation value or design factor.

Symbol Parameter Conditions Rating Units

VPN

DC Link Input Voltage,

Drain-source Voltage of each FRFET 500 V

*ID25 Each FRFET Drain Current, Continuous TC = 25°C 2.0 A

*ID80 Each FRFET Drain Current, Continuous TC = 80°C 1.5 A

*IDP Each FRFET Drain Current, Peak TC = 25°C, PW < 100ms 5 A

*IDRMS Each FRFET Drain Current, Rms TC = 80°C, FPWM < 20KHz 1.1 Arms

*PDMaximum Power Dissipation TC = 25°C, For Each FRFET 14.5 W

Symbol Parameter Conditions Rating Units

VCC Control Supply Voltage Applied between VCC and COM 20 V

VBS High-side Bias Voltage Applied between VB and VS20 V

VIN Input Signal Voltage Applied between IN and COM -0.3 ~ VCC+0.3 V

Symbol Parameter Conditions Rating Units

VRRMB Maixmum Repetitive Reverse Voltage 500 V

* IFB Forward Current TC = 25°C 0.5 A

* IFPB Forward Current (Peak) TC = 25°C, Under 1ms Pulse Width 1.5 A

Symbol Parameter Conditions Rating Units

RqJC Junction to Case Thermal Resistance Each FRFET under inverter operat-

ing condition (Note 1) 8.6 °C/W

Symbol Parameter Conditions Rating Units

TJOperating Junction Temperature -40 ~ 150 °C

TSTG Storage Temperature -40 ~ 125 °C

VISO Isolation Voltage 60Hz, Sinusoidal, 1 minute, Con-

nection pins to heatsink 1500 Vrms

3www.fairchildsemi.com

FSB50550AB Rev. A

FSB50550AB Smart Power Module (SPM®)

Pin descriptions

Note:

Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside SPM®. External connections should be made as indicated in Figure 3

Figure 1. Pin Configuration and Internal Block Diagram (Bottom View)

Pin Number Pin Name Pin Description

1 COM IC Common Supply Ground

2 VB(U) Bias Voltage for U Phase High Side FRFET Driving

3 VCC(U) Bias Voltage for U Phase IC and Low Side FRFET Driving

4 IN(UH) Signal Input for U Phase High-side

5 IN(UL) Signal Input for U Phase Low-side

6 N.C N.C

7 VB(V) Bias Voltage for V Phase High Side FRFET Driving

8 VCC(V) Bias Voltage for V Phase IC and Low Side FRFET Driving

9 IN(VH) Signal Input for V Phase High-side

10 IN(VL) Signal Input for V Phase Low-side

11 N.C N.C

12 VB(W) Bias Voltage for W Phase High Side FRFET Driving

13 VCC(W) Bias Voltage for W Phase IC and Low Side FRFET Driving

14 IN(WH) Signal Input for W Phase High-side

15 IN(WL) Signal Input for W Phase Low-side

16 Vts Output for HVIC temperature sensing

17 P Positive DC–Link Input

18 U, VS(U) Output for U Phase & Bias Voltage Ground for High Side FRFET Driving

19 NUNegative DC–Link Input for U Phase

20 NVNegative DC–Link Input for V Phase

21 V, VS(V) Output for V Phase & Bias Voltage Ground for High Side FRFET Driving

22 NWNegative DC–Link Input for W Phase

23 W, VS(W) Output for W Phase & Bias Voltage Ground for High Side FRFET Driving

(1) COM

(2) VB(U)

(3) VCC(U)

(4) IN (UH)

(5) IN (UL)

(6) N.C

(7) VB(V)

(8) VCC(V)

(9) IN (VH)

(10) IN (VL)

(11) N.C

(12) V B(W)

(13) VCC(W)

(14) IN (WH)

(15) IN (W L)

(16)

(17) P

(18) U, VS(U)

(19) N U

(20) NV

(21) V, VS(V)

(22) N W

(23) W, VS(W)

COM

VCC

LIN

HIN

COM

VCC

LIN

HIN

Vts

COM

VCC

LIN

HIN

Vts

4www.fairchildsemi.com

FSB50550AB Rev. A

FSB50550AB Smart Power Module (SPM®)

Electrical Characteristics (TJ = 25°C, VCC=VBS=15V Unless Otherwise Specified)

Inverter Part (Each FRFET Unless Otherwise Specified)

Control Part (Each HVIC Unless Otherwise Specified)

Bootstrap Diode Part (Each Bootstrap diode Unless Otherwise Specified)

Note:

1. BVDSS is the absolute maximum voltage rating between drain and source terminal of each FRFET inside SPM®. VPN should be sufficiently less than this value considering the

effect of the stray inductance so that VDS should not exceed BVDSS in any case.

2. tON and tOFF include the propagation delay time of the internal drive IC. Listed values are measured at the laboratory test condition, and they can be different according to the

field applcations due to the effect of different printed circuit boards and wirings. Please see Figure 6 for the switching time definition with the switching test circuit of Figure 7.

3. The peak current and voltage of each FRFET during the switching operation should be included in the safe operating area (SOA). Please see Figure 7 for the RBSOA test cir-

cuit that is same as the switching test circuit.

4. Vts is only for sensing temperature of module and cannot shutdown MOSFETs automatically.

5. Built in bootstrap diode includes around 15 Ωresistance characteristic. Please refer to Figure 2.

Symbol Parameter Conditions Min Typ Max Units

BVDSS

Drain-Source Breakdown

Voltage VIN= 0V, ID = 1mA (Note 1) 500 - - V

IDSS

Zero Gate Voltage

Drain Current VIN= 0V, VDS = 500V - - 1 mA

RDS(on)

Static Drain-Source

On-Resistance VCC = VBS = 15V, VIN = 5V, ID = 1.2A - 1.0 1.4 W

VSD

Drain-Source Diode

Forward Voltage VCC = VBS = 15V, VIN = 0V, ID = -1.2A - - 1.2 V

tON

Switching Times

VPN = 300V, VCC = VBS = 15V, ID = 1.2A

VIN = 0V « 5V, Inductive load L=3mH

High- and low-side FRFET switching

(Note 2)

- 800 - ns

tOFF - 500 - ns

trr - 140 - ns

EON - 90 - mJ

EOFF - 10 - mJ

RBSOA Reverse-bias Safe Oper-

ating Area

VPN = 400V, VCC = VBS = 15V, ID = IDP

, VDS=BVDSS,

TJ = 150°C

High- and low-side FRFET switching (Note 3)

Full Square

Symbol Parameter Conditions Min Typ Max Units

IQCC Quiescent VCC Current VCC=15V, VIN=0V Applied between VCC and COM - - 200 mA

IQBS Quiescent VBS Current VBS=15V, VIN=0V Applied between VB(U)-U,

VB(V)-V, VB(W)-W - - 100 mA

UVCCD Low-side Undervoltage

Protection (Figure 8)

VCC Undervoltage Protection Detection Level 7.4 8.0 9.4 V

UVCCR VCC Undervoltage Protection Reset Level 8.0 8.9 9.8 V

UVBSD High-side Undervoltage

Protection (Figure 9)

VBS Undervoltage Protection Detection Level 7.4 8.0 9.4 V

UVBSR VBS Undervoltage Protection Reset Level 8.0 8.9 9.8 V

Vts HVIC Temperature sens-

ing voltage output VCC=15V, THVIC=25°C(Note 4) 600 790 980 mV

VIH ON Threshold Voltage Logic High Level Applied between IN and COM 2.9 - - V

VIL OFF Threshold Voltage Logic Low Level - - 0.8 V

Symbol Parameter Conditions Min Typ Max Units

VFB Forward Voltage IF = 0.1A, TC = 25°C(Note 5) - 2.5 - V

trrB Reverse Recovery Time IF = 0.1A, TC = 25°C - 80 - ns

5www.fairchildsemi.com

FSB50550AB Rev. A

FSB50550AB Smart Power Module (SPM®)

Recommended Operating Condition

Package Marking & Ordering Information

Figure 2. Built in Bootstrap Diode Characteristics(typ.)

Symbol Parameter Conditions Value Units

Min. Typ. Max.

VPN Supply Voltage Applied between P and N - 300 400 V

VCC Control Supply Voltage Applied between VCC and COM 13.5 15 16.5 V

VBS High-side Bias Voltage Applied between VB and VS13.5 15 16.5 V

VIN(ON) Input ON Threshold Voltage Applied between IN and COM 3.0 -VCC V

VIN(OFF) Input OFF Threshold Voltage 0 -0.6 V

tdead

Blanking Time for Preventing

Arm-short VCC=VBS=13.5 ~ 16.5V, TJ £ 150°C 1.0 - - ms

fPWM PWM Switching Frequency TJ £ 150°C - 15 - kHz

Device Marking Device Package Reel Size Packing Type Quantity

FSB50550AB FSB50550AB SPM23DD-21L - - 15

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

Built in Bootstrap Diode VF-IF Characteristic

IF [A]

VF [V]

Tc=25°C

6www.fairchildsemi.com

FSB50550AB Rev. A

FSB50550AB Smart Power Module (SPM®)

Note:

1. Parameters for bootsrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of parameters is shown above.

2. RC coupling(R5 and C5) and C4 at each input of SPM® and Micom (indicated as dotted lines) may be used to prevent improper signal due to surge noise. Signal input of SPM®

is compatible with standard CMOS or LSTTL outputs.

3. Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge voltage. Bypass capacitors such as C1, C2

and C3 should have good high-frequencycharacteristics to absorb high-frequency ripple current.

Figure 3. Recommended CPU Interface and Bootstrap Circuit with Parameters

Note:

Attach the thermocouple on top of the heatsink-side of SPM® (between SPM® and heatsink if applied) to get the correct temperature measurement.

Figure 4. Case Temperature Measurement

Figure 5. Temperature profile of Vts(typ.)

HIN LIN Output Note

0 0 Z Both FRFET Off

0 1 0 Low side FRFET On

1 0 VDC High side FRFET On

1 1 Forbidden Shoot through

Open Open Z Same as (0,0)

COM

VCC

LIN

HIN

Inverter

Output

Micom

15V

Line

10mFOne Leg Diagram of SPM

These values depend on PWM

control algorithm

* Example of bootstrap paramters:

1 = C2 = 1mF ceramic capacitor

VDC

Vts

* Example circuit : W phase

20 40 60 80 100 120 140 160

0.5

1.0

1.5

2.0

2.5

3.0

3.5

VTS [V]

THVIC [deg]

7www.fairchildsemi.com

FSB50550AB Rev. A

FSB50550AB Smart Power Module (SPM®)

Figure 6. Switching Time Definition

Figure 7. Switching and RBSOA(Single-pulse) Test Circuit (Low-side)

Figure 8. Undervoltage Protection (Low-side)

Figure 9. Undervoltage Protection (High-side)

tON trr

Irr

100% of ID120% of ID

(a) Turn-on

tOFF

(b) Turn-off

VDS

VIN VIN

10% of ID

COM

VCC

LIN

HIN

One-leg Diagram of SPM

VCC

CBS

L VDC

VDS

Vts

UVCCD

UVCCR

Input Signal

UV Protection

Status

Low-side Supply, VCC

MOSFET Current

RESET DETECTION RESET

UVBSD

UVBSR

Input Signal

UV Protection

Status

High-side Supply, VBS

MOSFET Current

RESET DETECTION RESET

8www.fairchildsemi.com

FSB50550AB Rev. A

FSB50550AB Smart Power Module (SPM®)

Note:

1. About pin position, refer to Figure 2.

2. RC coupling(R5 and C5, R4 and C6) and C4 at each input of SPM® and Micom are useful to prevent improper input signal caused by surge noise.

3. The voltage drop across R3 affects the low side switching performance and the bootstrap characteristics since it is placed between COM and the source terminal of the low side

MOSFET. For this reason, the voltage drop across R3 should be less than 1V in the steady-state.

4. Ground wires and output terminals, should be thick and short in order to avoid surge voltage and malfunction of HVIC.

5. All the filter capacitors shoud be connected close to SPM®, and they should have good characteristics for rejecting high-frequency ripple current.

Figure 10. Example of Application Circuit

COM

VCC

LIN

HIN

COM

VCC

LIN

HIN

COM

VCC

LIN

HIN

(1 ) COM

(2 ) VB(U)

(3 ) VCC(U)

(4 ) IN(UH)

(5 ) IN(UL)

(6 ) N.C

(7 ) VB(V)

(8 ) VCC(V)

(9 ) IN(VH)

(10) IN(VL)

(11)

(12) VB(W)

(13) VCC(W)

(14) IN(WH)

(15) IN(WL)

(16 )

(17) P

(18 ) U , VS(U)

(19) NU

(22) NW

Micom

15- V

Supply

C3VDC

For current sensing and protection

VTS

(21 ) V , VS(V)

(20) NV

(23 ) W , VS(W)

VTS

N.C

9www.fairchildsemi.com

FSB50550AB Rev. A

FSB50550AB Smart Power Module (SPM®)

Detailed Package Outline Drawings

Dimension unit : [mm]

10 www.fairchildsemi.com

FSB50550AB Rev. A

FSB50550AB Smart Power Module (SPM®)

Rev. I38

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application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

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