© 2005 Fairchild Semiconductor Corporation DS500151 www.fairchildsemi.com
March 1999
Revised June 2005
74LVT16244 • 74LVTH16244 Low Voltage16-Bit Buffer/Line Driver with 3-STATE Outputs
74LVT16244 • 74LVTH16244
Low Voltage16-Bit Buffer/Line Driv er
with 3-STATE Outputs
General Descript ion
The LVT16244 and LVTH16244 contain sixteen non-invert-
ing buffers with 3-S TATE outputs designed to b e em ployed
as a memory and address driver, clock driver, or bus ori-
ented trans mitter/receiver. The device is nibb le contro lled.
Individual 3-STATE control inputs can be shorted togeth er
for 8-bit or 16-bit operation.
The LVTH16244 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These buffers an d lin e dr i vers are de signed for low -vo ltage
(3.3V) VCC applications, but with the capability to provide a
TTL interface to a 5V environment. The LVT16244 and
LVTH16244 are fabricated with an advanced BiCMOS
technology to achieve high speed operation similar to 5V
ABT while maintaining a low power dissipation
Features
■Input and output interface capability to systems at
5V VCC
■Bushold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH16244),
also availabl e wi tho ut bush old feat ure (74LVT16244 ).
■Live insertion /extracti on per mitt ed
■Power Up/Down high impedance provides glitch-free
bus loading
■Outputs source/sink
32 mA/
64 mA
■Functionally compatible with the 74 series 16244
■Latch-up per for man c e exce eds 500 mA
■ESD performa nce :
Human-body model
!
2000V
Machine model
!
200V
Charged-drive model
!
1000V
■Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Ordering Code:
Note 1: Order ing code “G” indicat es T r a ys.
Note 2: Device also av ailable in Tape and R eel. Specify by appending suffix lette r “X” to the ord ering code.
Logic Symbol
Order Number Package
Number Pac kag e Descript ion
74LVT16244G
(Note 1)(Note 2) BGA54A
(Preliminary) 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LVT16244MEA
(Note 2) MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LVT16244MTD
(Note 2) MTD48 4 8-Lead Thin Shrink Sm all Outline Pa ckage (TSSOP), JEDEC M O-153, 6.1mm Wide
74LVTH16244G
(Note 1)(Note 2) BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LVTH16244MEA
(Note 2) MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LVTH16244MTD
(Note 2) MTD48 4 8-Lead Thin Shrink Sm all Outline Pa ckage (TSSOP), JEDEC M O-153, 6.1mm Wide