IPS160H Datasheet Single high-side switch Features * * * * * RDS(on) IOUT VCC 0.060 2.5 A 65 V * * * 8 V to 60 V operating voltage range Minimum output current limitation: 2.6 A Non-dissipative short-circuit protection (cut-off) Programmable cut-off delay time using external capacitor Diagnostic signalization for: open load in off-state, cut-off and junction thermal shutdown Fast demagnetization of inductive load Ground disconnection protection VCC disconnection protection * * * Undervoltage lock-out Designed to meet IEC 61131-2 PSSO12 package Applications * * * * Product status Programmable logic control Industrial PC peripheral input/output Numerical control machines SIL applications IPS160H Product summary Order code IPS160H Package PowerSSO12 Packing Tube Description IPS160HTR The IPS160H is a monolithic device which can drive capacitive, resistive or inductive loads with one side connected to ground; it is specifically designed to match safety integrity level (SIL) applications. Tape and reel Built-in thermal shutdown protects the chip against overtemperature and short-circuit. In order to minimize the power dissipation when the output is shorted, a nondissipative short-circuit protection (cut-off) is implemented, it limits both the output average current value and, consequently, the device overheating. The DIAG common diagnostic pin reports the thermal shutdown, open load in off-state and cut-off. Cut-off delay time can be programmed by an external capacitor. DS10907 - Rev 6 - December 2018 For further information contact your local STMicroelectronics sales office. www.st.com IPS160H Block diagram 1 Block diagram Figure 1. Block diagram IN DIAG Logic interface Undervoltage detection Vcc Vcc clamp Output clamp Current limitation cut -off Open load in off-state OUT CoD Junction Overtemperature GND DS10907 - Rev 6 GIPG1702151307LM page 2/26 IPS160H Pin description 2 Pin description Figure 2. Pin connection (top view) VCC 1 12 VCC IN 2 11 OUT DIAG 3 10 OUT CoD 4 9 OUT NC 5 8 OUT NC 6 7 GND TAB=Vcc GIPG1702151321LM Table 1. Pin configuration Number Name Type 1, 12, TAB VCC Device supply voltage Supply 2 IN Channel input Input 3 DIAG Common diagnostic pin both for thermal shutdown, cut-off and open load Output open drain 4 CoD Cut-off delay pin, cannot be left floating. Connected to GND by 1 k resistor to disable the cut-off function. Connect to a CCoD capacitor to set the cut-off delay see Table 8. Protection and diagnostic Input 5, 6 NC Not connected 7 GND Device ground Ground Channel power stage output Output 8, 9, 10, 11 OUT 2.1 Function IN This pin drives the output stage to pin OUT. IN pin has internal weak pull-down resistors, see Table 7. Logic inputs. 2.2 OUT Output power transistor is in high-side configuration, with active clamp for fast demagnetization. 2.3 DIAG This pin is used for diagnostic purpose and it is internally wired to an open drain transistor. The open drain transistor is turned on in case of junction thermal shutdown, cut-off, or open load in off-state. DS10907 - Rev 6 page 3/26 IPS160H CoD 2.4 CoD This pin cannot be left floating and can be used to program the cut-off delay time tcoff, seeTable 8. Protection and diagnostic through an external capacitor (CCoD). The cut-off function can be completely disabled connecting the CoD pin to GND through 1 k resistor: in this condition the output channel remains on in limitation condition, supplying the current to the load until the input is forced LOW or the thermal shutdown threshold is triggered or tcoff time elapses. 2.5 GND IC ground. 2.6 VCC IC supply voltage. DS10907 - Rev 6 page 4/26 IPS160H Absolute maximum ratings 3 Absolute maximum ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VCC Supply voltage -0.3 to 65 V VOUT Output channel voltage Vcc-Vclamp to Vcc+0.3 V IIN Input current -10 to +10 mA VIN IN voltage VCC V VCOD Output cut-off voltage pin 5.5 V ICOD Input current on cut-off pin -1 to +10 mA VDIAG Fault voltage VCC V IDIAG Fault current -5 to +10 mA ICC (1) Maximum DC reverse current flowing through the IC from GND to VCC -250 mA IOUT Output stage current Internally limited -IOUT (1) Maximum DC reverse current flowing through the IC from OUT to VCC 5 EAS (1) Single pulse avalanche energy (TAMB = 125 C, VCC = 24 V, Iload = 1 A) 1000 mJ PTOT Power dissipation at TC = 25 C (2) Internally limited W TSTG Storage temperature range -55 to 150 TJ Junction temperature -40 to 150 A C 1. Verified on application board with Rth(ja) = 49 C/W 2. (TJSD(MAX)-TC)/ Rth(JA) Note: Absolute maximum ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltages are referenced to GND. Table 3. Thermal data Symbol Note: DS10907 - Rev 6 Parameter Value Rth(JC) Thermal resistance junction-case 1 Rth(JA) Thermal resistance junction-ambient 49 Unit C/W Package mounted on a 2-layer application board with Cu thickness = 35 m, total dissipation area = 1.5 cm2 connected by 6 vias. page 5/26 IPS160H Electrical characteristics 4 Electrical characteristics (8 V < VCC < 60 V; -40 C < TJ < 125 C, unless otherwise specified) Table 4. Supply Symbol Parameter Test conditions Min. Typ. Max. VCC Supply voltage VUVON 60 VUVON Undervoltage on threshold 6.9 8 VUVOFF Undervoltage off threshold 6.5 7.8 VUVH Undervoltage hysteresis 0.15 Supply current in off-state IS Supply current in on-state ILGND GND disconnection output current Unit 0.5 VCC = 24 V 300 500 VCC = 60 V 350 600 VCC = 24 V 1 1.4 VCC = 60 V 1.4 1.8 VGND = VIN = VCC VOUT = 0 V A mA 1 mA Max. Unit Table 5. Output stage Symbol Parameter Test conditions Min. VCC = 24 V RDS(on) 60 IOUT =1 A @ TJ = 25 C On-state resistance Typ. m VCC = 24 V 120 IOUT =1 A @ TJ = 125 C VOUT(OFF) Off-state output voltage IOUT(OFF) Off-state output current IOUT(OFF-min) Off-state output current VIN = 0 V and IOUT = 0 A 2 VCC = 24 V, VIN = 0 V, VOUT = 0 V 3 VCC = 60 V, VIN = 0 V, VOUT = 0 V 10 VIN = 0 V, VOUT = 4 V -35 V A 0 Table 6. Switching (VCC = 24 V; 125 C > TJ > -40 C, RLOAD = 48 ) Symbol DS10907 - Rev 6 Parameter tr Rise time tf Fall time tPD(H-L) Propagation delay time off tPD(L-H) Propagation delay time on Test conditions Min. Typ. Max. Unit 10 IOUT = 0.5 A, Figure 3. Timing in normal operation 10 20 s 30 page 6/26 IPS160H Electrical characteristics Figure 3. Timing in normal operation Table 7. Logic inputs Symbol Parameter VIL Input low level voltage VIH Input high level voltage VI(HYST) Input hysteresis voltage IIN Input current Test conditions Min. Typ. Max. Unit 0.8 2.2 V 0.4 VCC = VIN = 36 V 200 VCC = VIN = 60 V 550 A Table 8. Protection and diagnostic Symbol DS10907 - Rev 6 Parameter Test conditions Min. Typ. Max. Unit Vclamp VCC active clamp ICC = 10 mA 65.5 Vdemag Demagnetization voltage IOUT = 0.5 A; load =1 mH VCC-71.5 VCC-68.5 VCC-65.5 V VOLoff Open load (off-state) or short to VCC detection threshold tBKT Open load blanking time VDIAG Voltage drop on DIAG 2 IDIAG = 4 mA 68.5 71.5 4 200 s 1 V page 7/26 IPS160H Electrical characteristics Symbol Parameter IDIAG DIAG pin leakage current ILIM Output current limitation tcoff Cut-off current delay time Test conditions Min. Typ. Max. VCC 36 V 110 36 V VCC 60 V 180 VCC 32 V, RLOAD 10 m Programmable by the external capacitor on CoD pin. Cut-off is disabled when CoD pin is connected to GND through 1 k resistor. 2.6 4.3 50xCCOD[nf] 35%(1) Unit A A s TJ TJSD tres Output stage restart delay time TJSD Junction temperature shutdown TJHYST Junction temperature thermal hysteresis TJ TJSD 32xtcoff [s] 40% 150 170 15 190 C 1. The formula is guaranteed in the range 10 nF CCOD 100 nF. DS10907 - Rev 6 page 8/26 IPS160H Output logic 5 Output logic Table 9. Output stage truth table Operation Normal Cut-off Overtemperature Open load UVLO DS10907 - Rev 6 IN OUT DIAG L L H H H H L L L H L L L L L H L L L H (external pull-up resistor is used) L (external pull-up resistor is used) H H X L X X L X H page 9/26 IPS160H Protection and diagnostic 6 Protection and diagnostic The IC integrates several protections to ease the design of a robust application. 6.1 Undervoltage lock-out The device turns off if the supply voltage falls below the turn-off threshold (VUV(off)). Normal operation restarts after VCC exceeds the turn-on threshold (VUV(on)). Turn-on and turn-off thresholds are defined in Table 4. Supply. 6.2 Overtemperature The output stage turns off when its internal junction temperature (TJ) exceeds the shutdown threshold TJSD. Normal operation restarts when TJ comes back below the reset threshold (TJSD - TJHYST), see Table 8. Protection and diagnostic. The internal fault signal is set when the channel is off due to thermal protection and it is reset when the junction triggers the reset threshold. This same behavior is reported on DIAG pin. 6.3 Cut-off The IC can limit the output current at the power stage by its embedded output current limitation circuit. This circuit continuously monitor the output current and, when load is increasing, at the triggering of its activation threshold (3.8A TYP) it starts limiting to ILIM limitation level (See Protection and diagnostic): while current limitation is active the IC enters an high dissipation status. The IPS160H implements the cut-off feature which limits the duration of the current limitation condition. The duration of the current limitation condition (Tcoff) can be set by a capacitor (CCoD) placed between CoD and GND pins. The design rule for CCoD is: tcoff[us] +/- 35% = 50 x Ccod[nF] The drift of +/-35% is guaranteed in the range of 10 nF < Ccod < 100 nF; lower capacitance than 10 nF can be used. If ILIM threshold is triggered, the output stage remains in the current limitation condition (IOUT = ILIM) no longer than tcoff. If tcoff elapses, the output stage turns off and restarts after the tres restart time. Thermal shutdown protection has higher priority than cut-off: * IC is forced off if TJSD is triggered before tcoff elapses * if TJSD is triggered, IC is maintained off even after the tres has elapsed and until the TJ decreases below TJSD-TJHYST Figure 4. Current limitation and cut-off I OUT t COFF t res ILIM TJ 36 V) the cut-off function needs activating in order to avoid IC permanent damages. The following table reports the suggested cutoff delay for the different operating voltage. Table 10. Minimum cut-off delay for TAMB less than -20 C VCC [V] 6.4 Cut-off delay [s] Cut-off capacitance [nF] 36-48 100 2.2 48-60 50 1 Open load in off-state The IPS160H provides the open load detection feature which detects if the load is disconnected from the OUT pin. This feature can be activated by a resistor (RPU) between OUT and VCC pins. Figure 5. Open load off-state Application board VCC SUPPLY RAIL IPS160H VCC EXPOSED PAD Open load detection signal R PU + - OUT VOLOFF RI R LED R LOAD PGND GROUND PLANE In case of wire break and during the OFF state (IN = low), the output voltage VOUT rises according to the the partitioning between the external pull-up resistor and the internal resistance of the IC (RI = 115 k). The effect of the LED (if any) on the output pin has to be considered as well. In case of wire break and during the ON state (IN = high), the output voltage VOUT is pulled up to VCC by the low resistive integrated switch. If the load is not connected, in order to guarantee the correct open load signalization it must result: VOUT > VOLoff(max.) Referring to the circuit in figure 6: therefore: DS10907 - Rev 6 VOUT = VCC - RPU x IPU = VCC - RPU x IRI + ILED + IRL (1) page 11/26 IPS160H VCC disconnection protection VCC min - VOLoff max RPU < VOLoff max VOLoff max - VLED + RI RLED (2) If the load is connected, in order to avoid any false signalization of the open load, it must result as follows: VOUT < VOLoff(min) By taking into account the circuit in figure 6: so: VOUT = VCC - RPU x IPU = VCC - RPU x VOUT VOUT - VLED VOUT + + RI RLED RL VCC max - VOLoff min RPU > VOLoff min VOLoff min - VLED VOLoff min + + RI RLED RL (3) (4) The fault condition is reported on the DIAG pin and the fault reset occurs when load is reconnected. If the channel is switched on by IN pin, the fault condition is no longer detected. When inductive load is driven, some ringing of the output voltage may be observed at the end of the demagnetization. In fact, the load is completely demagnetized when ILOAD = 0 A and the OUT pin remains floating until next turn-on. In order to avoid a fake signalization of the open load event driving inductive loads, the open load signal is masked for tBKT. So, the open load is reported on the DIAG pin with a delay of tBKT and if the open load event is triggered for more than tBKT. 6.5 VCC disconnection protection The IC is protected despite the VCC disconnection event. This event is intended as the disconnection of the VCC wire from the application board, see figure below. When this condition happens, the IC continues working normally until the voltage on the VCC pin is VUVOFF. Once the VUVOFF is triggered, the output channel is turned off independently on the input status. In case of inductive load, if the VCC is disconnected while the output channel is still active, the IC allows the discharge of the energy still stored in the inductor through the integrated power switch. DS10907 - Rev 6 page 12/26 IPS160H GND disconnection protection Figure 6. VCC disconnection APPLICATION BOARD VCC >VUVOFF VCC EXPOSED PAD CVCC SUPPLY RAIL DRIVING CIRCUITRY ON OUT IPS160H GROUND PLANE 6.6 GND GND disconnection protection GND disconnection is intended as the disconnection event of the application ground, see figure below. When this event happens, the IC continues working normally until the voltage between VCC and GND pins of the IC results VUVOFF. The voltage on GND pin of the IC rises up to the supply rail voltage level. In case of GND disconnection event, a current (ILGND) flows through OUT pin. Table 7. Logic inputs reports IOUT = ILGND for the worst case of GND disconnection event in case of output shorted to ground. DS10907 - Rev 6 page 13/26 IPS160H GND disconnection protection Figure 7. GND disconnection APPLICATION BOARD SUPPLY RAIL VCC VCC EXPOSED PAD CVCC DRIVING CIRCUITRY ON OUT IPS160H LOAD GROUND PLANE DS10907 - Rev 6 GND page 14/26 IPS160H Active VDS clamp 7 Active VDS clamp Active clamp is also known as fast demagnetization of inductive loads or fast current decay. When a high-side driver turns off an inductance, an undervoltage is detected on output. The OUT pin is pulled down to Vdemag. The conduction state is modulated by an internal circuitry in order to keep the OUT pin voltage at about Vdemag until the load energy has been dissipated. The energy is dissipated both in IC internal switch and in load resistance. Figure 8. Active clamp equivalent principle schematic APPLICATION BOARD SUPPLY RAIL IPS160H VCC EXPOSED PAD Clamp circuitry OUT L LOAD GROUND PLANE GND GIPG1802150915LM DS10907 - Rev 6 page 15/26 IPS160H Active VDS clamp Figure 9. Fast demag waveforms IOUT tDEMAG ~ ILOAD tON t VOUT ~ VCC t VCC-VDEMAG VIN ~ t The demagnetization of inductive load causes a huge electrical and thermal stress to the IC. The curve plotted below shows the maximum demagnetization energy that the IC can support in a single demagnetization pulse with VCC = 24 V and TAMB = 125 C. If higher demagnetization energy is required then an external free-wheeling Schottky diode has to be connected between OUT (cathode) and GND (anode) pins. Note that in this case the fast demagnetization is inhibited. DS10907 - Rev 6 page 16/26 IPS160H Active VDS clamp Figure 10. Typical demagnetization energy (single pulse) at VCC = 24 V and TAMB = 125 C 4000 3500 EDEMAG [mJ] 3000 2500 2000 1500 1000 500 0 500 700 900 1100 1300 ILOAD DS10907 - Rev 6 1500 1700 1900 2100 2300 2500 [mA] page 17/26 IPS160H Package information 8 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. DS10907 - Rev 6 page 18/26 IPS160H PowerSSO12 package information 8.1 PowerSSO12 package information Figure 11. PowerSSO12 package outline 7392413 rev. D DS10907 - Rev 6 page 19/26 IPS160H PowerSSO12 package information Table 11. PowerSSO12 package mechanical data mm Dim. Min. Typ. A 1.250 1.700 A1 0.000 0.100 A2 1.100 1.600 B 0.230 0.410 C 0.190 0.250 D 4.800 5.000 E 3.800 4.000 e 0.800 H 5.800 6.200 h 0.250 0.55 L 0.400 1.270 k 0d 8d X 1.900 2.500 Y 3.600 4.200 ddd Note: Max. 0.100 Dimension D doesn't include mold flash protrusions or gate burrs. Mold flash protrusions or gate burrs don't exceed 0.15 mm in total both side. Figure 12. PowerSSO12 recommended footprint DS10907 - Rev 6 page 20/26 IPS160H PowerSSO12 package information Figure 13. PowerSSO12 tape packing information [mm] Figure 14. PowerSS12 reel packing information [mm] DS10907 - Rev 6 page 21/26 IPS160H Revision history Table 12. Document revision history Date Revision 19-Mar-2015 1 Changes Initial release. Minor text changes throughout the document. 04-Nov-2015 DS10907 - Rev 6 2 Added figure 7 titled "VCC disconnection", figure 10 titled: "Fast demag waveforms" and figure 11 titled "Typical demagnetization energy (single pulse) at VCC = 24 V and TAMB = 125 C. Updated tables titled: "Supply", "Switching (VCC = 24 V; 125 C > TJ > -40 C, RLOAD = 48 )" and "Protection diagnostic". 11-May-2016 3 20-May-2016 4 Document status promoted from preliminary to production data. 08-Mar-2018 5 Updated EAS value in Table 2. Absolute maximum ratings 14-Dec-2018 6 Added reel packaging information in Section 8.1 PowerSSO12 package information Changed figures titled: "tPD(L-H) and tPD(H-L)" and "Current limitation and cutoff". page 22/26 IPS160H Contents Contents 1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 2.1 IN. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.2 OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.3 DIAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.4 CoD. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.5 GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.6 VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Output logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 6 Protection and diagnostic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 6.1 Undervoltage lock-out. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6.2 Overtemperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6.3 Cut-off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 6.4 Open load in off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6.5 VCC disconnection protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6.6 GND disconnection protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 7 Active clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 8 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 8.1 PowerSSO12 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 DS10907 - Rev 6 page 23/26 IPS160H List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Switching (VCC = 24 V; 125 C > TJ > -40 C, RLOAD = 48 ). Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Protection and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . Output stage truth table . . . . . . . . . . . . . . . . . . . . . . . . . . Minimum cut-off delay for TAMB less than -20 C . . . . . . . . . PowerSSO12 package mechanical data . . . . . . . . . . . . . . . Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . DS10907 - Rev 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 . 5 . 5 . 6 . 6 . 6 . 7 . 7 . 9 11 20 22 page 24/26 IPS160H List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. DS10907 - Rev 6 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Timing in normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Current limitation and cut-off. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open load off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC disconnection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND disconnection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Active clamp equivalent principle schematic . . . . . . . . . . . . . . . . . . . . . . . . . . Fast demag waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Typical demagnetization energy (single pulse) at VCC = 24 V and TAMB = 125 C PowerSSO12 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PowerSSO12 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PowerSSO12 tape packing information [mm] . . . . . . . . . . . . . . . . . . . . . . . . . PowerSS12 reel packing information [mm] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 3 . 7 10 11 13 14 15 16 17 19 20 21 21 page 25/26 IPS160H IMPORTANT NOTICE - PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST's terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers' products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. (c) 2018 STMicroelectronics - All rights reserved DS10907 - Rev 6 page 26/26