N- and P-Channel 40-
V
Powe
r
MOSFET
ME4565
01
No
v
, 2007-Ver4.0
Rev 0. Nov. 2007
N-Channel P-Channel
Parameter Symbol 10 secs Steady State 10 secs Steady State Unit
Drain-Source Voltage VDSS 40 -40
Gate-Source Voltage VGSS ±16 ±16
V
TA=25℃ 6.2 4.9 -5.3 -4.2 Continuous Drain
Current(Tj=150℃) TA=70℃ ID 4.8 3.8 -4.1 -3.2
Pulsed Drain Current IDM 25 25
Avalanche Current IAS 13 16
A
Single Pulse Avalanche Energy L=0.1mH EAS 8.5 13 mJ
TA=25℃ 2.5 1.56 2.45 1.52
Maximum Power Dissipation TA=70℃ PD 1.5 0.94 1.47 0.91
W
Operating Junction Temperature TJ -55 to 150 ℃
Thermal Resistance-Junction to Ambient * RθJA 50 80 51 82 ℃/W
Thermal Resistance-Junction to Case* RθJC 49 50 ℃/W
GENERAL DESCRIPTION
The LT4565 is the N- and P-Channel logic enhancement mode
power field effect transistors are produced using high cell density ,
DMOS trench technology. This high density process is especially
tailored to minimize on-state resistance. These devices are
particularly suited for low voltage application such as cellular phone
and notebook computer power management and other battery
powered circuits where high-side switching, and low in-line power
loss are needed in a very small outline surface mount package.
FEATURES
● RDS(ON)≦40mΩ@VGS=10V (N-Ch)
● RDS(ON)≦45mΩ@VGS=4.5V (N-Ch)
● RDS(ON)≦54mΩ@VGS=-10V (P-Ch)
● RDS(ON)≦60mΩ@VGS=-4.5V(P-Ch)
● Super high density cell design for extremely low RDS(ON)
● Exceptional on-resistance and maximum DC current
capability
APPLICATIONS
● Power Management
● DC/DC Converter
● LCD TV & Monitor Display inverter
● CCFL inverter
PIN CONFIGURATION
Absolute Maximum Ratings (TA=25℃ Unless Otherwise Noted)
(SOP-8)
Top View
*The device mounted on 1in2 FR4 board with 2 oz copper
N- and P-Channel 40-
V
Powe
r
MOSFET
ME4565
02
No
v
, 2007-Ver4.0
Rev 0. Nov. 2007
Notes: a. Pulse test; pulse width ≦ 300us, duty cycle≦ 2%
Symbol Parameter Conditions Min Typ Max Unit
STATIC
V(BR)DSS Drain-Source Breakdown Voltage
VGS=0V, ID=250μA
VGS=0V, ID=250μA
N-Ch
P-Ch
40
-40 V
VGS(th) Gate Threshold Voltage VDS=VGS, ID=250μA
VDS=VGS, ID=-250μA
N-Ch
P-Ch
0.6
-0.8
0.9
-1.0
1.6
-1.8 V
IGSS Gate Leakage Current VDS=0V, VGS=±16V
VDS=0V, VGS=±16V
N-Ch
P-Ch
±100
±100 nA
VDS=40V, VGS=0V
VDS=-40V, VGS=0V
N-Ch
P-Ch 1
-1
IDSS Zero Gate Voltage Drain Current VDS=40V, VGS=0V,TJ=55℃
VDS=-40V, VGS=0V,TJ=55℃
N-Ch
P-Ch 10
-10
μA
ID(ON) On-State Drain Currenta VDS≧5V, VGS= 10V
VDS≦-5V, VGS= -10V
N-Ch
P-Ch
20
-20 A
VGS=10V, ID= 5.2A
VGS=-10V, ID= -4.5A
N-Ch
P-Ch 32
43
40
54
RDS(ON) Drain-Source On-State Resistancea VGS=4.5V, ID= 4.9A
VGS=-4.5V, ID= -3.9A
N-Ch
P-Ch 35
48
45
60
mΩ
GFS Forward Transconductance VDS=15V, ID=5.2A
VDS=-15V, ID=-4.5A
N-Ch
P-Ch 18
13 S
VSD Diode Forward Voltage IS=1.7A, VGS=0V
IS=-1.7A, VGS=0V
N-Ch
P-Ch 0.78
-0.79
1.2
-1.2 V
DYNAMIC
Qg Total Gate Charge N-Ch
P-Ch 8
12
Qgs Gate-Source Charge N-Ch
P-Ch 3.3
5
Qgd Gate-Drain Charge
N-Channel
VDS=20V, VGS=4.5V, ID=5.2A
P-Channel
VDS=-20V, VGS=-4.5V, ID=-4.5A N-Ch
P-Ch 2.8
5.2
nC
Rg Gate Resistance VGS=0V, VDS=0V, f=1MHZ N-Ch
P-Ch 0.7
4.5 Ω
Ciss Input capacitance N-Ch
P-Ch 500
1000
Coss Output Capacitance N-Ch
P-Ch 43
81
Crss Reverse Transfer Capacitance
N-Channel
VDS=20V, VGS=0V, F=1MHz
P-Channel
VDS=-20V, VGS=0V, F=1MHz N-Ch
P-Ch 9.3
22
pF
td(on) Turn-On Delay Time N-Ch
P-Ch 8
30
tr Turn-On Rise Time N-Ch
P-Ch 15
12
td(off) Turn-Off Delay Time N-Ch
P-Ch 36
62
tf Turn-On Fall Time
N-Channel
VDD=15V, RL =15Ω
ID=1A, VGEN=10V, RG=6Ω
P-Channel
VDD=-15V, RL =15Ω
ID=-1A, VGEN=-10V,RG=6Ω N-Ch
P-Ch 2
5
ns
Electrical Characteristics (TA =25℃ Unless Otherwise Specified)
N- and P-Channel 40-
V
Powe
r
MOSFET
ME4565
03
No
v
, 2007-Ver4.0
Rev 0. Nov. 2007
Typical Characteristics (TJ =25℃ Noted) N-CHANNEL
N- and P-Channel 40-
V
Powe
r
MOSFET
ME4565
04
No
v
, 2007-Ver4.0
Rev 0. Nov. 2007
Typical Characteristics (TJ =25℃ Noted) N-CHANNEL
N- and P-Channel 40-
V
Powe
r
MOSFET
ME4565
05
No
v
, 2007-Ver4.0
Rev 0. Nov. 2007
Typical Characteristics (TJ =25℃ Noted) P-CHANNEL
N- and P-Channel 40-
V
Powe
r
MOSFET
ME4565
06
No
v
, 2007-Ver4.0
Rev 0. Nov. 2007
Typical Characteristics (TJ =25℃ Noted) P-CHANNEL
N- and P-Channel 40-
V
Powe
r
MOSFET
ME4565
07
No
v
, 2007-Ver4.0
Rev 0. Nov. 2007
MILLIMETERS
DIM MIN MAX
A 1.35 1.75
A1 0.10 0.25
B 0.35 0.49
C 0.18 0.25
D 4.80 5.00
E 3.80 4.00
e 1.27 BSC
H 5.80 6.20
h 0.25 0.50
L 0.40 1.25
θ 0° 7°
SOP-8 Package Outline
