The Leader in High Temperature Semiconductor Solutions CHT-RHEA DATASHEET Version: 2.4 12-Nov-13 (Last Modification Date) High-temperature Dual-Channel Isolated Transceiver General Description Features The CHT-RHEA is a high-temperature, high reliability integrated circuit that implements a dual-channel full duplex isolated data transceiver. It can be used in any application where there is a need to galvanically isolate a digital data line. The galvanic isolation is achieved by means of an external pulse transformer for each digital signal. The CHT-RHEA integrates in a single package 2 transceivers (2 transmit and 2 receive channels). A complete 4 lines data transmission (2 full duplex channels) requires 2 instances of CHT-RHEA, one being connected to the primary side of the transformers and one to the secondary side. Each transmit channel (Tx) implements a modulation block using a circuit's built-in clock generator, which frequency can be programmed with one among 7 different values inside the range [5.9-15.3 Mhz]. Each receive channel (Rx) demodulates the signal coming from the transformer. The data transmission rate is up to 2 Mbit/s. During power-up of the circuit, the output signals can be forced to the 0 state through the control input pin ENABLE. CHT-RHEA offers state-of-the-art digital signal isolation with substantial advantages over opto-couplers such as lower transmission delay, high reliability, lower power consumption, high immunity to dV/dt and operation in extreme temperature conditions. The solution can be used anywhere there is a need to isolate control lines or status/ fault reporting lines in high voltage systems or to communicate data in sensing systems. The complete solution is optimized to minimize the size of the transformer, the number of external components, the transmission delay (<100ns) and to maximize the noise margin, even in harsh dV/dt conditions (50kV/s). Operating junction temperature: from -55C to +225C 2 transmit (Tx) and 2 receive (Rx) channels Data rate up to 2 Mbits/sec per channel Transmission delay: max 100 ns Jitter (RMS cycle-2-cycle) : max 21 ns Power supply: 5V Low power consumption: 50 mW per channel (1 MHz NRZ input signal) Hysteresis on digital input for noise immunity Isolation: 10 M @2500V High common mode transient immunity: 50KV/S ENABLE control signal on both TX and RX functions On-Off Keying modulation Programmable modulation frequency (to manage EMC requirements of specific applications) Modulation polarity change by configuration Validated at 225C for 10000 hours (and still on-going) Package: CSOIC28 Applications Isolated gate drive for IGBT, MOSFET, JFET and SiC Transistors Isolated sensor interfaces Galvanic isolation of A-D converters Galvanic isolation of standard RS-232 / RS-422 / RS-485 / I2C transmission links Industrial field bus isolation Industrial power inverters Motor drives and battery management in EV / HEV PUBLIC Doc. DS-100778 V2.4 WWW.CISSOID.COM 1 of 12 12-Nov-13 : Gonzalo Picun (+32-10-489214)Nov. 13 CHT-RHEA-High TemperatureContact Dual-Channel Isolated Transceiver -DATASHEET (Last Modification Date) Functional Block Diagram TXTRIM2 TXTRIM1 OSCILLATOR VSS CHT-RHEA TXTRIM0 VCC TXAP Driver ENABLETX SETMODTXA SETMODRXA RXFA RXAN TXAP RFextA RTXAP DINA TX MODULATOR + CONTROL LOGIC TXAN Driver RX DEMOD + CONTROL LOGIC RTXAN VSS DOUTA ENABLERX TXAN RXAP TX Channel A DINB RX Channel A SETMODRXB TXBP SETMODTXB TX Channel B RXBN TXBN RX Channel B RXBP DOUTB RXFB DOUTB RXBP RX Channel B TXBN RXBN TX Channel B TXBP SETMODRXB DOUTA RXFA RXFB DINB SETMODTXB RXAP RX Channel A SETMODRXA RXAN VSS TXAN TX Channel A DINA SETMODTXA TXAP TRIM2 ENABLERX CHT-RHEA TRIM1 OSCILLATOR ENABLETX TRIM0 VCC PUBLIC Doc. DS-100778 V2.4 WWW.CISSOID.COM 2 of 10 12-Nov-13 : Gonzalo Picun (+32-10-489214)Nov. 13 CHT-RHEA-High TemperatureContact Dual-Channel Isolated Transceiver -DATASHEET (Last Modification Date) Package configuration and Pin Description SOIC28 TXAP 1 28 TXBP TXAN 2 27 TXBN ENABLETX 3 26 TXTRIM0 VCC 4 25 TXTRIM1 DINA 5 24 TXTRIM2 DINB 6 23 SETMODTXB SETMODTXA 7 22 SETMODRXB SETMODRXA 8 21 VSS RXFB 9 20 VCC RXFA 10 19 ENABLERX DOUTB 11 18 NC DOUTA 12 17 NC RXAN 13 16 RXBN RXAP 14 15 RXBP Pin # 1 Pin Name TXAP 2 TXAN Output 3 ENABLETX Input 4 5 6 7 VCC DINA DINB SETMODTXA Power supply Input Input Input 8 9 SETMODRXA RXFB 10 RXFA 11 12 13 DOUTB DOUTA RXAN Input Input/ Output Input/ Output Output Output Input 14 RXAP Input 15 RXBP Input 16 RXBN Input 17 18 19 NC NC ENABLERX Input Input Input 20 21 22 23 VCC VSS SETMODRXB SETMODTXB Input Power supply Input Input 24 25 26 27 TXTRIM2 TXTRIM1 TXTRIM0 TXBN Input Input Input Output 28 TXBP Output PUBLIC Doc. DS-100778 V2.4 Pin type Output Pin Description Positive differential output of TX channel A; to be connected to the primary of the transformer. Negative differential output of TX channel A; to be connected to the primary of the transformer. Controls the activation of the 2 TX channels; while at logical zero, both TX channels are disabled and TXAP/TXAN, TXBP/TXBN are forced to VSS level Positive power supply Schmitt trigger input of TX channel A Schmitt trigger input of TX channel B Controls the "polarity" of the modulation of TX channel A; cfr TX channel true table for more information Controls the "polarity" of the RX channel A demodulation Connected to the internal demodulation node of RX channel B; Resistance RFextB to be connected between this node and VSS Connected to the internal demodulation node of RX channel A; Resistance RfextA to be connected between this node and VSS Output of RX channel B Output of RX channel A Negative differential input of RX channel A; to be connected to the secondary of the transformer. Positive differential input of RX channel A; to be connected to the secondary of the transformer. Positive differential input of RX channel B; to be connected to the secondary of the transformer. Negative differential input of RX channel B; to be connected to the secondary of the transformer. Not connected Not connected Controls the output of the 2 RX channels; while at logical zero, both RX channel outputs (DOUTA and DOUTB) are forced to VSS level Positive power supply Negative power supply Controls the "polarity" of the RX channel B demodulation Controls the "polarity" of the modulation of TX channel B; cfr TX channel true table for more information Control bit of the internal oscillator clock divider Control bit of the internal oscillator clock divider Control bit of the internal oscillator clock divider Negative differential output of TX channel B; to be connected to the primary of the transformer. Positive differential output of TX channel B; to be connected to the primary of the transformer. WWW.CISSOID.COM 3 of 10 12-Nov-13 : Gonzalo Picun (+32-10-489214)Nov. 13 CHT-RHEA-High TemperatureContact Dual-Channel Isolated Transceiver -DATASHEET (Last Modification Date) CHT-RHEA: Absolute Maximum Ratings These ratings are considered individually (not in combination). If not specified, voltages are related to VSS. Parameter (VCC-VSS) Junction Temperature ESD Rating (Human Body Model) (expected) Min. -0.5 2 Max. 5.5 225 Units V C kV Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Frequent or extended exposure to absolute maximum rating conditions or above may affect device reliability. PUBLIC Doc. DS-100778 V2.4 WWW.CISSOID.COM 4 of 10 12-Nov-13 : Gonzalo Picun (+32-10-489214)Nov. 13 CHT-RHEA-High TemperatureContact Dual-Channel Isolated Transceiver -DATASHEET (Last Modification Date) Electrical Characteristics Unless otherwise stated: Tj=25C. Bold underlined values indicate values over the whole temperature range (-55C < Tj < +225C). Parameter Condition Min DINx = all `0' (duty cycle = 0%); CDOUT = 50 pF; TXTRIM[2..0] = `000 SETMODxxx = `0'' Supply current (1 TX + RX path) Supply quiescent current Typ 4.5 Supply voltage (VCC) V mA DINx = all `1' (duty cycle = 100%) ; CDOUT = 50 pF; TXTRIM[2..0] = `000' SETMODxxx = `0' 18 mA DINx = 1 MHz NRZ signal (duty cycle = 50%); CDOUT = 50 pF; TXTRIM[2..0] = `000' SETMODxxx = `0' 10 mA ENABLETX=0; ENABLERX=0 135 Modulation frequency Using TXTRIM[2-0] control signals Discrete steps (cfr next section) Modulation frequency variation Includes process/temperature/power supply variations Modulation frequency duty cycle Includes process/temperature/power supply variations Propagation delay Jitter (RMS cycle-2-cycle) Start-up time When ENABLE goes to 1 Isolation At 2500V mode Units 5.5 1.28 Maximum data rate Common immunity Max 5.9 230 A 2 Mbps 15.3 MHz -35 +40 % 48.5 51.5 % TXTRIM[2..0]= `0xx' 100 ns TXTRIM[2..0]= `0xx' 21 ns 100 ns 10 M transient 50 KV/S TX Channel High state output resistance On each TX output 9 Low state output resistance On each TX output 6.7 Input rising (DINA->TXAP/N) RTXAP+RTXAN =50Ohms 20 ns Input falling (DINA->TXAP/N) RTXAP+RTXAN =50Ohms 20 ns Propagation delay Minimum HIGH voltage level for digital inputs Applies to:DINA, DINB, ENABLEx, SETMODx, TXTRIMx Maximum LOW voltage level for digital inputs Applies to:DINA, DINB, ENABLEx, SETMODx, TXTRIMx 3.84 1.68 Hysteresis V 2.07 1.1 V 2.39 V RX Channel External resistor RFEXTx 1100 Minimum HIGH level output voltage VOH IOH < 8mA (source); applies to DOUTA & DOUTB Maximum LOW level output voltage VOL Iol < 8mA (sink); applies to DOUTA & DOUTB Output Rise/Fall Time (10% to 90%) On 50 pF external capacitance PUBLIC Doc. DS-100778 V2.4 WWW.CISSOID.COM Ohms 4.4 V 0.63 3 V ns 5 of 10 12-Nov-13 : Gonzalo Picun (+32-10-489214)Nov. 13 CHT-RHEA-High TemperatureContact Dual-Channel Isolated Transceiver -DATASHEET (Last Modification Date) Typical Performance Characteristics Unless otherwise stated: VCC = 5V. 100.00 95.00 95.00 Propagation delay (falling edge) (ns) Propagation delay (rising edge) (ns) 90.00 85.00 80.00 -55C 25C 75.00 125C 90.00 85.00 80.00 -55C 25C 125C 75.00 175C 175C 70.00 70.00 000 001 010 011 100 101 110 000 111 001 010 011 100 101 110 111 TXTRIM[2..0] TXTRIM[2..0] Figure 2: Propagation delay (falling edge) vs. TXTRIM[2..0] configuration bits and temperature 25.00 25.00 20.00 20.00 Jitter (peak-2-peak) (falling edge) (ns) Jitter (peak-2-peak) (rising edge) (ns) Figure 1: Propagation delay (rising edge) vs. TXTRIM[2..0] configuration bits and temperature 15.00 10.00 -55C 25C 5.00 125C 15.00 10.00 -55C 25C 5.00 125C 175C 175C 0.00 0.00 000 001 010 011 100 101 110 111 000 001 010 011 100 101 110 TXTRIM[2..0] Figure 3: Jitter (peak-2-peak) (rising edge) vs. TXTRIM[2..0] configuration bits and temperature 111 TXTRIM[2..0] Figure 4: Jitter (peak-2-peak) (falling edge) vs. TXTRIM[2..0] configuration bits and temperature 18 25 16 -55C 25C 20 125C 12 Current Consumption [mA] TX Oscillator Frequency [MHz] 14 175C 225C 10 8 6 15 -55C 25C 125C 10 175C 225C 4 5 2 0 0 000 001 010 011 100 101 110 111 000 TXTRIM[2..0] Figure 5 : TX Oscillator Frequency vs. TXTRIM[2..0] configuration bits and temperature PUBLIC Doc. DS-100778 V2.4 001 010 011 100 101 110 111 TXTRIM[2..0] Figure 6 : Consumption vs. TXTRIM[2..0] configuration bits and temperature (all channels active, Input= 1MHz NRZ, DOUT load = 50 pF, SETMODTX/RX = `0') WWW.CISSOID.COM 6 of 10 12-Nov-13 : Gonzalo Picun (+32-10-489214)Nov. 13 CHT-RHEA-High TemperatureContact Dual-Channel Isolated Transceiver -DATASHEET (Last Modification Date) General description Transmit Block functionalities The Transmit channel uses an internally generated clock to modulate the input signal and to generate 2 complementary outputs. The 2 outputs drive the primary side of the pulse transformer in a differential manner. Care has been taken in the component design to achieve 50% duty cycle on the TX outputs and so to avoid creating DC current inside the transformer. For proper operation, RTXAN and RTXAP should be set to 5. The TX channel modulation clock frequency can be selected (7 discrete values) in the range [5.9Mhz-15.3Mhz]. Table below provides the modulation frequency in function of the 3 control signals (TXTRIM[2..0]) at 25C. TXTRIM [2..0] 000 001 010 011 100 101 110 111 Typ. Clock freq (MHz) 15.3 13.8 11.3 10.2 8.21 6.86 5.91 forbidden This function can be used to manage potential electromagnetic compatibility issues at system level by moving the modulation clock frequency outside of system critical frequency bands. ENABLETX signal offers the capability to tie down the 2 outputs of both channels. This signal is active high. In a typical application, this signal could be connected to the system power-on reset to ensure that no spurious transmission is taking place till system power-up is completed. Finally, with SETMODTXA/B signal, one can invert the polarity of the Transmit Channel. Combined with the equivalent function on the Receive Block, the polarity of the modulation can be inverted while maintaining a non-inverting polarity end-toend. This feature can be used to optimize the power dissipation of the isolated data transmission function. PUBLIC Doc. DS-100778 V2.4 The table below provides the complete logical truth table of the TX block. CLK DINx 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 0 X X 1 1 0 0 X X ENABLE TX 1 1 1 1 0 0 1 1 1 1 0 0 SETMOD TXx 0 0 0 0 0 0 1 1 1 1 1 1 TXAP TXAN 1 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 Receive Block functionalities The Receive Block demodulates the differential signal sent through the pulse transformer by the Transmit Block. The 2 differential inputs of each Receive Block are connected to the secondary of the transformer. RFextA/B resistance controls the demodulation function. ENABLERX signal offers the capability to tie down the RX channel output. This signal is active high. In a typical application, this signal could be connected to the system power-on reset to ensure that no spurious transmission is taking place till system power-up is completed. Finally, with SETMODRXA/B signal, one can invert the polarity of the Receive Channel. Combined with the equivalent function on the Transmit Block, the polarity of the modulation can be inverted while maintaining a non-inverting polarity end-toend. This feature can be used to optimize the power dissipation of the isolated data transmission function. The table below provides the complete logical truth table of the RX block. RX demodulated signal X 1 0 1 0 WWW.CISSOID.COM ENABLE RX 0 1 1 1 1 SETMOD RXx X 0 0 1 1 DOUTx 0 1 0 0 1 7 of 10 12-Nov-13 : Gonzalo Picun (+32-10-489214)Nov. 13 CHT-RHEA-High TemperatureContact Dual-Channel Isolated Transceiver -DATASHEET (Last Modification Date) Power dissipation Transformer The supply current of RHEA is a function of the supply voltage, the input data rate, the input data "duty cycle" (the average percentage of "1" in the input data stream), the settings SETMODTX/SETMODRX, the TX oscillator frequency and the load on DOUT. The graph below provides supply current information for a complete TX+RX channel in function of TX oscillator frequency and input data "duty cycle" (0% = all "0" signal , 100% = all "1" signal, 50% = standard NRZ signal, Supply Voltage= 5V, DOUT load = 50 pF, SETMODTX/RX = `0'). The transformer design has to cope with following constraints: - Minimize parasitic capacitance (Cp) between Primary and Secondary; ideally Cp should be lower than 0.5 pF - Respect isolation requirements - Minimize core size - Maximum current on primary side of 20 mA (CHT-RHEA drive capability) - Primary driver power supply: 5V - Maximum switching frequency: 20 MHz - Secondary to primary ratio of about 1.1 (ideally 1 but needs to be slightly higher to compensate transformer losses) 20 18 Current Consumption [mA] 16 14 The selected transformer has an equivalent electrical model as shown in figure below. The winding ratio (P/S) is 13/15. 12 10 15MHz 8 12MHz 6 6MHz 4 2 0 0.00% 10.00% 20.00% 30.00% 40.00% 50.00% 60.00% 70.00% 80.00% 90.00% 100.00% Duty Cycle Influence of the input data rate can be considered as marginal compared to the other parameters. PUBLIC Doc. DS-100778 V2.4 WWW.CISSOID.COM 8 of 10 12-Nov-13 : Gonzalo Picun (+32-10-489214)Nov. 13 CHT-RHEA-High TemperatureContact Dual-Channel Isolated Transceiver -DATASHEET (Last Modification Date) Package Drawing 17.90 9.90 2.15 0.42 7.45 4.70 0.55 0.5-1.25 Min 8.50 / Max 9.00 Min 10.00 / Max 11.00 4.70 6.75 7.45 0.20 1.27 0.42 CSOIC 28 Drawing (mm +/- 10%) Ordering Information Ordering Reference CHT-TIT4750G-CSOIC28-T PUBLIC Doc. DS-100778 V2.4 Package CSOIC28 Temperature Range -55C to +225C WWW.CISSOID.COM Marking CHT-TIT4750G 9 of 10 12-Nov-13 : Gonzalo Picun (+32-10-489214)Nov. 13 CHT-RHEA-High TemperatureContact Dual-Channel Isolated Transceiver -DATASHEET (Last Modification Date) Contact & Ordering CISSOID S.A. Headquarters and contact EMEA: CISSOID S.A. - Rue Francqui, 3 - 1435 Mont Saint Guibert - Belgium T : +32 10 48 92 10 - F : +32 10 88 98 75 Email : sales@cissoid.com Sales Representatives: Visit our website: http://www.cissoid.com Disclaimer Neither CISSOID, nor any of its directors, employees or affiliates make any representations or extend any warranties of any kind, either express or implied, including but not limited to warranties of merchantability, fitness for a particular purpose, and the absence of latent or other defects, whether or not discoverable. In no event shall CISSOID, its directors, employees and affiliates be liable for direct, indirect, special, incidental or consequential damages of any kind arising out of the use of its circuits and their documentation, even if they have been advised of the possibility of such a damage. The circuits are provided "as is". CISSOID has no obligation to provide maintenance, support, updates, or modifications. PUBLIC Doc. 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