MC33269T3.3G - ON SEMICONDUCTOR - Datasheet.Directory

May, 2016 − Rev. 6 1Publication Order Number:

ESD7381/D

ESD7381

ESD Protection Diodes

Micro−Packaged Diodes for ESD Protection

The ESD7381 is designed to protect voltage sensitive components

that require ultra−low capacitance from ESD and transient voltage

events. Excellent clamping capability, low capacitance, low leakage,

and fast response time, make these parts ideal for ESD protection on

designs where board space is at a premium. Because of its low

capacitance, it is suited for use in high frequency designs such as

USB 2.0 high speed and antenna line applications.

Features

•Ultra−Low Capacitance: 0.37 pF

•Low Clamping Voltage

•Small Body Outline Dimensions: 0.60 mm x 0.30 mm

•Low Body Height: 0.3 mm

•Stand−off Voltage: 3.3 V

•Low Leakage

•Insertion Loss: 0.030 dBm

•Response Time is < 1 ns

•Low Dynamic Resistance < 1 W

•IEC61000−4−2 Level 4 ESD Protection

•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Typical Applications

•RF Signal ESD Protection

•RF Switching, PA, and Antenna ESD Protection

•Near Field Communications

MAXIMUM RATINGS

Rating Symbol Value Unit

IEC 61000−4−2 (ESD) Contact

Air ±20

±20 kV

Total Power Dissipation on FR−5 Board

(Note 1) @ TA = 25°C

Thermal Resistance, Junction−to−Ambient

°PD°

RqJA

250

400

°C/W

Junction and Storage Temperature Range TJ, Tstg −40 to +125 °C

Lead Solder Temperature − Maximum

(10 Second Duration) TL260 °C

Stresses exceeding those listed in the Maximum Ratings table may damage the

device. If any of these limits are exceeded, device functionality should not be

assumed, damage may occur and reliability may be af fected.

1. FR−5 = 1.0 x 0.75 x 0.62 in.

See Application Note AND8308/D for further description of survivability specs.

Device Package Shipping†

ORDERING INFORMATION

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†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer t o our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

ESD7381MUT5G X3DFN2

(Pb−Free) 10000 / Tape &

Reel

X3DFN2

CASE 152AF

MARKING

DIAGRAM

Cathode 2

Anode

PIN 1

E = Specific Device Code

M = Date Code

ESD7381

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ELECTRICAL CHARACTERISTICS

(TA = 25°C unless otherwise noted)

Symbol Parameter

IPP Maximum Reverse Peak Pulse Current

VCClamping Voltage @ IPP

VRWM Working Peak Reverse Voltage

IRMaximum Reverse Leakage Current @ VRWM

VBR Breakdown Voltage @ IT

ITTest Current

*See Application Note AND8308/D for detailed explanations of

datasheet parameters.

Uni−Directional TVS

IPP

VRWM

VCVBR VF

ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)

Parameter Symbol Conditions Min Typ Max Unit

Reverse Working Voltage VRWM 3.3 V

Breakdown Voltage (Note 2) VBR IT = 1 mA 5.0 V

Reverse Leakage Current IRVRWM = 3.3 V < 1.0 50 nA

Clamping Voltage (Note 3) VCIPP = 1 A 8.0 V

Clamping Voltage (Note 3) VCIPP = 3 A 10 V

ESD Clamping Voltage VCPer IEC61000−4−2 See Figures 1 and 2

Junction Capacitance CJVR = 0 V, f = 1 Mhz

VR = 0 V, f < 1 GHz 0.37

0.25 0.55

0.55 pF

Dynamic Resistance RDYN TLP Pulse 0.32 W

Insertion Loss f = 1 Mhz

f = 8.5 GHz 0.030

0.573 dB

2. Breakdown voltage is tested from pin 1 to 2 and pin 2 to 1.

3. Non−repetitive current pulse at TA = 25°C, per IEC61000−4−5 waveform.

Figure 1. ESD Clamping Voltage Screenshot

Positive 8 kV Contact per IEC61000−4−2 Figure 2. ESD Clamping Voltage Screenshot

Negative 8 kV Contact per IEC61000−4−2

ESD7381

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Figure 3. IV Characteristics Figure 4. CV Characteristics

I1 (A)

V1 (V)

C (pF)

VBias (V)

1.E−11

1.E−10

1.E−09

1.E−08

1.E−07

1.E−06

1.E−05

1.E−04

1.E−03

1.E−02

−1 0 1 2 3 4 5 6 7 0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

0 0.5 1 1.5 2 2.5 3 3.5 4

Figure 5. RF Insertion Loss Figure 6. Capacitance over Frequency

CAPACITANCE (pF)

FREQUENCY

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.E+00 5.E+08 1.E+09 2.E+09 2.E+09 3.E+09 3.E+0

3.3 V

0 V

FREQUENCY (Hz)

−10

−9

−8

−7

−6

−5

−4

−3

−2

−1

1.E+06 1.E+07 1.E+08 1.E+09 1.E+10

002 1816141246810

Figure 7. Positive TLP I−V Curve

CURRENT (A)

VOLTAGE (V)

−35

Figure 8. Negative TLP I−V Curve

CURRENT (A)

VOLTAGE (V)

−30

−25

−20

−15

−10

−5

0−2 −4 −1

−12−10−6 −8

ESD7381

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IEC 61000−4−2 Spec.

Level Test Volt-

age (kV)

First Peak

Current

(A) Current at

30 ns (A) Current at

60 ns (A)

1 2 7.5 4 2

2 4 15 8 4

3 6 22.5 12 6

4 8 30 16 8

Ipeak

90%

10%

IEC61000−4−2 W aveform

100%

I @ 30 ns

I @ 60 ns

tP = 0.7 ns to 1 ns

Figure 9. IEC61000−4−2 Spec

50 W

Cable

TVS Oscilloscope

ESD Gun

Figure 10. Diagram of ESD Test Setup

ESD Voltage Clamping

For sensitive circuit elements it is important to limit the

voltage that an IC will be exposed to during an ESD event

to as low a voltage as possible. The ESD clamping voltage

is the voltage drop across the ESD protection diode during

an ESD event per the IEC61000−4−2 waveform. Since the

IEC61000−4−2 was written as a pass/fail spec for larger

systems such as cell phones or laptop computers it is not

clearly defined in the spec how to specify a clamping voltage

at the device level. ON Semiconductor has developed a way

to examine the entire voltage waveform across the ESD

protection diode over the time domain of an ESD pulse in the

form of an oscilloscope screenshot, which can be found on

the datasheets for all ESD protection diodes. For more

information on how ON Semiconductor creates these

screenshots and how to interpret them please refer to

AND8307/D.

Figure 11. 8 X 20 ms Pulse Waveform

100

0020406080

t, TIME (ms)

% OF PEAK PULSE CURRENT

PULSE WIDTH (tP) IS DEFINED

AS THAT POINT WHERE THE

PEAK CURRENT DECAY = 8 ms

PEAK VALUE IRSM @ 8 ms

HALF VALUE IRSM/2 @ 20 ms

ESD7381

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PACKAGE DIMENSIONS

X3DFN2, 0.62x0.32, 0.355P, (0201)

CASE 152AF

ISSUE A

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

A B

BOTTOM VIEW

e2X

L22X

TOP VIEW

0.05 C

CSEATING

PLANE

SIDE VIEW

DIM MIN MAX

MILLIMETERS

A0.25 0.33

A1 −−− 0.05

b0.22 0.28

e0.355 BSC

L2 0.17 0.23

MOUNTING FOOTPRINT*

DIMENSIONS: MILLIMETERS

0.74

0.30

0.31

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

See Application Note AND8398/D for more mounting details

0.05 BC

RECOMMENDED

PIN 1

INDICATOR

(OPTIONAL)

D0.58 0.66

E0.28 0.36

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ESD7381/D

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