PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
6-A, 4.5-V to 14-V INPUT, NON-ISOLATED,
WIDE-OUTPUT, ADJUSTABLE POWER MODULE WITH TurboTrans™
Check for Samples: PTH08T230W,PTH08T231W
1FEATURES
2•Up to 6-A Output Current •TurboTrans™Technology
•4.5-V to 14-V Input Voltage •Designed to meet Ultra-Fast Transient
Requirements up to 300 A/µs
•Wide-Output Voltage Adjust (0.69 V to 5.5 V)
•SmartSync Technology
• ±1.5% Total Output Voltage Variation
•Efficiencies up to 95% APPLICATIONS
•Output Overcurrent Protection •Complex Multi-Voltage Systems
(Nonlatching, Auto-Reset) •Microprocessors
•Operating Temperature: –40°C to 85°C•Bus Drivers
•Safety Agency Approvals
–UL/IEC/CSA-C22.2 60950-1
•Prebias Startup
•On/Off Inhibit
•Differential Output Voltage Remote Sense
•Adjustable Undervoltage Lockout
•Auto-Track™Sequencing
•Ceramic Capacitor Version (PTH08T231W)
DESCRIPTION
The PTH08T230/231W is the higher input voltage (4.5V to 14V) version of the PTH04T230/231W (2.2V to 5.5V),
6-A rated, non-isolated power module. This regulator represents the 2nd generation of the PTH series of power
modules which include a reduced footprint and improved features. The PTH08T231W is optimized to be used in
applications requiring all ceramic capacitors.
Operating from an input voltage range of 4.5V to 14V, the PTH08T230/231W requires a single resistor to set the
output voltage to any value over the range, 0.69V to 5.5V. The wide input voltage range makes the
PTH08T230/231W particularly suitable for advanced computing and server applications that use a loosely
regulated 8-V to 12-V intermediate distribution bus. Additionally, the wide input voltage range increases design
flexibility by supporting operation with tightly regulated 5-V, 8-V, or 12-V intermediate bus architectures.
The module incorporates a comprehensive list of features. Output over-current and over-temperature shutdown
protects against most load faults. A differential remote sense ensures tight load regulation. An adjustable
under-voltage lockout allows the turn-on voltage threshold to be customized. Auto-Track™sequencing is a
popular feature that greatly simplifies the simultaneous power-up and power-down of multiple modules in a
power system.
The PTH08T230/231W includes new patent pending technologies, TurboTrans™and SmartSync. The
TurboTrans feature optimizes the transient response of the regulator while simultaneously reducing the quantity
of external output capacitors required to meet a target voltage deviation specification. Additionally, for a target
output capacitor bank, TurboTrans can be used to significantly improve the regulator's transient response by
reducing the peak voltage deviation. SmartSync allows for switching frequency synchronization of multiple
modules, thus simplifying EMI noise suppression tasks and reduces input capacitor RMS current requirements.
Double-sided surface mount construction provides a low profile and compact footprint. Package options include
both through-hole and surface mount configurations that are lead (Pb) - free and RoHS compatible.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2TurboTrans, Auto-Track, TMS320 are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Copyright ©2005–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
PTH08T230W
2
4
8
+
7
Track
GND
TT
3
GND
GND
+Sense 5
L
O
A
D
−Sense
+
10
Inhibit INH/UVLO
Auto−Track
9
6
−Sense
+Sense
SYNC
1
SmartSync
TurboTrans
RTT
1%
0.05 W
(Optional)
VO
CO2
100 µF
(Required)
CO1
200 µF
Ceramic
(Required)
RSET
1%
0.05 W
(Required)
VI
VOAdj
VI
CI
330 µF
(Required)
(Notes B and C)
VO
[D]
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
PTH08T230W
A. RSET required to set the output voltage to a value higher than 0.69 V. See the Electrical Characteristics table.
B. An additional 22-μF ceramic input capacitor is recommended to reduce RMS ripple current.
C. For VIgreater than 8 V, the minimum required CImay be reduced to 220 μF plus a 22-μF ceramic capacitor.
D. 200 μF of output capacitance can be achieved by using two 100-μF ceramic capacitors or four 47-μF ceramic
capacitors.
2Copyright ©2005–2011, Texas Instruments Incorporated
PTH08T231W
2Vi
4
8
CI
300 uF
(Required)
7
VI Track
GND VoAdj
Vo
TT
3
GND
GND
RTT
1%
0.05W
(Optional)
+Sense 5
L
O
A
D
−Sense
10
Inhibit INH/UVLO
Auto−Track
9
6
−Sense
+Sense
Vo
SYNC
1
SmartSync
CO
200 µF
Ceramic
(Required)
TurboTrans
RSET
1%
0.05 W
(Required)
(Note A)
[B]
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
PTH08T231W - Ceramic Capacitor Version
A. RSET required to set the output voltage to a value higher than 0.69 V. See the Electrical Characteristics table.
B. 200 μF of output capacitance can be achieved by using two 100-μF ceramic capacitors or four 47-μF ceramic
capacitors.
C. 300 µF of ceramic or 330 µF of electrolytic input capacitance is required for proper operation.
D. For VIgreater than 8 V, the minimum required CImay be reduced to 200 µF ceramic or 220 μF electrolytic plus a
22-μF ceramic capacitor.
Copyright ©2005–2011, Texas Instruments Incorporated 3
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
ORDERING INFORMATION
For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or see
the TI website at www.ti.com.
DATASHEET TABLE OF CONTENTS
DATASHEET SECTION PAGE NUMBER
ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS 3
ELECTRICAL CHARACTERISTICS TABLE (PTH08T230W) 4
ELECTRICAL CHARACTERISTICS TABLE (PTH08T231W) 6
PIN-OUT AND TERMINAL FUNCTIONS 8
TYPICAL CHARACTERISTICS (VI= 12V) 9
TYPICAL CHARACTERISTICS (VI= 5V) 10
ADJUSTING THE OUTPUT VOLTAGE 11
CAPACITOR RECOMMENDATIONS 13
TURBOTRANS™INFORMATION 17
UNDERVOLTAGE LOCKOUT (UVLO) 22
SOFT-START POWER-UP 23
OVER-CURRENT PROTECTION 23
OVER-TEMPERATURE PROTECTION 23
OUTPUT ON/OFF INHIBIT 24
REMOTE SENSE 24
SYCHRONIZATION (SMARTSYNC) 25
AUTO-TRACK SEQUENCING 26
PREBIAS START-UP 29
TAPE &REEL AND TRAY DRAWINGS 31
ENVIRONMENTAL AND ABSOLUTE MAXIMUM RATINGS
(Voltages are with respect to GND) UNIT
VTrack Track pin voltage –0.3 to VI+ 0.3 V
VSYNC SYNC pin voltage –0.3 to 6.0 V
TAOperating temperature range Over VIrange –40 to 85
Surface temperature of module body or pins
Twave Wave soldering temperature AD suffix 260
(5 seconds maximum) AS suffix 235(1) °C
Treflow Solder reflow temperature Surface temperature of module body or pins AZ suffix 260(1)
Tstg Storage temperature Storage temperature of module removed from shipping package –55 to 125
Tpkg Packaging temperature Shipping Tray or Tape and Reel storage or bake temperature 45
Mechanical shock Per Mil-STD-883D, Method 2002.3, 1 msec, 1/2 sine, mounted 500
Suffix AD 20 G
Mechanical vibration Mil-STD-883D, Method 2007.2, 20-2000 Hz Suffix AS and AZ 15
Weight 2.5 grams
Flammability Meets UL94V-O
(1) During reflow of surface mount package version do not elevate peak temperature of the module, pins or internal components above the
stated maximum.
4Copyright ©2005–2011, Texas Instruments Incorporated
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
ELECTRICAL CHARACTERISTICS
TA=25°C, VI= 5V, VO= 3.3V, CI= 330µF, CO1 = 200µF ceramic, CO2 = 100µF, IO= IOmax (unless otherwise stated)
PARAMETER TEST CONDITIONS PTH08T230W
MIN TYP MAX UNIT
IOOutput current Over VOrange 25°C, natural convection 0 6 A
0.69 ≤VO≤1.2 4.5 14(1)
VIInput voltage range Over IOrange 1.2 <VO≤3.6 4.5 14 V
3.6 <VO≤5.5 VO+1(2) 14
Output adjust range Over IOrange 0.69 5.5 V
Set-point voltage tolerance ±1.0 (3) %Vo
Temperature variation –40°C<TA<85°C±0.25 %Vo
VOLine regulaltion Over VIrange ±3 mV
Load regulation Over IOrange ±2 mV
Total output variation Includes set-point, line, load, –40°C≤TA≤85°C±1.5 (3) %VO
RSET = 169 Ω, VI= 8.0 V, VO= 5.0V 95%
RSET = 1.21 kΩ, VO= 3.3 V 92%
RSET = 2.37 kΩ, VO= 2.5 V 90%
RSET = 4.75 kΩ, VO= 1.8 V 88%
ηEfficiency IO= 6 A RSET = 6.98 kΩ, VO= 1.5 V 87%
RSET = 12.1 kΩ, VO= 1.2 V 85%
RSET = 20.5 kΩ, VO= 1.0 V 83%
RSET = 681 kΩ, VO= 0.7 V 79%
VORipple (peak-to-peak) 20-MHz bandwidth 1(1) %VO
ILIM Overcurrent threshold Reset, followed by auto-recovery 10 A
Recovery Time 70 µSec
w/o TurboTrans
CO1 = 200 μF, ceramic VOOvershoot 150 mV
w/o TurboTrans (4) Recovery Time 100 µSec
2.5 A/µs load step CO1 = 200 μF, ceramic
Transient response 50% to 100% IOmax VOOvershoot 100 mV
CO2 = 330 μF, Type B
VO= 2.5 V with TurboTrans Recovery Time 150 µSec
CO1 = 200 μF, ceramic
CO2 = 330 μF, Type B VOOvershoot 60 mV
RTT = 11.3 kΩ
IIL Track input current (pin 9) Pin to GND -130 (5) µA
dVtrack/dt Track slew rate capability CO≤CO(max) 1 V/ms
VIincreasing, RUVLO = OPEN 4.3 4.45
Adjustable Under-voltage lockout
UVLOADJ VIdecreasing, RUVLO = OPEN 3.7 4.2 V
(pin 10) Hysteresis, RUVLO ≤52.3 kΩ0.5
Input high voltage (VIH) Open(6) V
Inhibit control (pin 10) Input low voltage (VIL) -0.2 0.6
Input low current (IIL), Pin 10 to GND 235 µA
Iin Input standby current Inhibit (pin 10) to GND, Track (pin 9) open 5 mA
fsSwitching frequency Over VIand IOranges, SmartSync (pin 1) to GND 300 kHz
(1) For output voltages ≤1.2 V, at nominal operating frequency, the output ripple may increase (typically 2×) when operating at input
voltages greater than (VO×11). When using the SmartSync feature to adjust the switching frequency, see the SmartSync
Considerations section of the datasheet for further guidance.
(2) The minimum input voltage is 4.5V or (VO+1)V, whichever is greater. Additional input capacitance may be required when VI<(VO+2)V.
(3) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with 100 ppm/°C or better temperature stability.
(4) Without TurboTrans, the minimum ESR limit of 7 mΩmust not be violated.
(5) A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor device, is recommended to control pin 9. The
open-circuit voltage is less than 6.5 Vdc.
(6) This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when
input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. For additional information, see the related
application information section.
Copyright ©2005–2011, Texas Instruments Incorporated 5
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
TA=25°C, VI= 5V, VO= 3.3V, CI= 330µF, CO1 = 200µF ceramic, CO2 = 100µF, IO= IOmax (unless otherwise stated)
PARAMETER TEST CONDITIONS PTH08T230W
MIN TYP MAX UNIT
fSYNC Synchronization (SYNC) frequency 240 400 kHz
VSYNCH SYNC High-Level Input Voltage 2 5.5 V
SmartSync Control
VSYNCL SYNC Low-Level Input Voltage 0.8 V
tSYNC SYNC Minimum Pulse Width 200 nSec
CIExternal input capacitance 330 (7) µF
Nonceramic 0 (8) 100 5000 (9)
Capacitance value µF
without Ceramic 200 (8) 500
TurboTrans Equivalent series resistance (non-ceramic) 7 mΩ
COExternal output capacitance see table 10,000
Capacitance value μF
with (10) (11)
Turbotrans Capacitance ×ESR product (CO×ESR) 1000 10,000 μF×mΩ
Per Telcordia SR-332, 50% stress,
MTBF Reliability 6.7 106Hr
TA= 40°C, ground benign
(7) A 330 µF electrolytic input capacitor is required for proper operation. The capacitor must be rated for a minimum of 450 mA rms of ripple
current. An additional 22-μF ceramic input capacitor is recommended to reduce rms ripple current. When operating at VI>8V, the
minimum required CImay be reduced to a 220-μF electrolytic plus a 22-μF ceramic.
(8) 200 µF ceramic external output capacitance is required for basic operation. The required ceramic output capacitance can be made up of
2×100 µF or 4 ×47 µF. The minimum output capacitance requirement increases when TurboTrans™(TT) technology is used. See the
Application Information for more guidance.
(9) This is the calculated maximum disregarding TurboTrans™technology. When the TurboTrans feature is used, the minimum output
capacitance must be increased. See the TurboTrans application notes for further guidance.
(10) When using TurboTrans™technology, a minimum value of output capacitance is required for proper operation. Additionally, low ESR
capacitors are required for proper operation. See the TurboTrans application notes for further guidance.
(11) This is the calaculated maximum when using the TurboTrans feature. Additionally, low ESR capacitors are required for proper operation.
See the TurboTrans application notes for further guidance.
6Copyright ©2005–2011, Texas Instruments Incorporated
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
ELECTRICAL CHARACTERISTICS
TA=25°C, VI= 5 V, VO= 3.3 V, CI= 330 µF, CO1 = 200 µF ceramic, and IO= IOmax (unless otherwise stated)
PARAMETER TEST CONDITIONS PTH08T231W
MIN TYP MAX UNIT
IOOutput current Over VOrange 25°C, natural convection 0 6 A
0.69 ≤VO≤1.2 4.5 14 (1)
VIInput voltage range Over IOrange 1.2 <VO≤3.6 4.5 14 V
3.6 <VO≤5.5 VO+1(2) 14
Output adjust range Over IOrange 0.69 5.5 V
Set-point voltage tolerance ±1.0 (3) %Vo
Temperature variation –40°C<TA<85°C±0.25 %Vo
VOLine regulaltion Over VIrange ±3 mV
Load regulation Over IOrange ±2 mV
Total output variation Includes set-point, line, load, –40°C≤TA≤85°C±1.5 (3) %VO
RSET = 169 Ω, VI= 8.0 V, VO= 5.0V 95%
RSET = 1.21 kΩ, VO= 3.3 V 92%
RSET = 2.37 kΩ, VO= 2.5 V 90%
RSET = 4.75 kΩ, VO= 1.8 V 88%
ηEfficiency IO= 6 A RSET = 6.98 kΩ, VO= 1.5 V 87%
RSET = 12.1 kΩ, VO= 1.2 V 85%
RSET = 20.5 kΩ, VO= 1.0 V 83%
RSET = 681 kΩ, VO= 0.7 V 79%
VORipple (peak-to-peak) 20-MHz bandwidth 1(1) %VO
ILIM Overcurrent threshold Reset, followed by auto-recovery 10 A
Recovery Time 80 µSec
w/o TurboTrans
CO1 = 200 μF, ceramic VOOvershoot 85 mV
2.5 A/µs load step Recovery Time 120 µSec
w/o TurboTrans (4)
50% to 100% IOmax
Transient response CO1 = 400 μF, ceramic
VI= 12 V VOOvershoot 75 mV
VO= 3.3 V with TurboTrans Recovery Time 220 µSec
CO1 = 400 μF, ceramic VOOvershoot 45 mV
RTT = 8.06 kΩ
IIL Track input current (pin 9) Pin to GND -130 (5) µA
dVtrack/dt Track slew rate capability CO≤CO(max) 1 V/ms
VIincreasing, RUVLO = OPEN 4.3 4.45
Adjustable Under-voltage lockout
UVLOADJ VIdecreasing, RUVLO = OPEN 3.7 4.2 V
(pin 10) Hysteresis, RUVLO ≤52.3 kΩ0.5
Input high voltage (VIH) Open(6) V
Inhibit control (pin 10) Input low voltage (VIL) -0.2 0.6
Input low current (IIL), Pin 10 to GND 235 µA
Iin Input standby current Inhibit (pin 10) to GND, Track (pin 9) open 5 mA
fsSwitching frequency Over VIand IOranges, SmartSync (pin 1) to GND 300 kHz
fSYNC Synchronization (SYNC) frequency 240 400 kHz
VSYNCH SYNC High-Level Input Voltage 2 5.5 V
SmartSync Control
VSYNCL SYNC Low-Level Input Voltage 0.8 V
tSYNC SYNC Minimum Pulse Width 200 nSec
(1) For output voltages ≤1.2 V, at nominal operating frequency, the output ripple may increase (typically 2×) when operating at input
voltages greater than (VO×11). When using the SmartSync feature to adjust the switching frequency, see the SmartSync
Considerations section of the datasheet for further guidance.
(2) The minimum input voltage is 4.5V or (VO+1)V, whichever is greater. Additional input capacitance may be required when VI<(VO+2)V.
(3) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1% with 100 ppm/°C or better temperature stability.
(4) Without TurboTrans, the minimum ESR limit of 7 mΩmust not be violated.
(5) A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor device, is recommended to control pin 9. The
open-circuit voltage is less than 6.5 Vdc.
(6) This control pin has an internal pull-up. Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when
input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. For additional information, see the related
application information section.
Copyright ©2005–2011, Texas Instruments Incorporated 7
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
TA=25°C, VI= 5 V, VO= 3.3 V, CI= 330 µF, CO1 = 200 µF ceramic, and IO= IOmax (unless otherwise stated)
PARAMETER TEST CONDITIONS PTH08T231W
MIN TYP MAX UNIT
CIExternal input capacitance 300 (7) µF
without Capacitance value Ceramic 200 (8) 5000 µF
TurboTrans
COExternal output capacitance see table
Capacitance value Ceramic 5000 (10) μF
with (9)
Turbotrans Capacitance ×ESR product (CO×ESR) 100 1000 μF×mΩ
Per Telcordia SR-332, 50% stress,
MTBF Reliability 6.7 106Hr
TA= 40°C, ground benign
(7) 300 µF of ceramic or 330 µF of electrolytic input capacitance is required for proper operation. Electrolytic capacitance must be rated for
a minimum of 450 mA rms of ripple current. An additional 22-μF ceramic input capacitor is recommended to reduce rms ripple current.
(8) 200 µF ceramic external output capacitance is required for basic operation. The required ceramic output capacitance can be made up of
2×100 µF or 4 ×47 µF. The minimum output capacitance requirement increases when TurboTrans™(TT) technology is used. See the
Application Information for more guidance.
(9) When using TurboTrans™technology, a minimum value of output capacitance is required for proper operation. Additionally, low ESR
capacitors are required for proper operation. See the TurboTrans application notes for further guidance.
(10) This is the calaculated maximum when using the TurboTrans feature. Additionally, low ESR capacitors are required for proper operation.
See the TurboTrans application notes for further guidance.
8Copyright ©2005–2011, Texas Instruments Incorporated
1 10
9
7
6
5
43
82
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
PTH08T230/231W
(TOP VIEW)
TERMINAL FUNCTIONS
TERMINAL DESCRIPTION
NAME NO.
VI2 The positive input voltage power node to the module, which is referenced to common GND.
VO4 The regulated positive power output with respect to the GND.
This is the common ground connection for the VIand VOpower connections. It is also the 0 Vdc reference for
GND 3 the control inputs.
The Inhibit pin is an open-collector/drain, negative logic input that is referenced to GND. Applying a low level
ground signal to this input disables the module’s output and turns off the output voltage. When the Inhibit control
is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left open-circuit, the
Inhibit and module produces an output whenever a valid input source is applied.
10
UVLO(1) This pin is also used for input undervoltage lockout (UVLO) programming. Connecting a resistor from this pin to
GND (pin 3) allows the ON threshold of the UVLO to be adjusted higher than the default value. For more
information, see the Application Information section.
A 0.05 W 1% resistor must be directly connected between this pin and pin 6 (–Sense) to set the output voltage
to a value higher than 0.69 V. The temperature stability of the resistor should be 100 ppm/°C (or better). The
setpoint range for the output voltage is from 0.69 V to 5.5 V. If left open circuit, the output voltage will default to
VOAdjust 7 its lowest value. For further information, on output voltage adjustment see the related application note.
The specification table gives the preferred resistor values for a number of standard output voltages.
The sense input allows the regulation circuit to compensate for voltage drop between the module and the load.
+ Sense 5 For optimal voltage accuracy, +Sense must be connected to VO, close to the load.
The sense input allows the regulation circuit to compensate for voltage drop between the module and the load.
–Sense 6 For optimal voltage accuracy, –Sense must be connected to GND (pin 3), very close to the module (within 10
cm).
This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes
active typically 20 ms after the input voltage has been applied, and allows direct control of the output voltage
from 0 V up to the nominal set-point voltage. Within this range the module's output voltage follows the voltage at
Track 9 the Track pin on a volt-for-volt basis. When the control voltage is raised above this range, the module regulates
at its set-point voltage. The feature allows the output voltage to rise simultaneously with other modules powered
from the same input bus. If unused, this input should be connected to VI.
NOTE: Due to the undervoltage lockout feature, the output of the module cannot follow its own input voltage
during power up. For more information, see the related application note.
This input pin adjusts the transient response of the regulator. To activate the TurboTrans feature, a 1%, 0.05 W
resistor must be connected between this pin and pin 5 (+Sense) very close to the module. For a given value of
output capacitance, a reduction in peak output voltage deviation is achieved by using this feature. If unused, this
TurboTrans™8pin must be left open-circuit. The resistance requirement can be selected from the TurboTrans resistor table in
the Application Information section. External capacitance must never be connected to this pin unless the
TurboTrans resistor is a short, 0Ω.
This input pin sychronizes the switching frequency of the module to an external clock frequency. The SmartSync
feature can be used to sychronize the switching fequency of multiple PTH08T230/231W modules, aiding EMI
SmartSync 1 noise suppression efforts. If unused, this pin should be connected to GND (pin 3). For more information, please
review the Application Information section.
(1) Denotes negative logic: Open = Normal operation, Ground = Function active
Copyright ©2005–2011, Texas Instruments Incorporated 9
IO− OutputCurrent − A
0
0.5
1.5
1
2.5
0 1 2 5 6
− PowerDissipation − W
PD
VO=2.5V
VO=3.3V
VO=5V
VO=1.8V
VO=1.5V
VO=1.2V
2
3 4
Efficiency − %
IO− OutputCurrent − A
50
55
60
65
75
85
95
100
0 1 2 3 4 5 6
70
80
90
V =5V
O
VO=2.5V
VO=1.8V
VO=1.5V
VO=3.3V
VO=1.2V
I − OutputCurrent − A
O
V OutputVoltageRipple − V (mV)
O PP
−
5
10
15
25
1 2 35
46
0
0
20
V =5V
O
VO=3.3V
VO=1.2V
VO=1.5V
VO=1.8V
VO=2.5V
TA− AmbientTemperature − C
o
IO− OutputCurrent − A
20
30
40
50
60
70
80
90
0 1 2 3 4 5 6
100LFM
NatConv
V =5V
O
TA− AmbientTemperature − C
o
IO− OutputCurrent − A
20
30
40
50
60
70
80
90
0 1 2 3 4 5 6
100LFM
NatConv
V =3.3V
O
TA− AmbientTemperature − C
o
IO− OutputCurrent − A
20
30
40
50
60
70
80
90
0 1 2 3 4 5 6
NatConv
V =1.2V
O
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
TYPICAL CHARACTERISTICS(1) (2)
CHARACTERISTIC DATA ( VI= 12 V)
EFFICIENCY OUTPUT RIPPLE POWER DISSIPATION
vs vs vs
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 1. Figure 2. Figure 3.
AMBIENT TEMPERATURE AMBIENT TEMPERATURE AMBIENT TEMPERATURE
vs vs vs
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 4. Figure 5. Figure 6.
(1) The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 1,Figure 2, and Figure 3.
(2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper.
Applies to Figure 4,Figure 5 and Figure 6.
10 Copyright ©2005–2011, Texas Instruments Incorporated
IO− OutputCurrent − A
0
0.6
1.4
1.6
0 1 2 5 6
− PowerDissipation − W
PD
1
3 4
0.2
0.4
0.8
1.2
VO=3.3V
VO=0.7V
VO=2.5V
VO=1.2V
VO=1.5V
VO=1.8V
Efficiency − %
IO− OutputCurrent − A
60
65
75
85
95
100
0 1 2 3 4 5 6
70
80
90
VO=2.5V
VO=1.8V
VO=3.3V
VO=1.2V
V =0.7V
O
VO=1.5V
I − OutputCurrent − A
O
V OutputVoltageRipple − V (mV)
O PP
−
2
4
6
10
1 2 35
46
0
0
8
V =0.7V
O
VO=1.2V
VO=1.5V
VO=1.8V
VO=2.5V
VO=3.3V
TA− AmbientTemperature − C
o
IO− OutputCurrent − A
20
30
40
50
60
70
80
90
0 1 2 3 4 5 6
NatConv
ALL VO
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
TYPICAL CHARACTERISTICS(1) (2)
CHARACTERISTIC DATA ( VI= 5 V)
EFFICIENCY OUTPUT RIPPLE POWER DISSIPATION
vs vs vs
OUTPUT CURRENT OUTPUT CURRENT OUTPUT CURRENT
Figure 7. Figure 8. Figure 9.
AMBIENT TEMPERATURE
vs
OUTPUT CURRENT
Figure 10.
(1) The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 7,Figure 8, and Figure 9.
(2) The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. Derating limits apply to modules soldered directly to a 100 mm x 100 mm double-sided PCB with 2 oz. copper.
Applies to Figure 10.
Copyright ©2005–2011, Texas Instruments Incorporated 11
RSET =10k xW0.69
V -0.69
O
-1.43k W
PTH08T230W
GND
GND
VoAdj
7
5
+Sense
+Sense
−Sense
−Sense
VO
VO
R
1%
SET
0.05W
3
6
4
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
APPLICATION INFORMATION
ADJUSTING THE OUTPUT VOLTAGE
The VOAdjust control (pin 7) sets the output voltage of the PTH08T230/231W. The adjustment range is 0.69 V to
5.5 V. The adjustment method requires the addition of a single external resistor, RSET, that must be connected
directly between the VOAdjust and the –Sense pins. Table 1 gives the standard value of the external resistor for
a number of standard voltages, along with the actual output voltage that this resistance value provides.
For other output voltages, the required resistor value can either be calculated using the following formula, or
simply selected from the values given in Table 2.Figure 11 shows the placement of the required resistor.
(1)
Table 1. Preferred Values of RSET for Standard Output Voltages
VO(Standard) (V) RSET (Standard Value) (kΩ) VO(Actual) (V)
5.0 (1) 0.169 5.01
3.3 1.2 3.30
2.5 2.37 2.51
1.8 4.7 1.81
1.5 6.98 1.51
1.2 (2) 12.1 1.20
1.0 (2) 20.5 1.01
0.7 (2) 681 0.70
(1) For VO>3.6 V, the minimum input voltage is (VO+ 1) V.
(2) For output voltages ≤1.2V, at nominal operating frequency, the output ripple may increase (typically
2×) when operating at input voltages greater than (VO×11). When using the SmartSync feature,
review the SmartSync application section for further guidance.
(1) RSET:Use a 0.05 W resistor with a tolerance of 1% and temperature stability of 100 ppm/°C (or better). Connect the
resistor directly between pins 7 and 6, as close to the regulator as possible, using dedicated PCB traces.
(2) Never connect capacitors from VOAdjust to either GND, VO, or +Sense. Any capacitance added to the VOAdjust pin
affects the stability of the regulator.
Figure 11. VOAdjust Resistor Placement
12 Copyright ©2005–2011, Texas Instruments Incorporated
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
Table 2. Output Voltage Set-Point Resistor Values
VORequired RSET (Ω) VORequired (V) RSET (Ω)
0.70 681 k 3.00 1.54 k
0.75 113 k 3.10 1.43 k
0.80 61.9 k 3.20 1.33 k
0.85 41.2 k 3.30 1.21 k
0.90 31.6 k 3.40 1.13 k
0.95 24.9 k 3.50 1.02 k
1.00 20.5 k 3.60 931
1.10 15.4 k 3.70 866
1.20 12.1 k 3.80 787
1.30 9.88 k 3.90 715
1.40 8.25 k 4.00 649
1.50 6.98 k 4.10 590
1.60 6.04 k 4.20 536
1.70 5.36 k 4.30 475
1.80 4.75 k 4.40 432
1.90 4.22 k 4.50 383
2.00 3.83 k 4.60 332
2.10 3.40 k 4.70 287
2.20 3.09 k 4.80 249
2.30 2.87 k 4.90 210
2.40 2.61 k 5.00 169
2.50 2.37 k 5.10 133
2.60 2.15 k 5.20 100
2.70 2.00 k 5.30 66.5
2.80 1.82 k 5.40 34.8
2.90 1.69 k 5.50 4.99
Copyright ©2005–2011, Texas Instruments Incorporated 13
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
CAPACITOR RECOMMENDATIONS FOR THE PTH08T230/231W POWER MODULE
Capacitor Technologies
Electrolytic Capacitors
When using electrolytic capacitors, high quality, computer-grade electrolytic capacitors are recommended.
Aluminum electrolytic capacitors provide adequate decoupling over the frequency range, 2 kHz to 150 kHz,
and are suitable when ambient temperatures are above -20°C. For operation below -20°C, tantalum,
ceramic, or OS-CON type capacitors are required.
Ceramic Capacitors
Above 150 kHz the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic
capacitors have a low ESR and a resonant frequency higher than the bandwidth of the regulator. They can
be used to reduce the reflected ripple current at the input as well as improve the transient response of the
output.
Tantalum, Polymer-Tantalum Capacitors
Tantalum type capacitors may only used on the output bus, and are recommended for applications where the
ambient operating temperature is less than 0°C. The AVX TPS series and Kemet capacitor series are
suggested over many other tantalum types due to their lower ESR, higher rated surge, power dissipation,
and ripple current capability. Tantalum capacitors that have no stated ESR or surge current rating are not
recommended for power applications.
Input Capacitor (Required)
The PTH08T231W requires a minimum input capacitance of 300 μF of ceramic type. (330 μF of electrolytic input
capacitance may also be used. See the following paragraph for the required electrolytic capacitor ratings.)
The PTH08T230W requires a minimum input capacitance of 330 μF. The ripple current rating of the capacitor
must be at least 450 mArms. An optional 22-μF X5R/X7R ceramic capacitor is recommended to reduce the RMS
ripple current. When operating with an input voltage greater than 8 V, the minimum required input capacitance
may be reduced to a 220-μF electrolytic plus a 22-μF ceramic.
Input Capacitor Information
The size and value of the input capacitor is determined by the converter’s transient performance capability. This
minimum value assumes that the converter is supplied with a responsive, low inductance input source. This
source should have ample capacitive decoupling, and be distributed to the converter via PCB power and ground
planes.
Ceramic capacitors should be located as close as possible to the module's input pins, within 0.5 inch (1,3 cm).
Adding ceramic capacitance is necessary to reduce the high-frequency ripple voltage at the module's input. This
will reduce the magnitude of the ripple current through the electroytic capacitor, as well as the amount of ripple
current reflected back to the input source. Additional ceramic capacitors can be added to further reduce the RMS
ripple current requirement for the electrolytic capacitor.
Increasing the minimum input capacitance to 680 µF is recommended for high-performance applications, or
wherever the input source performance is degraded.
The main considerations when selecting input capacitors are the RMS ripple current rating, temperature stability,
and less than 100 mΩof equivalent series resistance (ESR).
Regular tantalum capacitors are not recommended for the input bus. These capacitors require a recommended
minimum voltage rating of 2 ×(maximum dc voltage + ac ripple). This is standard practice to ensure reliability.
No tantalum capacitors were found with a sufficient voltage rating to meet this requirement.
When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these
applications, OS-CON, poly-aluminum, and polymer-tantalum types should be considered.
14 Copyright ©2005–2011, Texas Instruments Incorporated
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
Output Capacitor (Required)
The PTH08T231W requires a minimum output capacitance of 200 μF of ceramic type.
The PTH08T230W requires a minimum output capacitance of 200 μF ceramic type. An optional 100 μF of
non-ceramic, low-ESR capacitance is recommended for improved performance. See the Electrical
Characteristics table for maximum capacitor limits.
The required capacitance above the minimum will be determined by actual transient deviation requirements. See
the TurboTrans Technology application section within this document for specific capacitance selection.
Output Capacitor Information
When selecting output capacitors, the main considerations are capacitor type, temperature stability, and ESR.
When using the TurboTrans feature, the capacitance x ESR product should also be considered (see the following
section).
Ceramic output capacitors added for high-frequency bypassing should be located as close as possible to the
load to be effective. Ceramic capacitor values below 10 μF should not be included when calculating the total
output capacitance value.
When the operating temperature is below 0°C, the ESR of aluminum electrolytic capacitors increases. For these
applications, OS-CON, poly-aluminum, and polymer-tantalum types should be considered.
TurboTrans Output Capacitance
TurboTrans allows the designer to optimize the output capacitance according to the system transient design
requirement. High quality, ultra-low ESR capacitors are required to maximize TurboTrans effectiveness. When
using TurboTrans, the capacitor's capacitance (in μF) ×ESR (in mΩ) product determines its capacitor type; Type
A, B, or C. These three types are defined as follows:
Type A = (100 ≤capacitance ×ESR ≤1000) (e.g. ceramic)
Type B = (1000 <capacitance ×ESR ≤5000) (e.g. polymer-tantalum)
Type C = (5000 <capacitance ×ESR ≤10,000) (e.g. OS-CON)
When using more than one type of output capacitor, select the capacitor type that makes up the majority of your
total output capacitance. When calculating the C ×ESR product, use the maximum ESR value from the capacitor
manufacturer's data sheet.
Working Examples:
A capacitor with a capacitance of 330 μF and an ESR of 5 mΩ, has a C ×ESR product of 1650 μFxmΩ(330 ×
5). This is a Type B capacitor. A capacitor with a capacitance of 1000 μF and an ESR of 8 mΩ, has a C ×ESR
product of 8000 μFxmΩ(1000 ×8). This is a Type C capacitor.
See the TurboTrans Technology application section within this document for specific capacitance selection.
Table 3 includes a preferred list of capacitors by type and vendor. See the Output Bus / TurboTrans column.
Non-TurboTrans Output Capacitance
If the TurboTrans feature is not used, minimum ESR and maximum capacitor limits must be followed. System
stability may be effected and increased output capacitance may be required without TurboTrans.
When using the PTH08T230W without the TurboTrans feature, observe the minimum ESR of the entire output
capacitor bank. The minimum ESR limit of the output capacitor bank is 7 mΩ. A list of preferred low-ESR type
capacitors, are identified in Table 3. Large amounts of capacitance may reduce system stability when not using
the TurboTrans feature.
When using the PTH08T231W without the TurboTrans feature, the maximum amount of capacitance is 5000 μF
of ceramic type. Large amounts of capacitance may reduce system stability.
Using the TurboTrans feature improves system stability, improves transient response, and reduces the
amount of output capacitance required to meet system transient design requirements.
Copyright ©2005–2011, Texas Instruments Incorporated 15
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
Designing for Fast Load Transients
The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of
2.5 A/μs. The typical voltage deviation for this load transient is given in the Electrical Characteristics table using
the minimum required value of output capacitance. As the di/dt of a transient is increased, the response of a
converter’s regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent
limitation with any dc/dc converter once the speed of the transient exceeds its bandwidth capability.
If the target application specifies a higher di/dt or lower voltage deviation, the requirement can only be met with
additional low ESR ceramic capacitor decoupling. Generally, with load steps greater than 100 A/μs, adding
multiple 10 μF ceramic capacitors plus 10 ×1μF, and numerous high frequency ceramics (≤0.1 μF) is all that is
required to soften the transient higher frequency edges. The PCB location of these capacitors in relation to the
load is critical. DSP, FPGA and ASIC vendors identify types, location and amount of capacitance required for
optimum performance. Low impedance buses, unbroken PCB copper planes, and components located as close
as possible to the high frequency devices are essential for optimizing transient performance.
Table 3. Input/Output Capacitors(1)
Capacitor Characteristics Quantity
Max Output Bus (2)
Max.
Capacitor Vendor, Ripple
Working Value ESR Physical Input
Type Series (Style) No Turbo-
Current Vendor Part No.
Voltage (µF) at 100 Size (mm) Bus Turbo- Trans
at 85°C
kHz Trans Cap Type(3)
(Irms)
Panasonic
FC (Radial) 25 V 1000 43mΩ1690mA 16 ×15 1 ≥2 N/R(4) EEUFC1E102S
FC (Radial) 25 V 820 38mΩ1655mA 12 ×20 1 ≥1 N/R(4) EEUFC1E821S
FC (SMD) 35 V 470 43mΩ1690mA 16 ×16,5 1 ≥1 N/R(4) EEVFC1V471N
FK (SMD) 35 V 1000 35mΩ1800mA 16 ×16,5 1 ≥2 N/R(4) EEVFK1V102M
United Chemi-Con
PTB, Poly-Tantalum(SMD) 6.3 V 330 25mΩ2600mA 7,3×4,3×2.8 N/R(5) 1 ~ 4 C ≥2(6) 6PTB337MD6TER (VO≤5.1V)(7)
LXZ, Aluminum (Radial) 35 V 680 38mΩ1660mA 12,5 ×20 1 1 ~ 3 N/R(4) LXZ35VB681M12X20LL
PS, Poly-Alum (Radial) 16 V 330 14mΩ5060mA 10 ×12,5 1 1 ~ 3 B ≥2(6) 16PS330MJ12
PS, Poly-Alum (Radial) 6.3 V 390 12mΩ5500mA 8 ×12,5 N/R(5) 1 ~ 2 B ≥1(6) 6PS390MH11 (VO≤5.1V)(7)
PXA, Poly-Alum (SMD) 16 V 330 14mΩ5050mA 10 ×12,2 1 1 ~ 3 B ≥2(6) PXA16VC331MJ12TP
PXA, Poly-Alum (Radial) 10 V 330 14mΩ4420mA 8 ×12,2 N/R(5) 1 ~ 2 B ≥1(6) PXA10VC331MH12
Nichicon, Aluminum
PM (Radial) 25 V 1000 43mΩ1520mA 18 ×15 1 ≥2 N/R(4) UPM1E102MHH6
HD (Radial) 35 V 470 23mΩ1820mA 10 ×20 1 ≥2 N/R(4) UHD1V471HR
Panasonic, Poly-Aluminum 2.0 V 390 5mΩ4000mA 7,3×4,3×4,2 N/R(5) N/R(8) B≥2(6) EEFSE0J391R(VO≤1.6V)(7)
(1) Capacitor Supplier Verification
Please verify availability of capacitors identified in this table. Capacitor suppliers may recommend alternative part numbers because of
limited availability or obsolete products.
RoHS, Lead-free and Material Details
See the capacitor suppliers regarding material composition, RoHS status, lead-free status, and manufacturing process requirements.
Component designators or part number deviations can occur when material composition or soldering requirements are updated.
(2) Additional output capacitance must include the required 200 μF of ceramic type.
(3) Required capacitors with TurboTrans. See the TurboTrans Application information for Capacitor Selection
Capacitor Types:
(a) Type A = (100 <capacitance ×ESR ≤1000)
(b) Type B = (1,000 <capacitance ×ESR ≤5,000)
(c) Type C = (5,000 <capacitance ×ESR ≤10,000)
(4) Aluminum Electrolytic capacitor not recommended for the TurboTrans due to higher ESR ×capacitance products. Aluminum and higher
ESR capacitors can be used in conjunction with lower ESR capacitance.
(5) N/R –Not recommended. The voltage rating does not meet the minimum operating limits.
(6) Required capacitors with TurboTrans. See the TurboTrans Application information for Capacitor Selection
Capacitor Types:
(a) Type A = (100 <capacitance ×ESR ≤1000)
(b) Type B = (1,000 <capacitance ×ESR ≤5,000)
(c) Type C = (5,000 <capacitance ×ESR ≤10,000)
(7) The voltage rating of this capacitor only allows it to be used for output voltage that is equal to or less than 80% of the working voltage.
(8) N/R –Not recommended. The ESR value of this capacitor is below the required minimum when not using TurboTrans.
16 Copyright ©2005–2011, Texas Instruments Incorporated
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
Table 3. Input/Output Capacitors(1) (continued)
Capacitor Characteristics Quantity
Max Output Bus (2)
Max.
Capacitor Vendor, Ripple
Working Value ESR Physical Input
Type Series (Style) No Turbo-
Current Vendor Part No.
Voltage (µF) at 100 Size (mm) Bus Turbo- Trans
at 85°C
kHz Trans Cap Type(3)
(Irms)
Sanyo
TPE, Poscap (SMD) 10 V 330 25mΩ3300mA 7,3×4,3 N/R(9) 1 ~ 3 C ≥1(10) 10TPE330MF(11)
TPE, Poscap (SMD) 2.5 V 470 7mΩ4400mA 7,3×4,3 N/R(9) 1 ~ 2 B ≥2(10) 2R5TPE470M7(VO≤1.8V)(11)
TPD, Poscap (SMD) 2.5 V 1000 5mΩ6100mA 7,3×4,3 N/R(9) N/R(12) B≥1(10) 2R5TPD1000M5(VO≤1.8V)(11)
SEP, OS-CON (Radial) 16 V 330 16mΩ4700mA 10 ×13 1 1 ~ 2 B ≥1(10) 16SEP330M
SEPC, OS-CON (Radial) 16 V 470 10mΩ6100mA 10 ×13 1 1 ~ 2 B ≥2(10) 16SEPC470M
SVP, OS-CON (SMD) 16 V 330 16mΩ4700mA 10 ×12,6 1 1 ~ 2 B ≥1(10) 16SVP330M
AVX, Tantalum
TPM Multianode 10 V 330 23mΩ3000mA 7,3×4,3×4,1 N/R(9) 1 ~ 3 C ≥2(10) TPME337M010R0035
TPS Series III (SMD) 10 V 330 40mΩ1830mA 7,3×4,3×4,1 N/R(9) 1 ~ 6 N/R(13) TPSE337M010R0040 (VO≤5V)(14)
TPS Series III (SMD) 4 V 1000 25mΩ2400mA 7,3×6,1×3.5 N/R(9) 1 ~ 5 N/R(13) TPSV108K004R0035 (VO≤2.1V)(14)
Kemet, Poly-Tantalum
T520 (SMD) 10 V 330 25mΩ2600mA 7,3×4,3×4,1 N/R(9) 1 ~ 3 C ≥2(10) T520X337M010ASE025(11)
T530 (SMD) 6.3 V 330 15mΩ3800mA 7,3×4,3×4,1 N/R(9) 2 ~ 3 B ≥2(10) T530X337M010ASE015(11)
T530 (SMD) 4 V 680 5mΩ7300mA 7,3×4,3×4,1 N/R(9) N/R(12) B≥1(10) T530X687M004ASE005 (VO≤3.5V)(11)
T530 (SMD) 2.5 V 1000 5mΩ7300mA 7,3×4,3×4,1 N/R(9) N/R(12) B≥1(10) T530X108M2R5ASE005 (VO≤2.0V)(11)
Vishay-Sprague
597D, Tantalum (SMD) 10 V 330 35mΩ2500mA 7,3×5,7×4,1 N/R(9) 1 ~ 5 N/R(13) 597D337X010E2T
94SA, OS-CON (Radial) 16 V 470 20mΩ6080mA 12 ×22 1 1 ~ 3 C ≥2(10) 94SA477X0016GBP
94SVP OS-CON(SMD) 16 V 330 17mΩ4500mA 10 ×12,7 2 2 ~ 3 C ≥1(10) 94SVP337X06F12
Kemet, Ceramic X5R 16 V 10 2mΩ – 3225 1 ≥1(15) A(10) C1210C106M4PAC
(SMD) 6.3 V 47 2mΩN/R(9) ≥1(15) A(10) C1210C476K9PAC
Murata, Ceramic X5R 6.3 V 100 2mΩ – 3225 N/R(9) ≥1(15) A(10) GRM32ER60J107M
(SMD) 6.3 V 47 N/R(9) ≥1(15) A(10) GRM32ER60J476M
25 V 22 1 ≥1(15) A(10) GRM32ER61E226K
16 V 10 1 ≥1(15) A(10) GRM32DR61C106K
TDK, Ceramic X5R 6.3 V 100 2mΩ – 3225 N/R(9) ≥1(15) A(10) C3225X5R0J107MT
(SMD) 6.3 V 47 N/R(9) ≥1(15) A(10) C3225X5R0J476MT
16 V 10 1 ≥1(15) A(10) C3225X5R1C106MT0
16 V 22 1 ≥1(15) A(10) C3225X5R1C226MT
(9) N/R –Not recommended. The voltage rating does not meet the minimum operating limits.
(10) Required capacitors with TurboTrans. See the TurboTrans Application information for Capacitor Selection
Capacitor Types:
(a) Type A = (100 <capacitance ×ESR ≤1000)
(b) Type B = (1,000 <capacitance ×ESR ≤5,000)
(c) Type C = (5,000 <capacitance ×ESR ≤10,000)
(11) The voltage rating of this capacitor only allows it to be used for output voltage that is equal to or less than 80% of the working voltage.
(12) N/R –Not recommended. The ESR value of this capacitor is below the required minimum when not using TurboTrans.
(13) Aluminum Electrolytic capacitor not recommended for the TurboTrans due to higher ESR ×capacitance products. Aluminum and higher
ESR capacitors can be used in conjunction with lower ESR capacitance.
(14) The voltage rating of this capacitor only allows it to be used for output voltage that is equal to or less than 50% of the working voltage.
(15) Any combination of ceramic capacitor values is limited as listed in the Electrical Characteristics table.
Copyright ©2005–2011, Texas Instruments Incorporated 17
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
TURBOTRANS
TurboTrans™Technology
TurboTrans technology is a feature introduced in the T2 generation of the PTH/PTV family of power modules.
TurboTrans optimizes the transient response of the regulator with added external capacitance using a single
external resistor. Benefits of this technology include reduced output capacitance, minimized output voltage
deviation following a load transient, and enhanced stability when using ultra-low ESR output capacitors. The
amount of output capacitance required to meet a target output voltage deviation will be reduced with TurboTrans
activated. Likewise, for a given amount of output capacitance, with TurboTrans engaged, the amplitude of the
voltage deviation following a load transient will be reduced. Applications requiring tight transient voltage
tolerances and minimized capacitor footprint area will benefit greatly from this technology.
TurboTrans™Selection
Using TurboTrans requires connecting a resistor, RTT, between the +Sense pin (pin 5) and the TurboTrans pin
(pin 8). The value of the resistor directly corresponds to the amount of output capacitance required. All T2
products require a minimum value of output capacitance whether or not TurboTrans is used. For the
PTH08T230W, the minimum required capacitance is 200 μF. When using TurboTrans, capacitors with a
capacitance ×ESR product below 10,000 μF×mΩare required. (Multiply the capacitance (in μF) by the ESR (in
mΩ) to determine the capacitance ×ESR product.) See the Capacitor Selection section of the datasheet for a
variety of capacitors that meet this criteria.
Figure 12 through Figure 17 show the amount of output capacitance required to meet a desired transient voltage
deviation with and without TurboTrans for several capacitor types; Type A (e.g. ceramic), Type B (e.g.
polymer-tantalum), and Type C (e.g. OS-CON). To calculate the proper value of RTT, first determine your
required transient voltage deviation limits and magnitude of your transient load step. Next, determine what type
of output capacitors will be used. (If more than one type of output capacitor is used, select the capacitor type that
makes up the majority of your total output capacitance). Knowing this information, use the chart in Figure 12
through Figure 17 that corresponds to the capacitor type selected. To use the chart, begin by dividing the
maximum voltage deviation limit (in mV) by the magnitude of your load step (in Amps). This gives a mV/A value.
Find this value on the Y-axis of the appropriate chart. Read across the graph to the 'With TurboTrans' plot. From
this point, read down to the X-axis which lists the minimum required capacitance, CO, to meet that transient
voltage deviation. The required RTT resistor value can then be calculated using the equation or selected from the
TurboTrans table. The TurboTrans tables include both the required output capacitance and the corresponding
RTT values to meet several values of transient voltage deviation for 25% (1.5 A), 50% (3 A), and 75% (4.5 A)
output load steps.
The chart can also be used to determine the achievable transient voltage deviation for a given amount of output
capacitance. Selecting the amount of output capacitance along the X-axis, reading up to the 'With TurboTrans'
curve, and then over to the Y-axis, gives the transient voltage deviation limit for that value of output capacitance.
The required RTT resistor value can be calculated using the equation or selected from the TurboTrans table.
As an example, let's look at a 12-V application requiring a 45 mV deviation during an 3 A, 50% load transient. A
majority of 330 μF, 10 mΩouput capacitors are used. Use the 12 V, Type B capacitor chart, Figure 14. Dividing
45 mV by 3 A gives 15 mV/A transient voltage deviation per amp of transient load step. Select 15 mV/A on the
Y-axis and read across to the 'With TurboTrans' plot. Following this point down to the X-axis gives us a minimum
required output capacitance of approximately 850 μF. The required RTT resistor value for 850 μF can then be
calculated or selected from Table 5. The required RTT resistor is 1.82 kΩ.
To see the benefit of TurboTrans, follow the 15 mV/A marking across to the 'Without TurboTrans' plot. Following
that point down shows that you would need a minimum of 4000 μF of output capacitance to meet the same
transient deviation limit. This is the benefit of TurboTrans. A typical TurboTrans schematic is shown in Figure 18.
18 Copyright ©2005–2011, Texas Instruments Incorporated
C − Capacitance − µF
Transient − mV/A
20
10
9
8
7
30
4000
3000
2000
1000
500
400
300
200
5000
900
600
700
800
100
40
PTH08T231 Type A
Ceramic Capacitors
Without TurboTrans
With TurboTrans
C − Capacitance − µF
Transient − mV/A
20
10
9
8
7
30
4000
3000
2000
1000
500
400
300
200
5000
900
600
700
800
100
40
PTH08T231 Type A
Ceramic Capacitors
Without TurboTrans
With TurboTrans
RTT =40x 1-(C /1000)
O
5 x(C /1000)-1
O
(k )W
[]
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
PTH08T231W Type A Capacitors
12-V INPUT 5-V INPUT
Figure 12. Capacitor Type A, 100 ≤C(μF) x Figure 13. Capacitor Type A, 100 ≤C(μF) x
ESR(mΩ)≤1000 ESR(mΩ)≤1000
(e.g. Ceramic) (e.g. Ceramic)
Table 4. Type A TurboTrans COValues and Required RTT Selection Table
Transient Voltage Deviation (mV) 12 V Input 5 V Input
CORTT CORTT
25% load step 50% load step 75% load step Minimum Required Minimum Required
(1.5 A) (3 A) (4.5 A) Required Output TurboTrans Required Output TurboTrans
Capacitance (μF) Resistor (kΩ) Capacitance (μF) Resistor (kΩ)
45 90 135 200 open 200 open
40 80 120 240 150 210 634
35 70 105 300 56.2 260 97.6
30 60 90 400 23.7 340 37.4
25 50 75 560 9.76 460 16.5
20 40 60 840 2.0 660 5.9
15 30 45 N/A N/A 1450 short
RTT Resistor Selection
The TurboTrans resistor value, RTT can be determined from the TurboTrans programming equation:
(2)
Where COis the total output capacitance in μF. COvalues greater than or equal to 1000 μF require RTT to be
a short, 0 Ω.
To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The
value of RTT must be calculated using the minimum required output capacitance determined from the
capacitor transient response charts above.
Copyright ©2005–2011, Texas Instruments Incorporated 19
C − Capacitance − µF
Transient − mV/A
1000
500
400
300
200
600
700
100
5000
4000
3000
2000
10000
6000
20
10
9
8
7
30
40
50
60
Without TurboTrans
With TurboTrans
C − Capacitance − µF
Transient − mV/A
1000
500
400
300
200
600
700
100
5000
4000
3000
2000
10000
6000
20
10
9
8
7
30
40
50
60
Without TurboTrans
With TurboTrans
RTT =40x 1-(C /1000)
O
5 x(C /1000)-1
O
(k )W
[]
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
PTH08T230W Type B Capacitors
12-V INPUT 5-V INPUT
Figure 14. Capacitor Type B, 1000 <C(μF) x Figure 15. Capacitor Type B, 1000 <C(μF) x
ESR(mΩ)≤5000 ESR(mΩ)≤5000
(e.g. Polymer-Tantalum) (e.g. Polymer-Tantalum)
Table 5. Type B TurboTrans COValues and Required RTT Selection Table
Transient Voltage Deviation (mV) 12 V Input 5 V Input
CORTT CORTT
25% load step 50% load step 75% load step Minimum Required Minimum Required
(1.5 A) (3 A) (4.5 A) Required Output TurboTrans Required Output TurboTrans
Capacitance (μF) Resistor (kΩ) Capacitance (μF) Resistor (kΩ)
75 150 225 200 open 200 open
60 120 180 260 100 270 82.5
50 100 150 320 45.3 330 41.2
40 80 120 420 21.0 430 19.6
30 60 90 600 8.06 610 7.68
25 50 75 740 3.83 760 3.40
20 40 60 980 0.205 1000 short
15 30 45 3800 short 4500 short
RTT Resistor Selection
The TurboTrans resistor value, RTT can be determined from the TurboTrans programming equation:
(3)
Where COis the total output capacitance in μF. COvalues greater than or equal to 1000 μF require RTT to be
a short, 0 Ω.
To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The
value of RTT must be calculated using the minimum required output capacitance determined from the
capacitor transient response charts above.
20 Copyright ©2005–2011, Texas Instruments Incorporated
C − Capacitance − µF
Transient − mV/A
1000
500
400
300
200
600
700
100
5000
4000
3000
2000
10000
6000
20
10
9
8
7
30
40
50
60
Without TurboTrans
With TurboTrans
C − Capacitance − µF
Transient − mV/A
1000
500
400
300
200
600
700
100
5000
4000
3000
2000
10000
6000
20
10
9
8
7
30
40
50
60
Without TurboTrans
With TurboTrans
RTT =40x 1-(C /1000)
O
5 x(C /1000)-1
O
(k )W
[]
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
PTH08T230W Type C Capacitors
12-V INPUT 5-V INPUT
Figure 16. Capacitor Type C, 5000 <C(μF) x Figure 17. Capacitor Type C, 5000 <C(μF) x
ESR(mΩ)≤10,000 ESR(mΩ)≤10,000
(e.g. OS-CON) (e.g. OS-CON)
Table 6. Type C TurboTrans COValues and Required RTT Selection Table
Transient Voltage Deviation (mV) 12 V Input 5 V Input
CORTT CORTT
25% load step 50% load step 75% load step Minimum Required Minimum Required
(1.5 A) (3 A) (4.5 A) Required Output TurboTrans Required Output TurboTrans
Capacitance (μF) Resistor (kΩ) Capacitance (μF) Resistor (kΩ)
75 150 225 200 open 200 open
60 120 180 230 205 250 121
50 100 150 300 56.2 310 49.9
40 80 120 390 25.5 400 24.3
30 60 90 570 9.31 580 8.87
25 50 75 720 4.32 730 4.12
20 40 60 960 0.422 980 0.205
15 30 45 3100 short 4000 short
RTT Resistor Selection
The TurboTrans resistor value, RTT can be determined from the TurboTrans programming equation:
(4)
Where COis the total output capacitance in μF. COvalues greater than or equal to 1000 μF require RTT to be
a short, 0 Ω.
To ensure stability, a minimum amount of output capacitance is required for a given RTT resistor value. The
value of RTT must be calculated using the minimum required output capacitance determined from the
capacitor transient response charts above.
Copyright ©2005–2011, Texas Instruments Incorporated 21
PTH08T230W
AutoTrack
GND
GND GND
VoAdj
TT +Sense
+Sense
−Sense
−Sense
INH/UVLO
SYNC
C 1
200 F
(Required)
O
m
Ceramic
C
330 F
(Required)
I
m
VO
VO
VI
VI
C 2
O
1200 F
TypeB
m
R
0k
TT
W
R
1%
SET
0.05W
TurboTransTM
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
A. The value of RTT must be calculated using the total value of output capacitance.
Figure 18. Typical TurboTrans Schematic
22 Copyright ©2005–2011, Texas Instruments Incorporated
RUVLO =
70.74-VTHD
V -4.26
THD
kW
Inhibit/
UVLO Prog
GND
PTH08T230W
3
2
10
+
GND
RUVLO
VI
VI
CI
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
UNDERVOLTAGE LOCKOUT (UVLO)
The PTH08T230/231W power modules incorporate an input undervoltage lockout (UVLO). The UVLO feature
prevents the operation of the module until there is sufficient input voltage to produce a valid output voltage. This
enables the module to provide a clean, monotonic powerup for the load circuit, and also limits the magnitude of
current drawn from the regulator’s input source during the power-up sequence.
The UVLO characteristic is defined by the ON threshold (VTHD) voltage. Below the ON threshold, the Inhibit
control is overridden, and the module does not produce an output. The hysteresis voltage, which is the difference
between the ON and OFF threshold voltages, is set at 500 mV. The hysteresis prevents start-up oscillations,
which can occur if the input voltage droops slightly when the module begins drawing current from the input
source.
The UVLO feature of the PTH08T230/231W module allows for limited adjustment of the ON threshold voltage.
The adjustment is made via the Inhibit/UVLO control pin (pin 10) using a single resistor (see Figure 19). When
pin 10 is left open circuit, the ON threshold voltage is internally set to its default value, which is 4.3 V. The ON
threshold might need to be raised if the module is powered from a tightly regulated 12-V bus. Adjusting the
threshold prevents the module from operating if the input bus fails to completely rise to its specified regulation
voltage.
Threshold Adjust
Equation 5 determines the value of RUVLO required to adjust VTHD to a new value. The default value is 4.3 V, and
it may be adjusted, but only to a higher value.
(5)
Calculated Values
Table 7 shows a chart of standard resistor values for RUVLO for different values of the ON threshold (VTHD)
voltage.
Table 7. Standard RUVLO values for Various VTHD values
VTHD (V) 5.0 5.5 6.0 6.5 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0
RUVLO (kΩ)88.7 52.3 37.4 28.7 23.2 19.6 16.9 14.7 13.0 11.8 10.5 9.76 8.87
Figure 19. UVLO Implementation
Copyright ©2005–2011, Texas Instruments Incorporated 23
t-Time=4ms/div
I (2 A/div)
I
V (5V/div)
I
V (2V/div)
O
PTH08T230W
Track
GND
GND
3
2
CI
VI
VI
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
Soft-Start Power Up
The Auto-Track feature allows the power-up of multiple PTH/PTV modules to be directly controlled from the
Track pin. However in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track
pin should be directly connected to the input voltage, VI(see Figure 20).
Figure 20. Defeating the Auto-Track Function Figure 21. Power-Up Waveform
When the Track pin is connected to the input voltage the Auto-Track function is permanently disengaged. This
allows the module to power up entirely under the control of its internal soft-start circuitry. When power up is
under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate. From the
moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically 2 ms–10 ms)
before allowing the output voltage to rise. The output then progressively rises to the module’s setpoint voltage.
Figure 21 shows the soft-start power-up characteristic of the PTH08T230W operating from a 12-V input bus and
configured for a 3.3-V output. The waveforms were measured with a 6-A constant current load and the
Auto-Track feature disabled. The initial rise in input current when the input voltage first starts to rise is the charge
current drawn by the input capacitors. Power-up is complete within 20 ms.
Overcurrent Protection
For protection against load faults, all modules incorporate output overcurrent protection. Applying a load that
exceeds the regulator's overcurrent threshold causes the regulated output to shut down. Following shutdown, a
module periodically attempts to recover by initiating a soft-start power-up. This is described as a hiccup mode of
operation, whereby the module continues in a cycle of successive shutdown and power up until the load fault is
removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is
removed, the module automatically recovers and returns to normal operation.
Overtemperature Protection (OTP)
A thermal shutdown mechanism protects the module’s internal circuitry against excessively high temperatures. A
rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. If the
internal temperature exceeds the OTP threshold, the module’s Inhibit control is internally pulled low. This turns
the output off. The output voltage drops as the external output capacitors are discharged by the load circuit. The
recovery is automatic, and begins with a soft-start power up. It occurs when the sensed temperature decreases
by about 10°C below the trip point.
The overtemperature protection is a last resort mechanism to prevent thermal stress to the regulator.
Operation at or close to the thermal shutdown temperature is not recommended and reduces the long-term
reliability of the module. Always operate the regulator within the specified safe operating area (SOA) limits for
the worst-case conditions of ambient temperature and airflow.
24 Copyright ©2005–2011, Texas Instruments Incorporated
PTH08T230W
GND
GND
3
10
Q1
BSS138
1=Inhibit
Inhibit/
UVLO
CI
VI
VI2
t-Time=4ms/div
I (1 A/div)
I
V (2V/div)
O
V (2V/div)
INH
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
Output On/Off Inhibit
For applications requiring output voltage on/off control, the PTH08T230/231W incorporates an output Inhibit
control pin. The inhibit feature can be used wherever there is a requirement for the output voltage from the
regulator to be turned off.
The power modules function normally when the Inhibit pin is left open-circuit, providing a regulated output
whenever a valid source voltage is connected to VIwith respect to GND.
Figure 22 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit input
has its own internal pull-up. An external pull-up should never be connected to the inhibit pin. The input is not
compatible with TTL logic devices. An open-collector (or open-drain) discrete transistor is recommended for
control.
Figure 22. On/Off Inhibit Control Circuit Figure 23. Power-Up Response from Inhibit Control
Turning Q1 on applies a low voltage to the Inhibit control pin and disables the output of the module. If Q1 is then
turned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within 15
ms. Figure 23 shows the typical rise in both the output voltage and input current, following the turn-off of Q1. The
turn off of Q1 corresponds to the rise in the waveform, VINH. The waveforms were measured with a 6-A constant
current load.
Remote Sense
Differential remote sense improves the load regulation performance of the module by allowing it to compensate
for any IR voltage drop between its output and the load in either the positive or return path. An IR drop is caused
by the output current flowing through the small amount of pin and trace resistance. Connecting the +Sense (pin
5) and –Sense (pin 6) pins to the respective positive and ground reference of the load terminals improves the
load regulation of the output voltage at the connection points.
With the sense pins connected at the load, the difference between the voltage measured directly between the VO
and GND pins, and that measured at the Sense pins, is the amount of IR drop being compensated by the
regulator. This should be limited to a maximum of 300 mV.
If the remote sense feature is not used at the load, connect the +Sense pin to VO(pin 4) and connect the –Sense
pin to the module GND (pin 3).
The remote sense feature is not designed to compensate for the forward drop of nonlinear or frequency
dependent components that may be placed in series with the converter output. Examples include OR-ing
diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense
connection they are effectively placed inside the regulation control loop, which can adversely affect the
stability of the regulator.
Copyright ©2005–2011, Texas Instruments Incorporated 25
VO
VI
INH/UVLO -Sense
GND
GND
Track SYNC TT
VoAdj
C 2
330 F
I
m
C 2
200 F
O
m
R 2
SET
V =5V
I
V 1
O
V 2
O
PTH08T240W
VCC
GND
f =2xf
clock modules
CLK
CLR
SN74LVC2G74
0o
PRE
D
Q
Q
180o
+Sense
GND
C 1
200 F
O
m
R 1
SET
C 1
330 F
I
m
VO
VI
INH/UVLO -Sense
GND
Track SYNC TT
VoAdj
PTH08T230W
+Sense
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
Smart Sync
Smart Sync is a feature that allows multiple power modules to be synchronized to a common frequency. Driving
the Smart Sync pins with an external oscillator set to the desired frequency, synchronizes all connected modules
to the selected frequency. The synchronization frequency can be higher or lower than the nominal switching
frequency of the modules within the range of 240 kHz to 400 kHz (see Electrical Specifications table for
frequency limits). Synchronizing modules powered from the same bus, eliminates beat frequencies reflected back
to the input supply, and also reduces EMI filtering requirements. These are the benefits of Smart Sync. Power
modules can also be synchronized out of phase to minimize source current loading and minimize input
capacitance requirements. Figure 24 shows a standard circuit with two modules syncronized 180°out of phase
using a D flip-flop.
Figure 24. Typical SmartSync Circuit
26 Copyright ©2005–2011, Texas Instruments Incorporated
0.7 1.3 2.1 2.51.7 2.31.91.50.9 1.1
5
6
8
9
11
12
14
15
13
10
7
VI– Input Voltage – V
VO– Output Voltage – V
Meets VORipple
Specification
Increased VORipple
fSW = 300 kHz
0.7 1.3 2.1 2.51.7 2.31.91.50.9 1.1
5
6
8
9
11
12
14
15
13
10
7
VI– Input Voltage – V
VO– Output Voltage – V
fSW = 400 kHz
fSW = 350 kHz
fSW = 300 kHz
fSW = 240 kHz
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
Smart Sync Considerations
Operating the PTH08T230W with a low duty cycle may increase the output voltage ripple due to pulse skipping
of the PWM controller. When operating at the nominal switching frequency, input voltages greater than (VO×11)
may cause the output voltage ripple to increase (typically 2×).
Synchronizing to a higher frequency and operating with a low duty cycle may impact output voltage ripple. When
operating at 300 kHz, Figure 25 shows the operating region where the output voltage ripple meets the electrical
specifications and the operating region where the output voltage ripple may increase. Figure 26 shows the
operating regions for several switching frequencies. For example, a module operating at 400 kHz and an output
voltage of 1.2 V, the maximum input voltage that meets the output voltage ripple specification is 10 V. Exceeding
10 V may cause in an increase in output voltage ripple. As shown in Figure 26, operating below 6 V allows
operation down to the minimum output voltage over the entire synchronization frequency range without affecting
the output voltage ripple. See the ELECTRICAL CHARACTERISTICS table for the synchronization frequency
range limits.
Figure 25. VORipple Regions at 300 kHz Figure 26. VORipple Regions
A. For Figure 25, operation above a given curve may cause the output voltage ripple to increase (typically 2×).
B. For Figure 25, when operating at the nominal switching frequency refer to the 300 kHz plot.
Auto-Track™Function
The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track
was designed to simplify the amount of circuitry required to make the output voltage from each module power up
and power down in sequence. The sequencing of two or more supply voltages during power up is a common
requirement for complex mixed-signal applications that use dual-voltage VLSI devices such as the TMS320™
DSP family, microprocessors, and ASICs.
How Auto-Track™Works
Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin (1).
This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage is
raised above the set-point voltage, the module output remains at its set-point (2). As an example, if the Track pin
of a 2.5-V regulator is at 1 V, the regulated output is 1 V. If the voltage at the Track pin rises to 3 V, the regulated
output does not go higher than 2.5 V.
When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a
Copyright ©2005–2011, Texas Instruments Incorporated 27
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow
a common signal during power up and power down. The control signal can be an externally generated master
ramp waveform, or the output voltage from another power supply circuit (3). For convenience, the Track input
incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable rising
waveform at power up.
Typical Auto-Track™Application
The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track
compliant modules. Connecting the Track inputs of two or more modules forces their track input to follow the
same collective RC-ramp waveform, and allows their power-up sequence to be coordinated from a common
Track control signal. This can be an open-collector (or open-drain) device, such as a power-up reset voltage
supervisor device. See U3 in Figure 27.
To coordinate a power-up sequence, the Track control must first be pulled to ground potential. This should be
done at or before input power is applied to the modules. The ground signal should be maintained for at least
20 ms after input power has been applied. This brief period gives the modules time to complete their internal
soft-start initialization (4), enabling them to produce an output voltage. A low-cost supply voltage supervisor
device, that includes a built-in time delay, is an ideal component for automatically controlling the Track inputs at
power up.
Figure 27 shows how the TL7712A supply voltage supervisor device (U3) can be used to coordinate the
sequenced power up of PTH08T230/231W modules. The output of the TL7712A supervisor becomes active
above an input voltage of 3.6 V, enabling it to assert a ground signal to the common track control well before the
input voltage has reached the module's undervoltage lockout threshold. The ground signal is maintained until
approximately 28 ms after the input voltage has risen above U3's voltage threshold, which is 10.95 V. The 28-ms
time period is controlled by the capacitor C3. The value of 2.2 µF provides sufficient time delay for the modules
to complete their internal soft-start initialization. The output voltage of each module remains at zero until the track
control voltage is allowed to rise. When U3 removes the ground signal, the track control voltage automatically
rises. This causes the output voltage of each module to rise simultaneously with the other modules, until each
reaches its respective set-point voltage.
Figure 28 shows the output voltage waveforms after input voltage is applied to the circuit. The waveforms, VO1
and VO2, represent the output voltages from the two power modules, U1 (3.3 V) and U2 (1.8 V), respectively.
VTRK, VO1, and VO2 are shown rising together to produce the desired simultaneous power-up characteristic.
The same circuit also provides a power-down sequence. When the input voltage falls below U3's voltage
threshold, the ground signal is re-applied to the common track control. This pulls the track inputs to zero volts,
forcing the output of each module to follow, as shown in Figure 29. Power down is normally complete before the
input voltage has fallen below the modules' undervoltage lockout. This is an important constraint. Once the
modules recognize that an input voltage is no longer present, their outputs can no longer follow the voltage
applied at their track input. During a power-down sequence, the fall in the output voltage from the modules is
limited by the Auto-Track slew rate capability.
Notes on Use of Auto-Track™
1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module
regulates at its adjusted set-point voltage.
2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp
speeds of up to 1 V/ms.
3. The absolute maximum voltage that may be applied to the Track pin is the input voltage VI.
4. The module cannot follow a voltage at its track control input until it has completed its soft-start initialization.
This takes about 20 ms from the time that a valid voltage has been applied to its input. During this period, it
is recommended that the Track pin be held at ground potential.
5. The Auto-Track function is disabled by connecting the Track pin to the input voltage (VI). When Auto-Track is
disabled, the output voltage rises at a quicker and more linear rate after input power has been applied.
28 Copyright ©2005–2011, Texas Instruments Incorporated
V =12V
I
+
TL7712A
VCC
GND
SENSE
RESIN
REF
CT
RESET
RESET
8
7
2
1
3
5
6
4RRST
10kW
U2
U3
+
PTH08T210W
PTH08T230W
VI
VI
VO
VO
Inhibit/
UVLOProg
Inhibit/
UVLOProg
+Sense
+Sense
–Sense
–Sense
GND
GND
AutoTrack
VoAdj
VoAdj
TurboTrans
RTT
VO1=3.3V
VO2=1.8V
CO1
CI1
RSET1
1.21kW
Smart
Sync
CREF
0.1 Fm
CT
2.2 Fm
U1
AutoTrack TurboTrans
RTT
CO2
CI2
RSET2
4.75kW
t-Time=20ms/div
V 1(1V/div)
O
V 2(1V/div)
O
V (1V/div)
TRK
t-Time=400 s/divm
V 1(1V/div)
O
V 2(1V/div)
O
V (1V/div)
TRK
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
Figure 27. Sequenced Power Up and Power Down Using Auto-Track
Figure 28. Simultaneous Power Up With Figure 29. Simultaneous Power Down With
Auto-Track Control Auto-Track Control
Copyright ©2005–2011, Texas Instruments Incorporated 29
t-Time=4ms/div
V (1V/div)
O
I (2 A/div)
O
V (1V/div)
IN
PTH08T230W, PTH08T231W
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
www.ti.com
Prebias Startup Capability
A prebias startup condition occurs as a result of an external voltage being present at the output of a power
module prior to its output becoming active. This often occurs in complex digital systems when current from
another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another
path might be via clamp diodes as part of a dual-supply power-up sequencing arrangement. A prebias can cause
problems with power modules that incorporate synchronous rectifiers. This is because under most operating
conditions, these types of modules can sink as well as source output current.
The PTH family of power modules incorporate synchronous rectifiers, but does not sink current during startup(1),
or whenever the Inhibit pin is held low. However, to ensure satisfactory operation of this function, certain
conditions must be maintained(2).Figure 31 shows an application demonstrating the prebias startup capability.
The startup waveforms are shown in Figure 30. Note that the output current (IO) is negligible until the output
voltage rises above the voltage backfed through the intrinsic diodes.
The prebias start-up feature is not compatible with Auto-Track. When the module is under Auto-Track control, it
sinks current if the output voltage is below that of a back-feeding source. To ensure a pre-bias hold-off one of
two approaches must be followed when input power is applied to the module. The Auto-Track function must
either be disabled(3), or the module’s output held off (for at least 50 ms) using the Inhibit pin. Either approach
ensures that the Track pin voltage is above the set-point voltage at start up.
1. Startup includes the short delay (approximately 10 ms) prior to the output voltage rising, followed by the rise
of the output voltage under the module’s internal soft-start control. Startup is complete when the output
voltage has risen to either the set-point voltage or the voltage at the Track pin, whichever is lowest.
2. To ensure that the regulator does not sink current when power is first applied (even with a ground signal
applied to the Inhibit control pin), the input voltage must always be greater than the output voltage throughout
the power-up and power-down sequence.
3. The Auto-Track function can be disabled at power up by immediately applying a voltage to the module’s
Track pin that is greater than its set-point voltage. This can be easily accomplished by connecting the Track
pin to VI.
Figure 30. Prebias Startup Waveforms
30 Copyright ©2005–2011, Texas Instruments Incorporated
ASIC
+
Vo=2.5V
3.3V
VI=5V
R
2.37kW
SET
VCORE VCCIO
Io
PTH08T230W
Track
VIVO
GNDInhibit Vadj
+Sense
C
330 Fm
I
+
C
200 Fm
O
-Sense
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
Figure 31. Application Circuit Demonstrating Prebias Startup
Copyright ©2005–2011, Texas Instruments Incorporated 31
PTH08T230W, PTH08T231W
www.ti.com
SLTS265L –NOVEMBER 2005–REVISED AUGUST 2011
REVISION HISTORY
Changes from Revision J (JUNE 2009) to Revision K Page
•Changed from: "When using the PTH08T231W without the TurboTrans feature, the maximum amount of
capacitance is TBD μF of ceramic type."to: "When using the PTH08T231W without the TurboTrans feature, the
maximum amount of capacitance is 5000 μF of ceramic type."......................................................................................... 15
REVISION HISTORY
Changes from Revision K (JUNE 2010) to Revision L Page
•Changed made Figure 25 viewable .................................................................................................................................... 27
•Changed made Figure 26 viewable .................................................................................................................................... 27
Copyright ©2005–2011, Texas Instruments Incorporated 33
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
PTH08T230WAD ACTIVE Through-
Hole Module ECL 10 36 Pb-Free (RoHS) SN N / A for Pkg Type
PTH08T230WAS ACTIVE Surface
Mount Module ECM 10 36 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS
PTH08T230WAST ACTIVE Surface
Mount Module ECM 10 250 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS
PTH08T230WAZ ACTIVE Surface
Mount Module BCM 10 36 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR
PTH08T230WAZT ACTIVE Surface
Mount Module BCM 10 250 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR
PTH08T231WAD ACTIVE Through-
Hole Module ECL 10 36 Pb-Free (RoHS) SN N / A for Pkg Type
PTH08T231WAS ACTIVE Surface
Mount Module ECM 10 36 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS
PTH08T231WAST ACTIVE Surface
Mount Module ECM 10 250 TBD SNPB Level-1-235C-UNLIM/
Level-3-260C-168HRS
PTH08T231WAZ ACTIVE Surface
Mount Module BCM 10 36 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR
PTH08T231WAZT ACTIVE Surface
Mount Module BCM 10 250 Pb-Free (RoHS) SNAGCU Level-3-260C-168 HR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2011
Addendum-Page 2
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
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