16

24 K

QM

™ T

AT A GLANCE

C slave mode (100kHz), or parallel output via external shift registers

QMatrix™ technology employs transverse charge-transfer sensing electrode

designs which can be made very compact and are easily wired. Charge is

forced from an emitting electrode into the overlying panel dielectric, and then

collected on a receiver electrode which directs the charge into a sampling

capacitor which is then converted directly to digital form without the use of

Keys are configured in a matrix format that minimizes the number of required

scan lines and device pins. The key electrodes can be designed into a

conventional Printed Circuit Board (PCB) or Flexible Printed Circuit Board

(FPCB) as a copper pattern, or as printed conductive ink on plastic film.

1 Overvie

The Cs should be connected as shown in Figure 2.7, page 9.

The value of these capacitors is not critical but 4.7nF is

recommended for most cases. They should be 10 percent

X7R ceramics. If the transverse capacitive coupling from X to

Y is large enough the voltage on a Cs capacitor can saturate,

destroying gain. In such cases the burst length should be

reduced and/or the Cs value increased. See Section 2.4.

If a Y line is not used its corresponding Cs capacitor may be

omitted and the pins left floating.

introduces a strong thermal coefficient which can cause

'phantom' detection. The cause of this is either from the burst

length being too long, the Cs value being too small, or the

X-Y transfer coupling being too large. Solutions include

loosening up the key structure interleaving, more separation

of the X and Y lines on the PCB, increasing Cs, and

decreasing the burst length.

Increasing Cs will make the part slower; decreasing burst

length will make it less sensitive. A better PCB layout and a

looser key structure (up to a point) have no negative effects.

but in this case the distortion is caused by excessive stray

capacitance coupling from the Y line to AC ground; for

ground trace, ground plane, or other traces. The excess

coupling causes the charge-transfer effect to dissipate a

significant portion of the received charge from a key into the

stray capacitance. This phenomenon is more subtle; it can be

what the waveform does as it descends towards and below

-0.25V. The waveform will appear deceptively straight, but it

affect conversion time.

Unused Y lines should be left open.

single-slope ADC conversion of the acquired charge on each

Cs capacitor. These resistors directly control acquisition gain;

larger values of Rs will proportionately increase signal gain.

For most applications Rs should be 1M✡. Unused Y lines do

not require an Rs resistor.

artificially boost the signal values, and induce signal

X-to-Y trace coupling.

QmBtn software is available free of charge on Quantum’s

website www.qprox.com.

The signal swing from the smallest finger touch should

The X and Y matrix scan lines can use series resistors

(referred to as Rx and Ry respectively) for improved EMC

and thus reduce RF emissions. Typical values range from

.

Y lines need Ry to reduce EMC susceptibility problems and in

frequency interference problems (above 20MHz) as the trace

lengths between the components and the chip start to act as

RF antennae.

The upper limits of Rx and Ry are reached when the signal

level and hence key sensitivity are clearly reduced. The limits

of Rx and Ry will depend on key geometry and stray

capacitance, and thus an oscilloscope is required to

determine optimum values of both.

Dwell time is the duration in which charge coupled from X to

be reduced (by a layout change, for example by reducing X

line exposure to nearby ground planes or traces), or, the Rx

resistor needs to be reduced in value (or a combination of

both approaches).

Waveforms With a Coin Figure 2.6 Recommended Key Structure

One way to determine X line settling time is to monitor the

fields using a patch of metal foil or a small coin over the key

(Figure 2.5). Only one key along a particular X line needs to

be observed, as each of the keys along that X line will be

In almost all cases, Ry should be set equal to Rx, which will

ensure that the charge on the Y line is fully captured into the

Cs capacitor.

The actual internal pattern style is not as important as the

need to achieve regular X and Y widths and spacings of

sufficient size to cover the desired graphical key area or a

little bit more; ~3mm oversize is acceptable in most cases,

since the key’s electric fields drop off near the edges anyway.

100mm x 100mm but these are not hard limits. The keys can

be any shape including round, rectangular, square, etc. The

Ground planes, if used, should be placed under or around the

QT chip itself and the associated resistors and capacitors in

the circuit, under or around the power supply, and back to a

connector, but nowhere else.

A single ceramic 0.1uF bypass capacitor, with short traces,

should be placed very close to supply pins 3, 4, 5 and 6 of the

IC. Failure to do so can result in device oscillation, high

current consumption, erratic operation etc. Pins 18, 20, and

21 do not require bypassing.

spreading RF emissions. This feature is hard-wired into the

device and cannot be disabled or modified.

Spread spectrum is configured as a frequency chirp over a

wide range of frequencies for robust operation.

See also Section 6.5, page 18.

The devices feature a detection integration mechanism, which

acts to confirm a detection in a robust fashion. A per-key

counter is incremented each time the key has exceeded its

threshold and stayed there for a number of acquisitions.

signal is not seen to exceed the threshold level, the counter is

cleared and the process has to start from the beginning.

two such counters for each key. These can be thought of as

‘inner loop’ and ‘outer loop’ confirmation counters.

The ‘inner’ counter is referred to as the ‘fast-DI’; this acts to

attempt to confirm a detection via rapid successive

acquisition bursts, at the expense of delaying the sampling of

the next key. Each key has its own fast-DI counter and limit

value; these limits can be changed via the Setups block on a

a per-key basis. If a normal-DI counter reaches its terminal

count, the corresponding key is declared to be touched and

becomes ‘active’. Note that the normal-DI can only be

slowly, whereas the fast-DI is incremented ‘on the spot’

without interruption.

The net effect of this mechanism is a multiplication of the

inner and outer counters and hence a highly noise-resistance

sensing method. If the inner limit is set to 5, and the outer to

3, the net effect is 5x3=15 successive threshold crossings to

the part will sleep before automatically awakening can be

configured.

A new communication with the device while it is asleep will

cause it to wake up, service the communication and scan the

matrix. At least one full matrix scan is always performed after

waking up and before returning to sleep.

At the end of each matrix scan, the part will return to sleep

unless recent activity demands further attention. If there has

been recent activity, the part will perform another complete

matrix scan and then attempt to sleep once again. This

If Unused, Connect To...CommentsI/OFunctionPin

See Table 2.2 for further connection information.

Suggested regulator manufacturers:

• Toko (XC6215 series)

• Seiko (S817 series)

A transmission consists of a START condition, an SLA+R/W,

one or more data packets and a STOP condition. The

wired-ANDing of the SCL line is used to implement

extends the SCL low period by pulling the SCL line low

whenever it needs extra time for processing between the data

(7 to 12 counts of threshold; 4 is internally added to

NTHR to generate the threshold).

Positive threshold levels are all fixed at six counts of signal

and cannot be modified.

Signals can drift because of changes in Cx and Cs over

time and temperature. It is crucial that such drift be

compensated, else false detections and sensitivity shifts

can occur.

reference level track the raw signal at a slow rate, but only

while there is no detection in effect. The rate of adjustment

body acts to absorb charge from the cross-coupling

between X and Y lines. An isolated, untouched foreign

object (a coin, or a water film) will cause the signal to rise

very slightly due to an enhancement of coupling. This is

contrary to the way most capacitive sensors operate.

Once a finger is sensed, the drift compensation

mechanism ceases since the signal is legitimately

detecting an object. Drift compensation only works when

threshold level.

(2.5s / count of drift compensation)

(0.4 to 0.8 seconds per count of drift compensation;

translation via LUT, page )

(0.6s / count of drift compensation)

device has no knowledge of which keys are actually

suppression causes detections on that key to be

suppressed if any other AKS-enabled key in the panel has

a more negative signal deviation from its reference.

This feature does not account for varying key gains (burst

setting for the key. If AKS-enabled keys in a panel have

different sizes, it may be necessary to reduce the gains of

larger keys relative to smaller ones to equalize the effects

of AKS. The signal threshold of the larger keys can be

altered to compensate for this without causing problems

with key suppression.

Adjacent key suppression works to augment the natural

moisture suppression of narrow gated transfer switches

creating a more robust sensing method.

AKS Default value: 0 (Off)

observing signals clearly on an oscilloscope for a particular

burst is very difficult.

This function is supported in Quantum’s QmBtn PC

SSYNC Default value: 0 (Off)

External fields can cause interference leading to false

power sources. RFI noise sources are heavily suppressed

parameter MSYNC in Setups.

The synchronization occurs only at the burst for the lowest

numbered enabled key in the matrix. The device waits for

a preceding full matrix scan, then when a negative

its entirety again.

The sync signal drive should be a buffered logic signal, or

perhaps a diode-clamped signal, but never a raw AC signal

In Shift Register mode, the WAKE function is enabled for

all keys, however the CHANGE pin does not function in

this mode. The AWAKE timeout in Shift Register mode is

has been a key state change on a key with the WAKE

feature enabled (Section 6.13), in which case the part will

wake up into ‘fast mode’ which has no sleep states and

operates at the fastest possible speed. The AWAKE

timeout feature determines how long the device will remain

in this mode from the last key state change.

Subsequent key state changes further prolong the AWAKE

interval. In other words, once the part has been awakened

by a change on a WAKE enabled key, the key response

time will be fast for as long as the keyboard remains in

AWAKE Timeout accuracy: to within ±50ms

Drift Hold Time (DHT) is used to restrict drift on all keys

while one or more keys are activated. DHT defines the

length of time the drift is halted after a key detection.

This feature is particularly useful in cases of high-density

keypads where touching a key or hovering a finger over the

keypad would cause untouched keys to drift, and therefore

create a sensitivity shift, and ultimately inhibit any touch

C interface. The setups block is memory mapped onto this interface. Thus each setup can be accessed by

reading/writing the appropriate address. Setups can be accessed individually or as a block. Before writing to any setup, an unlock code (value 0x55) must be written to the

Idd Typical (mA)