FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator Features Description 6A Output Current The FAN2106 TinyBuckTM is a highly efficient, smallfootprint, constant-frequency, 6A, integrated synchronous buck regulator. Fully Synchronous Operation with Integrated Schottky Diode on Low-Side MOSFET Boosts Efficiency Wide Input Range: 3V - 24V Output Voltage Range: 0.8V to 80% VIN Over 95% Peak Efficiency 1% Reference Accuracy Over Temperature Programmable Frequency Operation: 200KHz to 600KHz Internal Bootstrap Diode 5x6mm, 25-Pin, 3-Pad MLP Package Internal Soft-Start Power-Good Signal Starts on Pre-Biased Outputs Accepts Ceramic Capacitors on Output External Compensation for Flexible Design Programmable Current Limit Under-Voltage, Over-Voltage, and Thermal Protections Applications Servers & Telecom Graphics Cards & Displays Computing Systems Point-of-Load Regulation Set-Top Boxes & Game Consoles The FAN2106 contains both synchronous MOSFETs and a controller/driver with optimized interconnects in one package, which enables designers to solve highcurrent requirements in a small area with minimal external components. Integration helps to minimize critical inductances, making component layout simpler and more efficient compared to discrete solutions. The FAN2106 provides for external loop compensation, programmable switching frequency, and current limit. These features allow design flexibility and optimization. High-frequency operation allows for all-ceramic solutions. The summing current-mode modulator uses lossless current sensing for current feedback and over-current protection. Voltage feedforward helps operation over a wide input voltage range. Fairchild's advanced BiCMOS power process, combined with low-RDS(ON) internal MOSFETs and a thermally efficient MLP package, provide the ability to dissipate high power in a small package. Output over-voltage, under-voltage, over-current, and thermal shutdown protections help protect the device from damage during fault conditions. FAN2106 prevents pre-biased output discharge during startup in point-of-load applications. Related Resources AN-8022 -- TinyCalcTM Calculator User Guide TinyCalcTM Calculator Design Tool Ordering Information Part Number Operating Temperature Range FAN2106MPX -10C to 85C Molded Leadless Package (MLP) 5x6mm Tape and Reel FAN2106EMPX -40C to 85C Molded Leadless Package (MLP) 5x6mm Tape and Reel (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1 Package Packing Method www.fairchildsemi.com FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator September 2011 Figure 1. Typical Application Block Diagram FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator Typical Application Diagram Figure 2. Block Diagram (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1 www.fairchildsemi.com 2 Figure 3. MLP 5x6mm Pin Configuration (Bottom View) Pin Definitions Pin # Name P1, 6-12 SW Description Switching Node. Junction of high-side and low-side MOSFETs. P2, 2-5 VIN P3, 21-23 PGND Power Ground. Power return and Q2 source. 1 BOOT High-Side Drive BOOT Voltage. Connect through capacitor (CBOOT) to SW. The IC includes an internal synchronous bootstrap diode to recharge the capacitor on this pin to VCC when SW is LOW. 13 PGOOD 14 EN ENABLE. Enables operation when pulled to logic HIGH or left open. Toggling EN resets the regulator after a latched fault condition. This input has an internal pull-up when the IC is functioning normally. When a latched fault occurs, EN is discharged by a current sink. 15 VCC Input Bias Supply for IC. The IC's logic and analog circuitry are powered from this pin. This pin should be decoupled to AGND through a >1F X5R/X7R capacitor. 16 AGND 17 ILIM Current Limit. A resistor (RILIM) from this pin to AGND can be used to program the currentlimit trip threshold lower than the default setting. 18 R(T) Oscillator Frequency. A resistor (RT) from this pin to AGND sets the PWM switching frequency. 19 FB Output Voltage Feedback. Connect through a resistor divider to the output voltage. 20 COMP 24 NC 25 RAMP Power Input Voltage. Connect to the main input power source. Power-Good Flag. An open-drain output that pulls LOW when FB is outside the limits specified in electrical specs. PGOOD does not assert HIGH until the fault latch is enabled. Analog Ground. The signal ground for the IC. All internal control voltages are referred to this pin. Tie this pin to the ground island/plane through the lowest impedance connection. FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator Pin Configuration Compensation. Error amplifier output. Connect the external compensation network between this pin and FB. No Connect. This pin is not used. Ramp Amplitude. A resistor (RRAMP) connected from this pin to VIN sets the ramp amplitude and provides voltage feedforward functionality. (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1 www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Parameter Conditions Min. VIN to PGND VCC to AGND AGND = PGND BOOT to PGND 28 V 6 V 35 V 6.0 V Continuous -0.5 24.0 Transient (t < 20ns, f < 600KHz) -5.0 30.0 -0.3 VCC+0.3 All other pins ESD Unit -0.3 BOOT to SW SW to PGND Max. Human Body Model, JEDEC JESD22-A114 2.0 Charged Device Model, JEDEC JESD22-C101 2.5 V V kV Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter Conditions Min. Typ. Max. Unit 5.0 5.5 V V VCC Bias Voltage VCC to AGND 4.5 VIN Supply Voltage VIN to PGND 3 24 TA Ambient Temperature FAN2106MPX -10 +85 FAN2106EMPX -40 +85 TJ Junction Temperature fSW Switching Frequency 200 C +125 C 600 KHz Max. Unit +150 C +300 C Thermal Information Symbol TSTG Parameter Storage Temperature TL Lead Soldering Temperature, 10 Seconds JC Thermal Resistance: Junction-to-Case J-PCB PD Min. Typ. -65 P1 (Q2) 4 P2 (Q1) 7 P3 4 Thermal Resistance: Junction-to-Mounting Surface C/W 35(1) C/W (1) Power Dissipation, TA = 25C FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator Absolute Maximum Ratings 2.8 W Note: 1. Typical thermal resistance when mounted on a four-layer, two-ounce PCB, as shown in Figure 26. Actual results are dependent on mounting method and surface related to the design. (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1 www.fairchildsemi.com 4 Electrical specifications are the result of using the circuit shown in Figure 1 with VIN = 12V, unless otherwise noted. Parameter Conditions Min. Typ. Max. Unit SW = Open, FB = 0.7V, VCC = 5V, fSW = 600KHz 8 12 mA Shutdown: EN = 0, VCC = 5V 7 10 A 4.3 4.5 V Power Supplies VCC Current Rising VCC VCC UVLO Threshold 4.1 Hysteresis 300 mV Oscillator Frequency RT = 50K 255 300 345 KHz RT = 24K 540 600 660 KHz 50 65 ns (2) Minimum On-Time Ramp Amplitude, Peak-to-Peak 16VIN, 1.8VOUT, RT = 30K, RRAMP = 200K 0.53 Minimum Off-Time(2) V 100 150 ns Reference Reference Voltage (VFB)(3) FAN2106MPX, TA = 25C 794 800 806 mV FAN2106EMPX, TA = 25C 795 800 805 mV 80 85 dB 12 15 MHz Error Amplifier DC Gain(2) (2) Gain Bandwidth Product VCC = 5V Output Voltage (VCOMP) 0.4 3.2 V Output Current, Sourcing VCC = 5V, VCOMP = 2.2V 1.5 2.2 mA Output Current, Sinking VCC = 5V, VCOMP = 1.2V 0.8 1.2 mA FB Bias Current VFB = 0.8V, TA = 25C -850 -650 -450 nA 6 8 10 A -10 -9 A Protection and Shutdown Current Limit RILIM Open, fSW = 500KHz, VOUT = 1.8V, RRAMP = 200K16 Consecutive Cycles ILIM Current VCC = 5V, TA = 25C Over-Temperature Shutdown Over-Temperature Hysteresis -11 Internal IC Temperature +155 C +30 C Over-Voltage Threshold 2 Consecutive Clock Cycles 110 115 120 %VOUT Under-Voltage Shutdown 16 Consecutive Clock Cycles 68 73 78 %VOUT Fault Discharge Threshold Measured at FB Pin 250 mV Fault Discharge Hysteresis Measured at FB Pin (VFB ~500mV) 250 mV 5.3 ms 6.7 ms FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator Electrical Specifications Soft-Start VOUT to Regulation (T0.8) Fault Enable/SSOK (T1.0) Frequency = 600KHz Continued on the following page... (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1 www.fairchildsemi.com 5 Electrical specifications are the result of using the circuit shown in Figure 1 with VIN= 12V, unless otherwise noted. Parameter Conditions Min. Typ. Max. Unit 2.00 V Control Functions EN Threshold, Rising VCC = 5V 1.35 EN Hysteresis VCC = 5V 250 mV EN Pull-Up Resistance VCC = 5V 800 K EN Discharge Current Auto-Restart Mode, VCC = 5V 1 A FB OK Drive Resistance 800 PGOOD Threshold (Compared to VREF) FB < VREF, 2 Consecutive Clock Cycles -14 -11 -8 %VREF FB > VREF, 2 Consecutive Clock Cycles +7 +10 +13 %VREF PGOOD Output Low IOUT < 2mA 0.4 V Note: 2. Specifications guaranteed by design and characterization; not production tested. 3. See Figure 4 for Temperature Coefficient (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1 FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator Electrical Specifications (Continued) www.fairchildsemi.com 6 1.20 1.005 1.10 I FB V FB 1.010 1.000 0.995 1.00 0.90 0.990 0.80 -50 0 50 100 150 -50 0 Temperature (oC) Figure 4. Reference Voltage (VFB) vs. Temperature, Normalized 150 1.02 1200 1.01 Frequency Frequency (KHz) 100 Figure 5. Reference Bias Current (IFB) vs. Temperature, Normalized 1500 900 600 600KHz 1.00 300KHz 0.99 300 0.98 0 0 20 40 60 80 100 120 -50 140 0 RT (K) 50 100 150 o Temperature ( C) Figure 6. Frequency vs. RT Figure 7. Frequency vs. Temperature, Normalized 1.04 1.60 1.40 1.02 1.20 I ILIM RDS 50 Temperature (oC) 1.00 1.00 o Q1 ~0.32 %/ C 0.80 0.98 Q2 ~0.35 %/oC 0.96 0.60 -50 0 50 100 150 -50 50 100 150 o o Temperature ( C) Temperature ( C) Figure 9. Figure 8. RDS vs. Temperature, Normalized (VCC = VGS = 5V) (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1 0 FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator Typical Characteristics ILIM Current (IILIM) vs. Temperature, Normalized www.fairchildsemi.com 7 Figure 10. Application Circuit: 1.8VOUT, 500KHz Typical Performance Characteristics 100 1400 95 1200 Dissipation (mW) Efficiency (%) Typical operating characteristics using the circuit shown in Figure 10. VIN=12V, VCC=5V, unless otherwise specified. 90 85 8VIN 12VIN 18VIN 80 75 1000 8VIN 12VIN 18VIN 800 600 400 200 70 0 0 1 2 3 4 5 6 0 1 2 Load (A) 1.8VOUT Efficiency Over VIN vs. Load 100 95 95 90 85 VIN=12V 80 4 5 6 Figure 12. 1.8VOUT Dissipation Over VIN vs. Load 100 Efficiency (%) Efficiency (%) Figure 11. 3 Load (A) 300KHz 500KHz 700KHz 90 8VIN, 300KHz 85 12VIN, 500KHz 80 18VIN, 700KHz 75 75 FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator FAN2106 Application Circuit 70 70 0 1 2 3 4 5 0 6 Figure 13. 1.8VOUT Efficiency Over Frequency vs. Load (Circuit Value Changes) (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1 1 2 3 4 5 6 Load (A) Load (A) Figure 14. 3.3VOUT Efficiency vs. Load (Circuit Value Changes) www.fairchildsemi.com 8 Typical operating characteristics using the circuit shown in Figure 10. VIN=12V, VCC=5V, unless otherwise specified. VOUT VOUT SW SW Figure 15. SW and VOUT Ripple, 6A Load Figure 16. Startup with 1V Pre-Bias on VOUT VOUT EN IOUT SW Figure 17. Transient Response, 2-6A Load Figure 18. VOUT Re-Start on Fault VOUT PGOOD PGOOD EN FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator Typical Performance Characteristics (Continued) EN Figure 19. Startup, 3A Load (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1 Figure 20. Shutdown, 3A Load www.fairchildsemi.com 9 Soft-start time is a function of switching frequency. PWM Generation Refer to Figure 2 for the PWM control mechanism. FAN2106 uses the summing-mode method of control to generate the PWM pulses. An amplified current-sense signal is summed with an internally generated ramp and the combined signal is compared with the output of the error amplifier to generate the pulsewidth to drive the high-side MOSFET. Sensed current from the previous cycle is used to modulate the output of the summing block. The output of the summing block is also compared against a voltage threshold set by the RLIM resistor to limit the inductor current on a cycle-by-cycle basis. The RRAMP resistor helps set the charging current for the internal ramp and provides input voltage feedforward function. The controller facilitates external compensation for enhanced flexibility. EN 1.35V 2400 CLKs 0.8V FB Fault Latch Enable 1.0V 0.8V SS 3200 CLKs T0.8 Initialization 4000 CLKs Once VCC exceeds the UVLO threshold and EN is HIGH, the IC checks for a shorted FB pin before releasing the internal soft-start ramp (SS). T1.0 Figure 22. Soft-Start Timing Diagram If the parallel combination of R1 and RBIAS is 1K, the internal SS ramp is not released and the regulator does not start. Cycling VCC or the EN pin discharges the internal SS and resets the IC. In applications where external EN signal is used, VIN and VCC should be established before the EN signal comes up to prevent skipping the softstart function. Enable FAN2106 has an internal pull-up to the ENABLE (EN) pin so that the IC is enabled once VCC exceeds the UVLO threshold. Connecting a small capacitor across EN and AGND delays the rate of voltage rise on the EN pin. The EN pin also serves for the restart whenever a fault occurs (refer to the Auto-Restart section). If the regulator is enabled externally, the external EN signal should go HIGH only after VCC is established. For applications where such sequencing is required, FAN2106 can be enabled (after the VCC comes up) with external control, as shown in Figure 21. Startup on Pre-Bias The regulator does not allow the low-side MOSFET to operate in full synchronous rectification mode until internal SS ramp reaches 95% of VREF (~0.76V). This helps the regulator start on a pre-biased output and ensures that the pre-biased outputs are not discharged during soft-start. Protections The converter output is monitored and protected against extreme overload, short-circuit, over-voltage, undervoltage, and over-temperature conditions. Under-Voltage Shutdown If the voltage on the FB pin remains below the undervoltage threshold for 16 consecutive clock cycles, the fault latch is set and the converter shuts down. This protection is not active until the internal SS ramp reaches 1.0V during soft-start. Figure 21. Enabling with External Control Soft-Start Over-Voltage Protection Once internal SS ramp has charged to 0.8V (T0.8), the output voltage is in regulation. Until SS ramp reaches 1.0V (T1.0), the fault latch is inhibited. If voltage on the FB pin exceeds 115% of VREF for two consecutive clock cycles, the fault latch is set and shutdown occurs. To avoid skipping the soft-start cycle, it is necessary to apply VIN before VCC reaches its UVLO threshold. Normal sequence for powering up would be VINVCCEN. (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1 FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator Circuit Description A shorted high-side MOSFET condition is detected when SW voltage exceeds ~0.7V while the low-side www.fairchildsemi.com 10 Application Information The OV and high-side short fault protections are active all the time, including during soft-start. Bias Supply The FAN2106 requires a 5V supply rail to bias the IC and provide gate-drive energy. Connect a 1.0f X5R or X7R decoupling capacitor between VCC and PGND. Over-Temperature Protection (OTP) The chip incorporates an over-temperature protection circuit that sets the fault latch when a die temperature of about 150C is reached. The IC restarts when the die temperature falls below 125C. Since VCC is used to drive the internal MOSFET gates, supply current is frequency and voltage dependent. Approximate VCC current (ICC) can be calculated using: Auto-Restart ICC (mA ) 4.58 [( After a fault, EN pin is discharged by a 1A current sink to a 1.1V threshold before the internal 800K pull-up is restored. A new soft-start cycle begins when EN charges above 1.35V. Setting the Output Voltage The output voltage of the regulator can be set from 0.8V to 80% of VIN by an external resistor divider (R1 and RBIAS in Figure 1). For output voltages > 5V, output current rating may need to be de-rated depending upon the ambient temperature, power dissipated in the package and the PCB layout. Table 1. Fault / Restart Configurations Controller / Restart State The external resistor divider is calculated using: Pull to GND OFF (Disabled) No Restart - Latched OFF Pull-up to VCC with 100K (After VCC Comes Up) Open Immediate Restart After Fault New Soft-Start Cycle After: Cap. to GND tDELAY (ms)=3.9 * C(nf) V 0 .8 V 0. 8 V OUT 650nA RBIAS R1 (2) Connect RBIAS between FB and AGND. If R1 is open (see Figure 1), the output voltage is not regulated eventually causing a latched fault after the soft start is complete (T1.0) When EN is left open, restart is immediate. If the parallel combination of R1 and RBIAS is 1K, the internal SS ramp is not released and the regulator does not start. If auto-restart is not desired, tie the EN pin to the VCC pin or pull it HIGH after VCC comes up with a logic gate to keep the 1A current sink from discharging EN to 1.1V. Figure 23 shows one method to pull up EN to VCC for a latch configuration. Setting the Switching Frequency Switching frequency is determined by an external resistor, RT, connected between the R(T) pin and AGND: 15 VCC 100K (1) where frequency (f) is expressed in KHz. Depending on the external circuit, the FAN2106 can be configured to remain latched-off or to automatically restart after a fault. EN Pin VCC 5 0.013) ( f 128)] 227 FAN2106 R T ( K ) (10 6 / f ) 135 65 (3) where RT is in K and frequency (f) is in KHz. 14 EN The regulator cannot start if RT is left open. Calculating the Inductor Value 3.3n Figure 23. Typically the inductor value is chosen based on ripple current (IL), which is chosen between 10 to 35% of the maximum DC load. Regulator designs that require fast transient response use a higher ripple-current setting, while regulator designs that require higher efficiency keep ripple current on the low side and operate at a lower switching frequency. The inductor value is calculated by the following formula: Enable Control with Latch Option Power-Good (PGOOD) Signal PGOOD is an open-drain output that asserts LOW when VOUT is out of regulation, as measured at the FB pin. Thresholds are specified in the Electrical Specifications section. PGOOD does not assert HIGH until the fault latch is enabled (T1.0) (see Figure 22). (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1 FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator MOSFET is fully enhanced. The fault latch is set immediately upon detection. www.fairchildsemi.com 11 VOUT (1 - D) Lf RAMP Signal (4) VCOMP where f is the switching frequency. Setting the Ramp Resistor Value PW M VILIM RRAMP resistor plays a critical role in the design by providing charging current to the internal ramp capacitor and also serving as a means to provide input voltage feedforward. To Counter 10 A ILIM RILIM RRAMP is calculated by the following formula: RRAMP ( K ) (VIN 1.8) VOUT (18 ) VIN f 10 6 Figure 24. ILIM Network 2 (5) The ILIM pin can source a 10A current that can be used to establish a lower, temperature-dependent, current-limit threshold by connecting an external resistor (RILIM) to AGND. RILIM can be approximated with the equation: where frequency (f) is expressed in KHz. For wide input operation, first calculate RRAMP for the minimum and maximum input voltage conditions and use larger of the two values calculated. RILIM(K) 0.45 RDS (1 KT ) (IOUT In all applications, current through the RRAMP pin must be greater than 10A from the equation below for proper operation: VIN 1.8 10 A RRAMP 2 IL ) 142.5 2 (7) where: I is desired current limit set point in Amps; RDS is expressed in m; and KT is the normalized temperature coefficient of the lowside MOSFET (Q2) from Figure 8. Use 0.35 in equation. (6) If the calculated RRAMP values in Equation (5) result in a current less than 10A, use the RRAMP value that satisfies Equation (6). In applications with large input ripple voltage, the RRAMP resistor should be adequately decoupled from the input voltage to minimize ripple on the RAMP pin. After 16 consecutive, pulse-by-pulse, current-limit cycles, the fault latch is set and the regulator shuts down. Cycling VCC or EN restores operation after a normal soft-start cycle (refer to the Auto-Restart section). Setting the Current Limit The over-current protection fault latch is active during the soft-start cycle. Use 1% resistor for RILIM. There are two levels of current-limit thresholds. The first level of protection is through an internal default limit set at the factory to limit output current beyond normal usage levels. The second level of protection is set externally at the ILIM pin by connecting a resistor (RILIM) between ILIM and AGND. Current-limit protection is enabled whenever the lower of the two thresholds is reached (see Figure 24). FAN2106 uses its internal lowside MOSFET for current-sensing. The current-limit threshold voltage (VILIM) is compared to a scaled version of voltage drop across the low-side MOSFET sampled at the end of each PWM off-time/cycle. The internal default threshold (with ILIM open) is temperature compensated. Loop Compensation The loop is compensated using a feedback network around the error amplifier. Figure 25 shows a complete Type-3 compensation network. For Type-2 compensation, eliminate R3 and C3. For a given RILIM and RRAMP setting, the current limit point varies slightly in an inverse relationship with respect to input voltage (VIN). FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator IL Figure 25. Compensation Network Since the FAN2106 employs a summing current-mode architecture, Type-2 compensation can be used for many applications. For applications that require wide loop bandwidth and/or use very low-ESR output capacitors, Type-3 compensation may be required. (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1 www.fairchildsemi.com 12 Recommended PCB Layout Good PCB layout and careful attention to temperature rise is essential for reliable operation of the regulator. Four-layer PCB with two-ounce copper on the top and bottom sides and thermal vias connecting the layers are recommended. Keep power traces wide and short to minimize losses and ringing. Do not connect AGND to PGND below the IC. Connect the AGND pin to PGND at the output OR to the PGND plane. Application note AN-8022 (TinyCalcTM) can be used to calculate the compensation components. SW VIN GND GND VOUT Figure 26. Recommended PCB Layout (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1 FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator RRAMP also provides feedforward compensation for changes in VIN. With a fixed RRAMP value, the modulator gain increases as VIN is reduced; this could make it difficult to compensate the loop. For low-input-voltagerange designs (3V to 8V), RRAMP and the compensation component values are different compared to designs with VIN between 8V and 24V. www.fairchildsemi.com 13 2X TOP VIEW 2X RECOMMENDED LAND PATTERN ALL VALUES TYPICAL EXCEPT WHERE NOTED SIDE VIEW SEATING PLANE OPTIONAL LEAD DESIGN (LEADS# 1, 24 & 25 ONLY) SCALE: 1.5X A) DIMENSIONS ARE IN MILLIMETERS. B) DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) DESIGN BASED ON JEDEC MO-220 VARIATION WJHC E) TERMINALS ARE SYMMETRICAL AROUND THE X & Y AXIS EXCEPT WHERE DEPOPULATED. F) DRAWING FILENAME: MKT-MLP25AREV3 BOTTOM VIEW Figure 27. 5x6mm Molded Leadless Package (MLP) FAN2106 -- TinyBuckTM 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator Physical Dimensions Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1 www.fairchildsemi.com 14 FAN2106 -- TinyBuckTM 3-24V Input, 6A, High Efficiency, Integrated Synchronous Buck Regulator 15 www.fairchildsemi.com (c) 2009 Fairchild Semiconductor Corporation FAN2106 * Rev. 1.1.1