FAN2106MPX - Fairchild - Datasheet.Directory

September 2011

FAN2106 • Rev. 1.1.1

FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

FAN2106 — TinyBuck™

3-24V Input, 6A, High-Efficiency,

Integrated Synchronous Buck Regulator

Features

 6A Output Current

 Wide Input Range: 3V - 24V

 Output Voltage Range: 0.8V to 80% VIN

 Over 95% Peak Efficiency

 1% Reference Accuracy Over Temperature

 Programmable Frequency Operation: 200KHz to

600KHz

 Fully Synchronous Operation with Integrated

Schottky Diode on Low-Side MOSFET Boosts

Efficiency

 Internal Bootstrap Diode

 Internal Soft-Start

 Power-Good Signal

 Starts on Pre-Biased Outputs

 Accepts Ceramic Capacitors on Output

 External Compensation for Flexible Design

 Programmable Current Limit

 Under-Voltage, Over-Voltage, and Thermal

Protections

 5x6mm, 25-Pin, 3-Pad MLP Package

Applications

 Servers & Telecom

 Graphics Cards & Displays

 Computing Systems

 Point-of-Load Regulation

 Set-Top Boxes & Game Consoles

Description

The FAN2106 TinyBuck™ is a highly efficient, small-

footprint, constant-frequency, 6A, integrated

synchronous buck regulator.

The FAN2106 contains both synchronous MOSFETs

and a controller/driver with optimized interconnects in

one package, which enables designers to solve high-

current requirements in a small area with minimal

external components. Integration helps to minimize

critical inductances, making component layout simpler

and more efficient compared to discrete solutions.

The FAN2106 provides for external loop

compensation, programmable switching frequency,

and current limit. These features allow design

flexibility and optimization. High-frequency operation

allows for all-ceramic solutions.

The summing current-mode modulator uses lossless

current sensing for current feedback and over-current

protection. Voltage feedforward helps operation over a

wide input voltage range.

Fairchild’s advanced BiCMOS power process,

combined with low-RDS(ON) internal MOSFETs and a

thermally efficient MLP package, provide the ability to

dissipate high power in a small package.

Output over-voltage, under-voltage, over-current, and

thermal shutdown protections help protect the device

from damage during fault conditions. FAN2106

prevents pre-biased output discharge during startup in

point-of-load applications.

Related Resources

 AN-8022 — TinyCalc™ Calculator User Guide

 TinyCalc™ Calculator Design Tool

Ordering Information

Part Number Operating

Temperature Range Package Packing Method

FAN2106MPX -10°C to 85°C Molded Leadless Package (MLP) 5x6mm Tape and Reel

FAN2106EMPX -40°C to 85°C Molded Leadless Package (MLP) 5x6mm Tape and Reel

FAN2106 • Rev. 1.1.1 2

FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

Typical Application Diagram

Figure 1. Typical Application

Block Diagram

Figure 2. Block Diagram

FAN2106 • Rev. 1.1.1 3

FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

Pin Configuration

Figure 3. MLP 5x6mm Pin Configuration (Bottom View)

Pin Definitions

Pin # Name Description

P1, 6-12 SW Switching Node. Junction of high-side and low-side MOSFETs.

P2, 2-5 VIN Power Input Voltage. Connect to the main input power source.

P3, 21-23 PGND Pow er Ground. Power return and Q2 source.

1 BOOT

High-Side Drive BOOT Voltage. Connect through capacitor (CBOOT) to SW. The IC includes

an internal synchronous bootstrap diode to recharge the capacitor on this pin to VCC when

SW is LOW.

13 PGOOD

Power-Good Flag. An open-drain output that pulls LOW when FB is outside the limits

specified in electrical specs. PGOOD does not assert HIGH until the fault latch is enabled.

14 EN

ENABLE. Enables operation when pulled to logic HIGH or left open. Toggling EN resets the

regulator after a latched fault condition. This input has an internal pull-up when the IC is

functioning normally. When a latched fault occurs, EN is discharged by a current sink.

15 VCC

Input Bias Supply for IC. The IC’s logic and analog circuitry are powered from this pin. This

pin should be decoupled to AGND through a >1µF X5R/X7R capacitor.

16 AGND

Analog Ground. The signal ground for the IC. All internal control voltages are referred to

this pin. Tie this pin to the ground island/plane through the lowest impedance connection.

17 ILIM

Current Limit. A resistor (RILIM) from this pin to AGND can be used to program the current-

limit trip threshold lower than the default setting.

18 R(T)

Oscillator Frequency. A resistor (RT) from this pin to AGND sets the PWM switching

frequency.

19 FB

Output Voltage Feedb ack. Connect through a resistor divider to the output voltage.

20 COMP

Compensation. Error amplifier output. Connect the external compensation network between

this pin and FB.

24 NC

No Connect. This pin is not used.

25 RAMP

Ramp Amplitude. A resistor (RRAMP) connected from this pin to VIN sets the ramp amplitude

and provides voltage feedforward functionality.

FAN2106 • Rev. 1.1.1 4

FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be

operable above the recommended operating conditions and stressing the parts to these levels is not recommended.

In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.

The absolute maximum ratings are stress ratings only.

Parameter Conditions Min. Max. Unit

VIN to PGND 28 V

VCC to AGND AGND = PGND 6 V

BOOT to PGND 35 V

BOOT to SW -0.3 6.0 V

SW to PGND Continuous -0.5 24.0

Transient (t < 20ns, f < 600KHz) -5.0 30.0

All other pins -0.3 VCC+0.3 V

ESD Human Body Model, JEDEC JESD22-A114 2.0 kV

Charged Device Model, JEDEC JESD22-C101 2.5

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended

operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not

recommend exceeding them or designing to absolute maximum ratings.

Symbol Parameter Conditions Min. Typ. Max. Unit

VCC Bias Voltage VCC to AGND 4.5 5.0 5.5 V

VIN Supply Voltage VIN to PGND 3 24 V

TA Ambient Temperature FAN2106MPX -10 +85

°C

FAN2106EMPX -40 +85

TJ Junction Temperature +125 °C

fSW Switching Frequency 200 600 KHz

Thermal Information

Symbol Parameter Min. Typ. Max. Unit

TSTG Storage Temperature -65 +150 °C

TL Lead Soldering Temperature, 10 Seconds +300 °C

JC Thermal Resistance: Junction-to-Case P1 (Q2) 4 °C/W

P2 (Q1) 7

P3 4

J-PCB Thermal Resistance: Junction-to-Mounting Surface 35(1) °C/W

PD Power Dissipation, TA = 25°C 2.8(1) W

Note:

1. Typical thermal resistance when mounted on a four-layer, two-ounce PCB, as shown in Figure 26. Actual results

are dependent on mounting method and surface related to the design.

FAN2106 • Rev. 1.1.1 5

FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

Electrical Specifications

Electrical specifications are the result of using the circuit shown in Figure 1 with VIN = 12V, unless otherwise noted.

Parameter Conditions Min. Typ. Max. Unit

Pow er Supplies

VCC Current SW = Open, FB = 0.7V, VCC = 5V,

fSW = 600KHz 8 12 mA

Shutdown: EN = 0, VCC = 5V 7 10 µA

VCC UVLO Threshold Rising VCC 4.1 4.3 4.5 V

Hysteresis 300 mV

Oscillator

Frequency RT = 50K 255 300 345 KHz

RT = 24K 540 600 660 KHz

Minimum On-Time(2) 50 65 ns

Ramp Amplitude, Peak-to-Peak 16VIN, 1.8VOUT, RT = 30K,

RRAMP = 200K 0.53 V

Minimum Off-Time(2) 100 150 ns

Reference

Reference Voltage (VFB)(3) FAN2106MPX, TA = 25°C 794 800 806 mV

FAN2106EMPX, TA = 25°C 795 800 805 mV

Error Amplifier

DC Gain(2) VCC = 5V 80 85 dB

Gain Bandwidth Product(2) 12 15 MHz

Output Voltage (VCOMP) 0.4 3.2 V

Output Current, Sourcing VCC = 5V, VCOMP = 2.2V 1.5 2.2 mA

Output Current, Sinking VCC = 5V, VCOMP = 1.2V 0.8 1.2 mA

FB Bias Current VFB = 0.8V, TA = 25°C -850 -650 -450 nA

Protection and Shutdown

Current Limit RILIM Open, fSW = 500KHz, VOUT = 1.8V,

RRAMP = 200K16 Consecutive Cycles 6 8 10 A

ILIM Current VCC = 5V, TA = 25°C -11 -10 -9 µA

Over-Temperature Shutdown Internal IC Temperature +155 °C

Over-Temperature Hysteresis +30 °C

Over-Voltage Threshold 2 Consecutive Clock Cycles 110 115 120 %VOUT

Under-Voltage Shutdown 16 Consecutive Clock Cycles 68 73 78 %VOUT

Fault Discharge Threshold Measured at FB Pin 250 mV

Fault Discharge Hysteresis Measured at F B Pin (VFB ~500mV) 250 mV

Soft-Start

VOUT to Regulation (T0.8) Frequency = 600KHz 5.3 ms

Fault Enable/SSOK (T1.0) 6.7 ms

Continued on the following page…

FAN2106 • Rev. 1.1.1 6

FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

Electrical Specifications (Continued)

Electrical specifications are the result of using the circuit shown in Figure 1 with VIN= 12V, unless otherwise noted.

Parameter Conditions Min. Typ. Max. Unit

Control Functions

EN Threshold, Rising VCC = 5V 1.35 2.00 V

EN Hysteresis VCC = 5V 250 mV

EN Pull-Up Resistance VCC = 5V 800 K

EN Discharge Current Auto-Restart Mode, VCC = 5V 1 µA

FB OK Drive Resistance 800 

PGOOD Threshold

(Compared to VREF) FB < VREF, 2 Consecutive Clock Cycles -14 -11 -8 %VREF

FB > VREF, 2 Consecutive Clock Cycles +7 +10 +13 %VREF

PGOOD Output Low IOUT < 2mA 0.4 V

Note:

2. Specifications guaranteed by design and characterization; not production tested.

3. See Figure 4 for Temperature Coefficient

FAN2106 • Rev. 1.1.1 7

FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

Typical Characteristics

0.990

0.995

1.000

1.005

1.010

-50 0 50 100 150

Temperature (

V FB

0.80

0.90

1.00

1.10

1.20

-50 0 50 100 150

Temperature (

Figure 4. Referen ce Voltage (VFB) vs. Temperature,

Normalized Figure 5. Reference Bias Current (IFB) vs.

Temperature, Normalized

300

600

900

1200

1500

0 20 40 60 80 100 120 140

(K)

Frequenc y (KHz

)

0.98

0.99

1.00

1.01

1.02

-50 0 50 100 150

Temperature (oC)

Frequency

Figure 6. Frequency vs. RT Figure 7. Frequency vs. Temperature, Normalized

0.60

0.80

1.00

1.20

1.40

1.60

-50 0 50 100 15

Temperature (

0.96

0.98

1.00

1.02

1.04

-50 0 50 100 150

Temperature (

ILIM

Figure 8. RDS vs. Temperature, Normalized

(VCC = VGS = 5V)

Figure 9. ILIM Current (IILIM) vs. Temperature,

Normalized

Q1 ~0.32 %/oC

Q2 ~0.35 %/oC

300KHz

600KHz

FAN2106 • Rev. 1.1.1 8

FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

Application Circuit

Figure 10. Application Circuit: 1.8VOUT, 500KHz

Typical Performance Characteristics

Typical operating characteristics using the circuit shown in Figure 10. VIN=12V, VCC=5V, unless otherwise specified.

100

0123456

Load (A)

Ef f icien cy ( % )

200

400

600

800

1000

1200

1400

0123456

Load (A)

Dissipati o n (mW)

Figure 11. 1.8VOUT Efficiency Over VIN vs. Load Figure 12. 1.8VOUT Dissipation Over VIN vs. Load

100

0123456

Load (A)

Efficiency (%

)

100

0123456

Load (A)

Eff iciency ( %

)

Figure 13. 1.8VOUT Efficiency Over Frequency vs.

Load (Circuit Value Changes) Figure 14. 3.3VOUT Efficiency vs. Load

(Circuit Value Changes)

8VIN 12VIN 18VIN

300KHz 500KHz 700KHz

8VIN 12VIN 18VIN

VIN=12V 12VIN, 500KHz

8VIN, 300KHz

18VIN, 700KHz

FAN2106

FAN2106 • Rev. 1.1.1 9

FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

Typical Performance Characteristics (Continued)

Typical operating characteristics using the circuit shown in Figure 10. VIN=12V, VCC=5V, unless otherwise specified.

Figure 15. SW and VOUT Ripple, 6A Load Figure 16. Startup with 1V Pre-Bias on VOUT

Figure 17. Transient Response, 2-6A Load Figure 18. Re-Start on Fault

Figure 19. Startup, 3A Load Figure 20. Shutdow n, 3A Load

VOUT

IOUT SW

VOUT

PGOOD PGOOD

EN EN

VOUT VOUT

FAN2106 • Rev. 1.1.1 10

FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

Circuit Description

PWM Generation

Refer to Figure 2 for the PWM control mechanism.

FAN2106 uses the summing-mode method of control to

generate the PWM pulses. An amplified current-sense

signal is summed with an internally generated ramp and

the combined signal is compared with the output of the

error amplifier to generate the pulsewidth to drive the

high-side MOSFET. Sensed current from the previous

cycle is used to modulate the output of the summing

block. The output of the summing block is also

compared against a voltage threshold set by the RLIM

resistor to limit the inductor current on a cycle-by-cycle

basis. The RRAMP resistor helps set the charging current

for the internal ramp and provides input voltage feed-

forward function. The controller facilitates external

compensation for enhanced flexibility.

Initialization

Once VCC exceeds the UVLO threshold and EN is HIGH,

the IC checks for a shorted FB pin before releasing the

internal soft-start ramp (SS).

If the parallel combination of R1 and RBIAS is  1K, the

internal SS ramp is not released and the regulator does

not start.

Enable

FAN2106 has an internal pull-up to the ENABLE (EN)

pin so that the IC is enabled once VCC exceeds the

UVLO threshold. Connecting a small capacitor across

EN and AGND delays the rate of voltage rise on the EN

pin. The EN pin also serves for the restart whenever a

fault occurs (refer to the Auto-Restart section). If the

regulator is enabled externally, the external EN signal

should go HIGH only after VCC is established. For

applications where such sequencing is required,

FAN2106 can be enabled (after the VCC comes up) with

external control, as shown in Figure 21.

Figure 21. Enabling with External Control

Soft-Start

Once internal SS ramp has charged to 0.8V (T0.8), the

output voltage is in regulation. Until SS ramp reaches

1.0V (T1.0), the fault latch is inhibited.

To avoid skipping the soft-start cycle, it is necessary to

apply VIN before VCC reaches its UVLO threshold. Normal

sequence for powering up would be VINVCCEN.

Soft-start time is a function of switching frequency.

1.35V

0.8V

T0.8

T1.0

3200 CLKs

4000 CLKs

Fault

Latch

Enable

0.8V

1.0V

2400 CLKs

Figure 22. Soft-Start Timing Diagram

Cycling VCC or the EN pin discharges the internal SS

and resets the IC. In applications where external EN

signal is used, VIN and VCC should be established before

the EN signal comes up to prevent skipping the soft-

start function.

Startup on Pre-Bias

The regulator does not allow the low-side MOSFET to

operate in full synchronous rectification mode until

internal SS ramp reaches 95% of VREF (~0.76V). This

helps the regulator start on a pre-biased output and

ensures that the pre-biased outputs are not discharged

during soft-start.

Protections

The converter output is monitored and protected against

extreme overload, short-circuit, over-voltage, under-

voltage, and over-temperature conditions.

Under-Voltage Shutdown

If the voltage on the FB pin remains below the under-

voltage threshold for 16 consecutive clock cycles, the

fault latch is set and the converter shuts down. This

protection is not active until the internal SS ramp

reaches 1.0V during soft-start.

Over-Voltage Protection

If voltage on the FB pin exceeds 115% of VREF for two

consecutive clock cycles, the fault latch is set and

shutdown occurs.

A shorted high-side MOSFET condition is detected

when SW voltage exceeds ~0.7V while the low-side

FAN2106 • Rev. 1.1.1 11

FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

MOSFET is fully enhanced. The fault latch is set

immediately upon detection.

The OV and high-side short fault protections are active

all the time, including during soft-start.

Over-Temperature Protection (OTP)

The chip incorporates an over-temperature protection

circuit that sets the fault latch when a die temperature of

about 150°C is reached. The IC restarts when the die

temperature falls below 125°C.

Auto-Restart

After a fault, EN pin is discharged by a 1µA current sink

to a 1.1V threshold before the internal 800K pull-up is

restored. A new soft-start cycle begins when EN

charges above 1.35V.

Depending on the external circuit, the FAN2106 can be

configured to remain latched-off or to automatically

restart after a fault.

Table 1. Fault / Restart Configurations

EN Pin Controller / Restart State

Pull to GND OFF (Disabled)

Pull-up to VCC with 100K No Restart – Latched OFF

(After VCC Comes Up)

Open Immediate Restart After Fault

Cap. to GND New Soft-Start Cycle After:

tDELAY (ms)=3.9 • C(nf)

When EN is left open, restart is immediate.

If auto-restart is not desired, tie the EN pin to the VCC

pin or pull it HIGH after VCC comes up with a logic gate

to keep the 1µA current sink from discharging EN to

1.1V. Figure 23 shows one method to pull up EN to VCC

for a latch configuration.

FAN2106

100K

VCC

3.3n

Figure 23. Enable Control with Latch Option

Power-Good (PGOOD) Signal

PGOOD is an open-drain output that asserts LOW when

VOUT is out of regulation, as measured at the FB pin.

Thresholds are specified in the Electrical Specifications

section. PGOOD does not assert HIGH until the fault

latch is enabled (T1.0) (see Figure 22).

Application Information

Bias Supply

The FAN2106 requires a 5V supply rail to bias the IC

and provide gate-drive energy. Connect a  1.0µf X5R

or X7R decoupling capacitor between VCC and PGND.

Since VCC is used to drive the internal MOSFET gates,

supply current is frequency and voltage dependent.

Approximate VCC current (ICC) can be calculated using:

)]128f()013.0

2275V

[(58.4I CC

)mA(

CC 



 (1)

where frequency (f) is expressed in KHz.

Setting the Output Voltage

The output voltage of the regulator can be set from 0.8V

to 80% of VIN by an external resistor divider (R1 and

RBIAS in Figure 1). For output voltages > 5V, output

current rating may need to be de-rated depending upon

the ambient temperature, power dissipated in the

package and the PCB layout.

The external resistor divider is calculated using:

nA650

1R V8.0V

RV8.0 OUT

BIAS 



 (2)

Connect RBIAS between FB and AGND.

If R1 is open (see Figure 1), the output voltage is not

regulated eventually causing a latched fault after the soft

start is complete (T1.0)

If the parallel combination of R1 and RBIAS is  1K, the

internal SS ramp is not released and the regulator does

not start.

Setting the Switching Frequency

Switching frequency is determined by an external resistor,

RT, connected betw een the R(T) pin and AGND:

65 135)f/10(

)K(

T



 (3)

where RT is in K and frequency (f) is in KHz.

The regulator cannot start if RT is left open.

Calculating the Inductor Value

Typically the inductor value is chosen based on ripple

current (IL), which is chosen between 10 to 35% of the

maximum DC load. Regulator designs that require fast

transient response use a higher ripple-current setting,

while regulator designs that require higher efficiency

keep ripple current on the low side and operate at a

lower switching frequency. The inductor value is

calculated by the following formula:

FAN2106 • Rev. 1.1.1 12

FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

fL D)-(1 V

I OUT

L



 (4)

where f is the switching frequency.

Setting the Ramp Resistor Value

RRAMP resistor plays a critical role in the design by

providing charging current to the internal ramp capacitor

and also serving as a means to provide input voltage

feedforward.

RRAMP is calculated by the following formula:

10)18( )8.1( 6

)( 







fV VV

RIN

OUTIN

KRAMP (5)

where frequency (f) is expressed in KHz.

For wide input operation, first calculate RRAMP for the

minimum and maximum input voltage conditions and

use larger of the two values calculated.

In all applications, current through the RRAMP pin must

be greater than 10µA from the equation below for proper

operation:

RAMP



8.1 



 (6)

If the calculated RRAMP values in Equation (5) result in a

current less than 10µA, use the RRAMP value that

satisfies Equation (6). In applications with large input

ripple voltage, the RRAMP resistor should be adequately

decoupled from the input voltage to minimize ripple on

the RAMP pin.

Setting the Current Limit

There are two levels of current-limit thresholds. The first

level of protection is through an internal default limit set

at the factory to limit output current beyond normal

usage levels. The second level of protection is set

externally at the ILIM pin by connecting a resistor (RILIM)

between ILIM and AGND. Current-limit protection is

enabled whenever the lower of the two thresholds is

reached (see Figure 24). FAN2106 uses its internal low-

side MOSFET for current-sensing. The current-limit

threshold voltage (VILIM) is compared to a scaled version

of voltage drop across the low-side MOSFET sampled

at the end of each PWM off-time/cycle. The internal

default threshold (with ILIM open) is temperature

compensated.

For a given RILIM and RRAMP setting, the current limit

point varies slightly in an inverse relationship with

respect to input voltage (VIN).

10µA

RAMP

Signal

VCOMP

VILIM

ILIM

PWM

Counter

Figure 24. ILIM Netw ork

The ILIM pin can source a 10µA current that can be

used to establish a lower, temperature-dependent,

current-limit threshold by connecting an external resistor

(RILIM) to AGND. RILIM can be approximated with the

equation:

5.142)()1(45.0

)( 





2 I

IKRR L

OUTTDSKILIM (7)

where:

I is desired current limit set point in Amps;

DS is expressed in m; and

KT is the normalized temperature coefficient of the low-

side MOSFET (Q2) from Figure 8. Use 0.35 in equation.

After 16 consecutive, pulse-by-pulse, current-limit

cycles, the fault latch is set and the regulator shuts

down. Cycling VCC or EN restores operation after a

normal soft-start cycle (refer to the Auto-Restart

section).

The over-current protection fault latch is active during

the soft-start cycle. Use 1% resistor for RILIM.

Loop Compensation

The loop is compensated using a feedback network

around the error amplifier. Figure 25 shows a complete

Type-3 compensation network. For Type-2

compensation, eliminate R3 and C3.

Figure 25. Compensation Netw ork

Since the FAN2106 employs a summing current-mode

architecture, Type-2 compensation can be used for

many applications. For applications that require wide

loop bandwidth and/or use very low-ESR output

capacitors, Type-3 compensation may be required.

FAN2106 • Rev. 1.1.1 13

FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

RRAMP also provides feedforward compensation for

changes in VIN. With a fixed RRAMP value, the modulator

gain increases as VIN is reduced; this could make it

difficult to compensate the loop. For low-input-voltage-

range designs (3V to 8V), RRAMP and the compensation

component values are different compared to designs

with VIN between 8V and 24V.

Application note AN-8022 (TinyCalc™) can be used to

calculate the compensation components.

Recommended PCB Layout

Good PCB layout and careful attention to temperature

rise is essential for reliable operation of the regulator.

Four-layer PCB with two-ounce copper on the top and

bottom sides and thermal vias connecting the layers are

recommended. Keep power traces wide and short to

minimize losses and ringing. Do not connect AGND to

PGND below the IC. Connect the AGND pin to PGND at

the output OR to the PGND plane.

GND

OUT

GND

Figure 26. Recommended PCB Layout

FAN2106 • Rev. 1.1.1 14

FAN2106 — TinyBuck™ 3-24V Input, 6A, High-Efficiency, Integrated Synchronous Buck Regulator

Physical Dimensions

A) DIMENSIONS ARE IN MILLIMETERS.

B) DIMENSIONS AND TOLERANCES PER

ASME Y14.5M, 1994

TOP VIEW

BOTTOM VIEW

RECOMMENDED LAND PATTERN

SIDE VIEW

SEATING

PLANE

C) DIMENSIONS DO NOT INCLUDE MOLD

FLASH OR BURRS.

F) DRAWING FILENAME: MKT-MLP25AREV3

D) DESIGN BASED ON JEDEC MO-220

VARIATION WJHC

ALL VALUES TYPICAL EXCEPT WHERE NOTED

E) TERMINALS ARE SYMMETRICAL AROUND THE

X & Y AXIS EXCEPT WHERE DEPOPULATED.

OPTIONAL LEAD DESIGN

(LEADS# 1, 24 & 25 ONLY)

SCALE: 1.5X

Figure 27. 5x6mm Molded Lead less Package (MLP)

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or

obt ain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide term s and conditions, specifically the

warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www.fairchildsemi.com/packaging/.

FAN2106 • Rev. 1.1.1 15

FAN2106 — TinyBuck™ 3-24V Input, 6A, High Efficiency, Integrated Synchronous Buck Regulator