VESD05A4A-HS4 www.vishay.com Vishay Semiconductors 4-Line (Quad) ESD Protection Diode Array in LLP1010-6L FEATURES 5 * Ultra compact LLP1010-6L package 4 * Low package height < 0.4 mm 6 * 4-line ESD protection (quad) * Low leakage current < 0.1 A 1 2 * Low load capacitance CD = 12 pF 3 * ESD-protection acc. IEC 61000-4-2 15 kV contact discharge 17 kV air discharge 20897 20896 * Surge current acc. IEC 6100-4-5 IPP > 2.5 A * Soldering can be checked by standard vision inspection. No X-ray necessary * Pin plating NiPdAu (e4) no whisker growth * Material categorization: For definitions of compliance please see www.vishay.com/doc?99912 Dot = pin 1 marking X = date code Y = type code (see table below) MARKING (example only) XY 20932 ORDERING INFORMATION ORDERING CODE TAPED UNITS PER REEL (8 mm TAPE ON 7" REEL) MINIMUM ORDER QUANTITY VESD05A4A-HS4-GS08 5000 5000 DEVICE NAME VESD05A4A-HS4 PACKAGE DATA DEVICE NAME PACKAGE NAME TYPE CODE WEIGHT MOLDING COMPOUND FLAMMABILITY RATING MOISTURE SENSITIVITY LEVEL SOLDERING CONDITIONS VESD05A4A-HS4 LLP1010-6L A 1.07 mg UL 94 V-0 MSL level 1 (according J-STD-020) 260 C/10 s at terminals Rev. 1.5, 04-Jun-12 Document Number: 81786 1 For technical questions, contact: ESDprotection@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VESD05A4A-HS4 www.vishay.com Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS TEST CONDITIONS PARAMETER Peak pulse current Peak pulse power SYMBOL BiAs-mode: each input (pin 1, 3 to 5) to ground (pin 2 and 6); acc. IEC 61000-4-5; tp = 8/20 s; single shot BiSy-mode: each input (pin 1, 3 to 5) to any other input pin. Pin 2 and 6 not connected. Acc. IEC 61000-4-5; tp = 8/20 s; single shot BiAs-mode: each input (pin 1, 3 to 5) to ground (pin 2 and 6); acc. IEC 61000-4-5; tp = 8/20 s; single shot BiSy-mode: each input (pin 1, 3 to 5) to any other input pin. Pin 2 and 6 not connected. Acc. IEC 61000-4-5; tp = 8/20 s; single shot Acc. IEC61000-4-2; 10 pulses BiAs-mode: each input (pin 1, 3 to 5) to ground (pin 2 and 6) ESD immunity Acc. IEC 61000-4-2 ; 10 pulses BiSy-mode: each input (pin 1, 3 to 5) to any other input pin. Pin 2 and 6 not connected. Contact discharge Air discharge Contact discharge Air discharge Junction temperature Operating temperature Storage temperature VALUE UNIT 2.5 A 2.5 A 30 W 33 W 15 kV 17 kV 15 kV 17 kV TJ - 40 to + 125 C TSTG - 55 to + 150 C IPPM PPP VESD VESD BiAs-MODE (4-LINE BIDIRECTIONAL ASYMMETRICAL PROTECTION MODE) With the VESD05A4A-HS4 up to 4 signal- or data-lines (L1 to L4) can be protected against voltage transients. With pin 2 and 6 connected to ground and pin 1, 3, 4 and 5 connected to a signal- or data-line which has to be protected. As long as the voltage level on the data- or signal-line is between 0 V (ground level) and the specified Maximum Reverse Working Voltage (VRWM) the protection diode between data line and ground offer a high isolation to the ground line. The protection device behaves like an open switch. As soon as any positive transient voltage signal exceeds the break through voltage level of the protection diode, the diode becomes conductive and shorts the transient current to ground. Now the protection device behaves like a closed switch. The Clamping Voltage (VC) is defined by the BReakthrough Voltage (VBR) level plus the voltage drop at the series impedance (resistance and inductance) of the protection device. Any negative transient signal will be clamped accordingly. The negative transient current is flowing in the forward direction of the protection diode. The low Forward Voltage (VF) clamps the negative transient close to the ground level. Due to the different clamping levels in forward and reverse direction the VESD05A4A-HS4 clamping behaviour is Bidirectional and Asymmetrical (BiAs). L4 L3 5 4 6 1 L1 2 3 L2 20898 Rev. 1.5, 04-Jun-12 Document Number: 81786 2 For technical questions, contact: ESDprotection@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VESD05A4A-HS4 www.vishay.com Vishay Semiconductors ELECTRICAL CHARACTERISTICS BiAs mode: each input (pin 1, 3, 4 and 5) to ground (pin 2 and/or 6) (Tamb = 25 C, unless otherwise specified) TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. MAX. UNIT Number of lines which can be protected Nchannel - - 4 lines Max. reverse working voltage VRWM - - 5 V Reverse voltage at IR = 0.1 A VR 5 - - V Reverse current PARAMETER Protection paths Reverse stand-off voltage at VRWM = 5 V IR - < 0.01 0.1 A Reverse breakdown voltage at IR = 1 mA VBR 6 - 8 V Reverse clamping voltage at IPP = 2.5 A VC - - 12 V Forward clamping voltage at IPP = 2.5 A VF at VR = 0 V; f = 1 MHz Capacitance CD at VR = 2.5 V; f = 1 MHz 2.5 V - 12 15 pF - 7.5 8.5 pF If a higher surge current or peak pulse current (IPP) is needed, some protection diodes in the VESD05A4A-HS4 can also be used in parallel in order to "multiply" the performance. If two diodes are switched in parallel you get * double surge power = double peak pulse current (2 x IPPM) * half of the line inductance = reduced clamping voltage * half of the line resistance = reduced clamping voltage * double line Capacitance (2 x CD) * double Reverse leakage current (2 x IR) 5 4 6 L1 1 2 L2 3 20900 Rev. 1.5, 04-Jun-12 Document Number: 81786 3 For technical questions, contact: ESDprotection@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VESD05A4A-HS4 www.vishay.com Vishay Semiconductors BiSy-MODE (3-LINE BIDIRECTIONAL SYMMETRICAL PROTECTION MODE) If a bipolar symmetrical protection device is needed the VESD05A4A-HS4 can also be used as a three-line protection device. Therefore three pins (example: pin 1, 3, and 5) has to be connected to the signal- or data-line (L1 to L3) and pin 3 to ground. Pin 2 and 6 must not be connected! Positive and negative voltage transients will be clamped in the same way. The clamping current from one data line through the VESD05A4A-HS4 to the ground passes one diode in forward direction and the other one in reverse direction. The Clamping Voltage (VC) is defined by the BReakthrough Voltage (VBR) level of one diode plus the forward voltage of the other diode plus the voltage drop at the series impedances (resistances and inductances) of the protection device. Due to the same clamping levels in positive and negative direction the VESD05A4A-HS4 voltage clamping behaviour is also Bidirectional and Symmetrical (BiSy). L1 L3 5 4 6 1 2 3 L2 20901 ELECTRICAL CHARACTERISTICS BiSy mode: pin 1, 3, 4 or 5 to any other pin (1, 3, 4 or 5) (pin 2 and 6 not connected) (Tamb = 25 C, unless otherwise specified) TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. MAX. UNIT Number of lines which can be protected Nchannel - - 3 lines Max. reverse working voltage VRWM - - 5.5 V Reverse voltage at IR = 0.1 A VR 5.5 - - V Reverse current A PARAMETER Protection paths Reverse stand-off voltage at VR = VRWM = 5.5 V IR - < 0.01 0.1 Reverse breakdown voltage at IR = 1 mA VBR 6.5 - 8.7 V Clamping voltage at IPP = 2.5 A VC - 11.5 13 V - 6 8 pF - 5 7 pF Capacitance Rev. 1.5, 04-Jun-12 at VR = 0 V; f = 1 MHz at VR = 2.5 V; f = 1 MHz CD Document Number: 81786 4 For technical questions, contact: ESDprotection@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VESD05A4A-HS4 www.vishay.com Vishay Semiconductors TYPICAL CHARACTERISTICS (Tamb = 25 C, unless otherwise specified) 100 8 s to 100 % 100 % 10 80 % 1 IF (mA) IPPM 60 % 20 s to 50 % 40 % 0.1 0.01 20 % 0% 0 10 20 30 40 Time (s) 20548 0.001 0.5 Fig. 1 - 8/20 s Peak Pulse Current Wave Form acc. IEC 61000-4-5 0.7 0.8 0.9 1 VF (V) Fig. 4 - Typical Forward Current IF vs. Forward Voltage VF 8 120 % Rise time = 0.7 ns to 1 ns 7 100 % 6 80 % 5 VR (V) Discharge Current IESD 0.6 20889 60 % 53 % 4 3 40 % 2 27 % 20 % 1 0% - 10 0 10 20 30 40 50 60 70 80 90 100 0 0.01 0.1 1 20890 20557 Fig. 2 - ESD Discharge Current Wave Form acc. IEC 61000-4-2 (330 /150 pF) 10 100 1000 10000 IR (A) Time (ns) Fig. 5 - Typical Reverse Voltage VR vs. Reverse Current IR 14 15 f = 1 MHz 12 10 BiAs-mode positive surge 10 8 VC (V) CD (pF) 5 6 0 VC BiSy-mode -5 BiSy-mode 4 Measured acc. IEC 61000-4-5 (8/20 s - wave form) negative surge - 10 2 0 - 15 0 20888 1 2 3 4 5 6 VR (V) Fig. 3 - Typical Capacitance CD vs. Reverse Voltage VR Rev. 1.5, 04-Jun-12 0 20891 1 2 3 IPP (A) Fig. 6 - Typical Peak Clamping Voltage VC vs. Peak Pulse Current IPP Document Number: 81786 5 For technical questions, contact: ESDprotection@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VESD05A4A-HS4 www.vishay.com Vishay Semiconductors 150 12 acc. IEC 61000-4-2 contact discharge 10 positive surge 100 positive discharge 8 50 Measured acc. IEC 61000-4-5 (8/20 s - wave form) 4 VC-ESD (V) VC (V) 6 VC 2 VC-ESD 0 - 50 BiAs-mode 0 negative discharge - 100 -2 negative surge - 150 -4 0 20892 1 2 0 3 IPP (A) Fig. 7 - Typical Peak Clamping VoltageVC vs. Peak Pulse Current IPP 20895 5000 10000 15000 20000 VESD (kV) Fig. 10 - Typical Peak Clamping Voltage at ESD Contact Discharge (acc. IEC 61000-4-2) 70 60 50 acc. IEC 61000-4-2 + 8 kV contact discharge VC-ESD (V) 40 30 20 10 0 - 10 - 20 - 30 - 10 0 10 20 30 40 50 60 70 80 90 20893 t (ns) Fig. 8 - Typical Clamping Performance at + 8 kV Contact Discharge (acc. IEC 61000-4-2) 40 30 20 acc. IEC 61000-4-2 - 8 kV contact discharge VC-ESD (V) 10 0 - 10 - 20 - 30 - 40 - 50 - 60 - 10 0 10 20 30 40 50 60 70 80 90 20894 t (ns) Fig. 9 - Typical Clamping Performance at - 8 kV Contact Discharge (acc. IEC 61000-4-2) Rev. 1.5, 04-Jun-12 Document Number: 81786 6 For technical questions, contact: ESDprotection@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 VESD05A4A-HS4 www.vishay.com Vishay Semiconductors PACKAGE DIMENSIONS in millimeters (inches): LLP1010-6L 0.125 (0.005) ref. 0.5 (0.020) exp. DAP 0 (0.000) 0.95 (0.037) 1.05 (0.041) Pin 1 marking 0.03 (0.001) 0.2 (0.008) 0.4 (0.016) 0.15 (0.006) 0.1 (0.004) 0.25 (0.010) 0.33 (0.013) 0.35 (0.014) bsc 0.7 (0.028) ref. 0.22 (0.009) exp. DAP 1.05 (0.041) 0.95 (0.037) Foot print recommendation: 0.5 (0.020) 0.05 (0.002) 0.175 (0.007) 0.35 (0.014) 0.7 (0.028) 0.35 (0.014) 0.3 (0.012) Document no.:S8-V-3906.04-004 (4) Created - Date: 17.July.2007 Rev. 4 - Date: 09. Sep. 2008 20899 Solder resist mask Solder pad Soldermask opening 0.03 measured middle of the package 0.22 (0.009) Rev. 1.5, 04-Jun-12 Document Number: 81786 7 For technical questions, contact: ESDprotection@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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