VESD05A4A-HS4
www.vishay.com Vishay Semiconductors
Rev. 1.5, 04-Jun-12 1Document Number: 81786
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
4-Line (Quad) ESD Protection Diode Array in LLP1010-6L
FEATURES
• Ultra compact LLP1010-6L package
• Low package height < 0.4 mm
• 4-line ESD protection (quad)
• Low leakage current < 0.1 μA
• Low load capacitance CD = 12 pF
• ESD-protection acc. IEC 61000-4-2
± 15 kV contact discharge
± 17 kV air discharge
• Surge current acc. IEC 6100-4-5 IPP > 2.5 A
• Soldering can be checked by standard vision inspection.
No X-ray necessary
• Pin plating NiPdAu (e4) no whisker growth
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
MARKING (example only)
Dot = pin 1 marking
X = date code
Y = type code (see table below)
20896
20897
1
54
23
6
20932
XY
ORDERING INFORMATION
DEVICE NAME ORDERING CODE TAPED UNITS PER REEL
(8 mm TAPE ON 7" REEL) MINIMUM ORDER QUANTITY
VESD05A4A-HS4 VESD05A4A-HS4-GS08 5000 5000
PACKAGE DATA
DEVICE NAME PACKAGE
NAME
TYPE
CODE WEIGHT MOLDING COMPOUND
FLAMMABILITY RATING
MOISTURE
SENSITIVITY LEVEL
SOLDERING
CONDITIONS
VESD05A4A-HS4 LLP1010-6L A 1.07 mg UL 94 V-0 MSL level 1
(according J-STD-020) 260 °C/10 s at terminals
VESD05A4A-HS4
www.vishay.com Vishay Semiconductors
Rev. 1.5, 04-Jun-12 2Document Number: 81786
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
BiAs-MODE (4-LINE BIDIRECTIONAL ASYMMETRICAL PROTECTION MODE)
With the VESD05A4A-HS4 up to 4 signal- or data-lines (L1 to L4) can be protected against voltage transients. With pin 2 and
6 connected to ground and pin 1, 3, 4 and 5 connected to a signal- or data-line which has to be protected. As long as the voltage
level on the data- or signal-line is between 0 V (ground level) and the specified Maximum Reverse Working Voltage (VRWM) the
protection diode between data line and ground offer a high isolation to the ground line. The protection device behaves like an
open switch.
As soon as any positive transient voltage signal exceeds the break through voltage level of the protection diode, the diode
becomes conductive and shorts the transient current to ground. Now the protection device behaves like a closed switch. The
Clamping Voltage (VC) is defined by the BReakthrough Voltage (VBR) level plus the voltage drop at the series impedance
(resistance and inductance) of the protection device.
Any negative transient signal will be clamped accordingly. The negative transient current is flowing in the forward direction of
the protection diode. The low Forward Voltage (VF) clamps the negative transient close to the ground level.
Due to the different clamping levels in forward and reverse direction the VESD05A4A-HS4 clamping behaviour is Bidirectional
and Asymmetrical (BiAs).
ABSOLUTE MAXIMUM RATINGS
PARAMETER TEST CONDITIONS SYMBOL VALUE UNIT
Peak pulse current
BiAs-mode: each input (pin 1, 3 to 5) to ground (pin 2 and 6);
acc. IEC 61000-4-5; tp = 8/20 μs; single shot IPPM
2.5 A
BiSy-mode: each input (pin 1, 3 to 5) to any other input pin.
Pin 2 and 6 not connected. Acc. IEC 61000-4-5; tp = 8/20 μs; single shot 2.5 A
Peak pulse power
BiAs-mode: each input (pin 1, 3 to 5) to ground (pin 2 and 6);
acc. IEC 61000-4-5; tp = 8/20 μs; single shot PPP
30 W
BiSy-mode: each input (pin 1, 3 to 5) to any other input pin.
Pin 2 and 6 not connected. Acc. IEC 61000-4-5; tp = 8/20 μs; single shot 33 W
ESD immunity
Acc. IEC61000-4-2; 10 pulses
BiAs-mode: each input (pin 1, 3 to 5) to ground (pin 2 and 6)
Contact
discharge VESD
± 15 kV
Air
discharge ± 17 kV
Acc. IEC 61000-4-2 ; 10 pulses
BiSy-mode: each input (pin 1, 3 to 5) to any other input pin.
Pin 2 and 6 not connected.
Contact
discharge VESD
± 15 kV
Air
discharge ± 17 kV
Operating temperature Junction temperature TJ- 40 to + 125 °C
Storage temperature TSTG - 55 to + 150 °C
20898
L4
L1
1
54
23
6
L3
L2
VESD05A4A-HS4
www.vishay.com Vishay Semiconductors
Rev. 1.5, 04-Jun-12 3Document Number: 81786
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
If a higher surge current or peak pulse current (IPP) is needed, some protection diodes in the VESD05A4A-HS4 can also be used
in parallel in order to “multiply” the performance.
If two diodes are switched in parallel you get
• double surge power = double peak pulse current (2 x IPPM)
• half of the line inductance = reduced clamping voltage
• half of the line resistance = reduced clamping voltage
• double line Capacitance (2 x CD)
• double Reverse leakage current (2 x IR)
ELECTRICAL CHARACTERISTICS BiAs mode: each input (pin 1, 3, 4 and 5) to ground (pin 2 and/or 6)
(Tamb = 25 °C, unless otherwise specified)
PARAMETER TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. MAX. UNIT
Protection paths Number of lines which can be protected Nchannel --4lines
Reverse stand-off voltage Max. reverse working voltage VRWM --5V
Reverse voltage at IR = 0.1 μA VR5--V
Reverse current at VRWM = 5 V IR- < 0.01 0.1 μA
Reverse breakdown voltage at IR = 1 mA VBR 6-8V
Reverse clamping voltage at IPP = 2.5 A VC--12V
Forward clamping voltage at IPP = 2.5 A VF2.5 V
Capacitance at VR = 0 V; f = 1 MHz CD
-1215pF
at VR = 2.5 V; f = 1 MHz - 7.5 8.5 pF
L1 L2
20900
1
54
23
6
VESD05A4A-HS4
www.vishay.com Vishay Semiconductors
Rev. 1.5, 04-Jun-12 4Document Number: 81786
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
BiSy-MODE (3-LINE BIDIRECTIONAL SYMMETRICAL PROTECTION MODE)
If a bipolar symmetrical protection device is needed the VESD05A4A-HS4 can also be used as a three-line protection device.
Therefore three pins (example: pin 1, 3, and 5) has to be connected to the signal- or data-line (L1 to L3) and pin 3 to ground.
Pin 2 and 6 must not be connected!
Positive and negative voltage transients will be clamped in the same way. The clamping current from one data line through the
VESD05A4A-HS4 to the ground passes one diode in forward direction and the other one in reverse direction. The Clamping
Voltage (VC) is defined by the BReakthrough Voltage (VBR) level of one diode plus the forward voltage of the other diode plus
the voltage drop at the series impedances (resistances and inductances) of the protection device.
Due to the same clamping levels in positive and negative direction the VESD05A4A-HS4 voltage clamping behaviour is also
Bidirectional and Symmetrical (BiSy).
ELECTRICAL CHARACTERISTICS
BiSy mode: pin 1, 3, 4 or 5 to any other pin (1, 3, 4 or 5) (pin 2 and 6 not connected)
(Tamb = 25 °C, unless otherwise specified)
PARAMETER TEST CONDITIONS/REMARKS SYMBOL MIN. TYP. MAX. UNIT
Protection paths Number of lines which can be protected Nchannel --3lines
Reverse stand-off voltage Max. reverse working voltage VRWM --5.5V
Reverse voltage at IR = 0.1 μA VR5.5 - - V
Reverse current at VR = VRWM = 5.5 V IR- < 0.01 0.1 μA
Reverse breakdown voltage at IR = 1 mA VBR 6.5 - 8.7 V
Clamping voltage at IPP = 2.5 A VC- 11.5 13 V
Capacitance at VR = 0 V; f = 1 MHz CD
-68pF
at VR = 2.5 V; f = 1 MHz - 5 7 pF
20901
L1
L2
1
54
23
6
L3
VESD05A4A-HS4
www.vishay.com Vishay Semiconductors
Rev. 1.5, 04-Jun-12 5Document Number: 81786
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
TYPICAL CHARACTERISTICS (Tamb = 25 °C, unless otherwise specified)
Fig. 1 - 8/20 μs Peak Pulse Current Wave Form
acc. IEC 61000-4-5
Fig. 2 - ESD Discharge Current Wave Form
acc. IEC 61000-4-2 (330 /150 pF)
Fig. 3 - Typical Capacitance CD vs. Reverse Voltage VR
Fig. 4 - Typical Forward Current IF vs. Forward Voltage VF
Fig. 5 - Typical Reverse Voltage VR vs.
Reverse Current IR
Fig. 6 - Typical Peak Clamping Voltage VC vs.
Peak Pulse Current IPP
0 %
20 %
40 %
60 %
80 %
100 %
010203040
Time (µs)
I
PPM
20 µs to 50 %
8 µs to 100 %
20548
0 %
20 %
40 %
60 %
80 %
100 %
120 %
- 10 0 10 20 30 40 50 60 70 80 90 100
Time (ns)
Discharge Current IESD
Rise time = 0.7 ns to 1 ns
53 %
27 %
20557
0
2
4
6
8
10
12
14
0123456
f = 1 MHz
BiAs-mode
BiSy-mode
VR (V)
CD (pF)
20888
0.001
0.01
0.1
1
10
100
0.5 0.6 0.7 0.8 0.9 1
VF (V)
IF (mA)
20889
0
1
2
3
4
5
6
7
8
0.01 0.1 1 10 100 1000 10000
IR (µA)
VR (V)
20890
- 15
- 10
- 5
0
5
10
15
0123
VC
positive surge
negative surge
BiSy-mode
Measured
acc. IEC 61000-4-5
(8/20 µs - wave form)
IPP (A)
VC (V)
20891
VESD05A4A-HS4
www.vishay.com Vishay Semiconductors
Rev. 1.5, 04-Jun-12 6Document Number: 81786
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 7 - Typical Peak Clamping VoltageVC vs.
Peak Pulse Current IPP
Fig. 8 - Typical Clamping Performance at + 8 kV
Contact Discharge (acc. IEC 61000-4-2)
Fig. 9 - Typical Clamping Performance at - 8 kV
Contact Discharge (acc. IEC 61000-4-2)
Fig. 10 - Typical Peak Clamping Voltage at ESD Contact Discharge
(acc. IEC 61000-4-2)
- 4
- 2
0
2
4
6
8
10
12
0123
BiAs-mode
VC
positive surge
negative surge
Measured
acc. IEC 61000-4-5
(8/20 µs - wave form)
IPP (A)
VC (V)
20892
- 30
- 20
- 10
0
10
20
30
40
50
60
70
- 10 0 10 20 30 40 50 60 70 80 90
acc. IEC 61000-4-2
+ 8 kV
contact discharge
t (ns)
V
C-ESD
(V)
20893
- 150
- 100
- 50
0
50
100
150
0 5000 10000 15000 20000
acc. IEC 61000-4-2 contact discharge
V
C-ESD
positive discharge
negative discharge
VESD (kV)
VC-ESD (V)
20895
VESD05A4A-HS4
www.vishay.com Vishay Semiconductors
Rev. 1.5, 04-Jun-12 7Document Number: 81786
For technical questions, contact: ESDprotection@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
PACKAGE DIMENSIONS in millimeters (inches): LLP1010-6L
Solder
resist mask
Solder pad
0.125 (0.005) ref.
0.03 (0.001)
0 (0.000)
Pin 1 marking
0.4 (0.016)
0.33 (0.013)
0.35 (0.014) bsc
0.7 (0.028) ref.
0.22 (0.009) exp. DAP
0.2 (0.008)
0.1 (0.004)
0.5 (0.020) exp. DAP
0.25 (0.010)
0.15 (0.006)
1.05 (0.041)
0.95 (0.037)
1.05 (0.041)
0.95 (0.037)
Soldermask opening ± 0.03
measured middle of the package
0.05 (0.002)
0.175 (0.007)
0.35 (0.014)
0.7 (0.028)
0.35 (0.014)
0.3 (0.012)
0.22 (0.009)
0.5 (0.020)
Foot print recommendation:
20899
Document no.:S8-V-3906.04-004 (4)
Rev. 4 - Date: 09. Sep. 2008
Created - Date: 17.July.2007
Legal Disclaimer Notice
www.vishay.com Vishay
Revision: 02-Oct-12 1Document Number: 91000
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