Revised February 1999 MM74HC4020 * MM74HC4040 14-Stage Binary Counter * 12-Stage Binary Counter General Description The MM74HC4020, MM74HC4040, are high speed binary ripple carry counters. These counters are implemented utilizing advanced silicon-gate CMOS technology to achieve speed performance similar to LS-TTL logic while retaining the low power and high noise immunity of CMOS. The MM74HC4020 is a 14 stage counter and the MM74HC4040 is a 12-stage counter. Both devices are incremented on the falling edge (negative transition) of the input clock, and all their outputs are reset to a low level by applying a logical high on their reset input. These devices are pin equivalent to the CD4020 and CD4040 respectively. All inputs are protected from damage due to static discharge by protection diodes to VCC and ground. Features Typical propagation delay: 16 ns Wide operating voltage range: 2-6V Low input current: 1 A maximum Low quiescent current: 80 A maximum (74HC Series) Output drive capability: 10 LS-TTL loads Ordering Code: Order Number MM74HC4020M Package Number Package Description M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74HC4020SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC4020MTC MTC16 MM74HC4020N 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide MM74HC4040M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow MM74HC4040SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MM74HC4040MTC MTC16 MM74HC4040N 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Connection Diagrams Pin Assignments for DIP, SOIC, SOP and TSSOP MM74HC4040 MM74HC4020 (c) 1999 Fairchild Semiconductor Corporation DS005216.prf www.fairchildsemi.com MM74HC4020 * MM74HC4040 14-Stage Binary Counter * 12-Stage Binary Counter February 1984 MM74HC4020 * MM74HC4040 Logic Diagrams MM74HC4020 MM74HC4040 www.fairchildsemi.com 2 Recommended Operating Conditions -0.5 to +7.0V Supply Voltage (VCC ) DC Input Voltage (VIN) -1.5 to VCC +1.5V DC Output Voltage (VOUT) -0.5 to VCC +0.5V Clamp Diode Current (ICD) 20 mA DC Output Current, per pin (IOUT) 25 mA DC VCC or GND Current, per pin (ICC) 50 mA Storage Temperature Range (TSTG) Min Max Supply Voltage (VCC) 2 6 V DC Input or Output Voltage 0 VCC V -40 +85 C (tr, tf) VCC = 2.0V 1000 ns VCC = 4.5V 500 ns VCC = 6.0V 400 ns (VIN, VOUT) Operating Temperature Range (TA) Input Rise or Fall Times -65C to +150C Power Dissipation (PD) (Note 3) 600 mW S.O. Package only 500 mW Note 1: Maximum Ratings are those values beyond which damage to the device may occur. Lead Temperature (TL) (Soldering 10 seconds) Symbol VIH VIL VOH Parameter Note 2: Unless otherwise specified all voltages are referenced to ground. 260C DC Electrical Characteristics Units Note 3: Power Dissipation temperature derating -- plastic "N" package: - 12 mW/C from 65C to 85C. (Note 4) Conditions VCC TA = 25C Typ TA = -40 to 85C TA = -55 to 125C Guaranteed Limits Units Minimum HIGH Level Input 2.0V 1.5 1.5 1.5 Voltage 4.5V 3.15 3.15 3.15 V V 6.0V 4.2 4.2 4.2 V V Maximum LOW Level Input 2.0V 0.5 0.5 0.5 Voltage 4.5V 1.35 1.35 1.35 V 6.0V 1.8 1.8 1.8 V Minimum HIGH Level Output VIN = VIH or VIL Voltage |IOUT| 20 A 2.0V 2.0 1.9 1.9 1.9 V 4.5V 4.5 4.4 4.4 4.4 V 6.0V 6.0 5.9 5.9 5.9 V |IOUT| 4.0 mA 4.5V 4.2 3.98 3.84 3.7 V |IOUT| 5.2 mA 6.0V 5.7 5.48 5.34 5.2 V VIN = VIH or VIL VOL Maximum LOW Level Output VIN = VIH or VIL Voltage |IOUT| 20 A 2.0V 0 0.1 0.1 0.1 V 4.5V 0 0.1 0.1 0.1 V 6.0V 0 0.1 0.1 0.1 V |IOUT| 4.0 mA 4.5V 0.2 .26 0.33 0.4 V |IOUT| 5.2 mA 6.0V 0.2 .26 0.33 0.4 V VIN = VCC or GND 6.0V 0.1 1.0 1.0 A 6.0V 8.0 80 160 A VIN = VIH or VIL IIN Maximum Input Current ICC Maximum Quiescent Supply VIN = VCC or GND Current IOUT = 0 A Note 4: For a power supply of 5V 10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used. 3 www.fairchildsemi.com MM74HC4020 * MM74HC4040 Absolute Maximum Ratings(Note 1) (Note 2) MM74HC4020 * MM74HC4040 AC Electrical Characteristics VCC = 5V, TA = 25C, CL = 15 pF, tr = tf = 6 ns Symbol Parameter Conditions fMAX Maximum Operating Frequency tPHL, tPLH Maximum Propagation Typ (Note 5) Guaranteed Limit Units 50 30 MHz 17 35 ns 16 40 ns 10 20 ns 10 16 ns Delay Clock to Q tPHL Maximum Propagation Delay Reset to any Q tREM Minimum Reset Removal Time tW Minimum Pulse Width Note 5: Typical Propagation delay time to any output can be calculated using: tP = 17 + 12(N-1) ns; where N is the number of the output, QW, at VCC = 5V. AC Electrical Characteristics VCC = 2.0V to 6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified) Symbol fMAX tPHL, tPLH TPHL, tPLH tPHL tREM tW Parameter Conditions TA = 25C VCC Typ tr, tf CPD Guaranteed Limits Units Maximum Operating 2.0V 10 6 5 4 MHz Frequency 4.5V 40 30 24 20 MHz MHz 6.0V 50 35 28 24 Maximum Propagation 2.0V 80 210 265 313 ns Delay Clock to Q1 4.5V 21 42 53 63 ns ns 6.0V 18 36 45 53 Maximum Propagation 2.0V 80 125 156 188 ns Delay Between Stages 4.5V 18 25 31 38 ns from Qn to Qn+1 6.0V 15 21 26 31 ns Maximum Propagation 2.0V 72 240 302 358 ns Delay Reset to any Q 4.5V 24 48 60 72 ns (4020 and 4040) 6.0V 20 41 51 61 ns Minimum Reset 2.0V 100 126 149 ns Removal Time 4.5V 20 25 50 ns 6.0V 16 21 25 ns 2.0V 90 100 120 ns 4.5V 16 20 24 ns Minimum Pulse Width 6.0V tTLH, tTHL TA = -40 to 85C TA = -55 to 125C 14 18 20 ns Maximum 2.0V 30 75 95 110 ns Output Rise 4.5V 10 15 19 22 ns and Fall Time 6.0V 9 13 16 19 ns Maximum Input Rise and 1000 1000 1000 ns Fall Time 500 500 500 ns 400 400 400 Power Dissipation (per package) 55 ns pF Capacitance (Note 6) CIN Maximum Input 5 10 10 10 Capacitance Note 6: CPD determines the no load dynamic power consumption, PD = CPD VCC2 f + ICC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC. www.fairchildsemi.com 4 pF MM74HC4020 * MM74HC4040 Timing Diagram 5 www.fairchildsemi.com MM74HC4020 * MM74HC4040 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D www.fairchildsemi.com 6 MM74HC4020 * MM74HC4040 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 7 www.fairchildsemi.com MM74HC4020 * MM74HC4040 14-Stage Binary Counter * 12-Stage Binary Counter Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.