General Description
The MAX5091 high-voltage linear regulator is designed to
operate from a +5V to +28V input voltage, and withstands
up to 40V transients. The device consumes only 45μA of
quiescent current at 100μA output current. The MAX5091
delivers up to 100mA of output current with low 50mV
maximum dropout voltage. The MAX5091 provides an
active-low open-drain microprocessor RESET output. The
reset timeout period is programmable and can be set with
an external capacitor. The MAX5091 includes an uncom-
mitted comparator for input voltage monitoring/power-
fail indication. The device is available with a fixed +5V
(MAX5091A) or +3.3V (MAX5091B) output. The MAX5091
is short-circuit protected and includes thermal shutdown.
The MAX5091 operates over the -40°C to +125°C auto-
motive temperature range and is available in 8-pin, ther-
mally enhanced TDFN-EP and SO-EP packages.
Applications
Industrial
Home Security/Safety
Telecom/Networking
Features
+5V to +28V Wide Operating Input Voltage Range
Withstands 40V Input Voltage Transients
Guaranteed 100mA Output Current
45μA Typical Quiescent Current at 100μA Output
Current
Preset +5V (MAX5091A) or +3.3V (MAX5091B)
Output Voltage
Stable with Only 10μF Output Capacitance
RESET Output with Adjustable Timeout Period
Uncommitted Comparator for Voltage Monitoring/
Power-Fail Indication
Output Overload and Short-Circuit Protection
Thermal Shutdown
Available in 8-Pin TDFN (1.95W at TA = +70°C) and
8-Pin SO (1.5W at TA = +70°C)
Operates Over -40°C to +125°C Automotive
Temperature Range
19-0654; Rev 1; 5/14
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
T = Tape and reel.
Pin Configurations continued at end of data sheet.
PART TEMP RANGE PRESET VOUT (V) PIN-PACKAGE TOP MARK
MAX5091AATA+T -40°C to +125°C 5 8 TDFN-EP* +APB
MAX5091AASA+ -40°C to +125°C 5 8 SO-EP*
MAX5091BATA+T -40°C to +125°C 3.3 8 TDFN-EP* +APC
MAX5091BASA+ -40°C to +125°C 3.3 8 SO-EP*
µC
RESET
CT
SI
+5V TO +28V
R
H
288k
C
IN
10µF
C
CT
0.1µF
C
OUT
10µF
R
L
100k
+5V (MAX5091A)/
+3.3V (MAX5091B)
100mA
SO
GND
EN
R
RES
10k
V
OUT
RES
POWER-
FAIL
V
S
ON
OFF
V
IN
R
SO
10k
MAX5091
1 3 4
8
+
6 5
VOUT RES GND
2
7
SO
VSEN CTSI
TDFN
(3mm x 3mm)
TOP VIEW
MAX5091
EXPOSED PADDLE
MAX5091 28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
Typical Application Circuit Pin Congurations
Ordering Information
VS to GND..............................................................-0.3V to +28V
VS to GND (t ≤ 1s)..................................................-0.3V to +40V
VOUT to GND..........................................................-0.3V to +20V
VS to OUT...............................................................-0.3V to +28V
RES, SO to GND.....................................................-0.3V to +20V
RES, SO Output Sink Current................................................5mA
VOUT Short Circuit (VS 16V)…………......................Continuous
EN, SI to GND.........................................................-0.3V to +12V
CT to GND.............................-0.3V to the lower of VOUT or +12V
Continuous Power Dissipation (TA = +70°C)
SO-EP (derate 19.2mW/°C above +70°C)
.......
1538mW*
Thermal Resistance JA).
................
...........................52°C/W
Thermal Resistance JC)..............................................6°C/W
TDFN-EP (derate 24.4mW/°C above +70°C)
...1951mW**
Thermal Resistance JA)............
....................
............41°C/W
Thermal Resistance JC)...........................................8.3°C/W
Operating Junction Temperature Range..............-40°C to +125°C
Maximum Junction Temperature.......................................+150°C
Storage Temperature Range...............................-60°C to +150°C
Lead Temperature (soldering, 10s)...................................+300°C
(VS = +14V, VOUT = 5V, EN unconnected, TA = TJ = -40°C to +125°C, CIN = 10μF, COUT = 10μF, unless otherwise noted. Typical
specifications are at TA = +25°C.) (Note 1)
*As per JEDEC51 Standard (single-layer board).
**As per JEDEC51 Standard (multilayer board).
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Output Voltage VOUT
TA = +25°C, IOUT = 1mA 4.95 5 5.05
V
5.6V ≤ VS ≤ 28V, IOUT = 1mA to 50mA
(Note 2) 4.90 5 5.10
5.6V ≤ VS ≤ 40V, t ≤ 1s, IOUT = 1mA to
30mA (Note 2) 4.9 5 5.1
VS = +8V, IOUT = 1mA to 100mA 4.9 5 5.1
Dropout Voltage VDP VS = +4.75V
IOUT = 10mA 0.1 0.25
VIOUT = 50mA 0.2 0.4
IOUT = 100mA 0.3 0.5
VS to VOUT Difference in
Undervoltage VIO VS = +4V, IOUT = 35mA 0.4 V
Line Regulation VOL +5.5V ≤ VS ≤ +28V, IOUT = 1mA 0.6 5 mV
Load Regulation VOLO 1mA ≤ IOUT ≤ 100mA 17 50 mV
Current Limit ILIM 160 260 400 mA
Quiescent Current IQ
IOUT = 100µA 46 100 µA
IOUT = 300µA 45 100
IOUT = 100mA 4.5 10 mA
Shutdown Supply Current ISHDN VEN ≤ +0.4V 17 30 µA
Thermal-Shutdown Temperature TJ(SHDN) Temperature rising +165 °C
Thermal-Shutdown Hysteresis ΔTJ(SHDN) 20 °C
MAX5091 28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
www.maximintegrated.com Maxim Integrated
2
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics (MAX5091A)
(VS = +14V, VOUT = 5V, EN unconnected, TA = TJ = -40°C to +125°C, CIN = 10μF, COUT = 10μF, unless otherwise noted. Typical
specifications are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
RESET
Reset Threshold Voltage VRT VOUT falling 85 90 94.5 %VOUT
Reset Threshold Hysteresis VRTH 30 65 100 mV
Reset Pulse Delay tRD CCT = 100nF, tR ≥ 100µs 55 110 180 ms
RES Output Low Voltage VRL VS ≥ +1.5V, RRES = 10kΩ to VOUT 0.4 V
RES Output High Leakage
Current IRH VRES = 5V 1.0 µA
Delay Comparator Threshold VCTTH VCT rising 1.9 2.1 2.4 V
Delay Comparator Threshold
Hysteresis 100 mV
SENSE
Sense Threshold VST VSI falling 1.10 1.16 1.24 V
Sense Threshold Hysteresis 50 100 150 mV
Sense Output Low Voltage VSL VSI ≤ 1.10V, VS ≥ 4V, RSO = 10kΩ to VOUT 0.4 V
Sense Output
Leakage Current ISH VSO = 5V, VSI ≥ 1.5V 1 µA
Sense Input Current ISI VSI = 3.3V -1 +1 µA
ENABLE
Enable Voltage VEN
EN = high, regulator on 2.4 V
EN = low, regulator off 0.4
Enable Internal Pullup Current IEN EN is internally pulled up to 3.6V (max) 3 µA
MAX5091 28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
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Electrical Characteristics (MAX5091A) (continued)
(VS = +14V, VOUT = 3.3V, EN unconnected, TA = TJ = -40°C to +125°C, CIN = 10μF, COUT = 10μF, unless otherwise noted. Typical
specifications are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Output Voltage VOUT
TA = +25°C, IOUT = 1mA 3.267 3.3 3.333
V
5V ≤ VS ≤ 28V, IOUT = 1mA to 50mA (Note 2) 3.234 3.3 3.366
5V ≤ VS ≤ 40V, t ≤ 1s, IOUT = 1mA to 30mA
(Note 2) 3.234 3.3 3.366
VS = +8V, IOUT = 1mA to 100mA 3.234 3.3 3.366
VS to VOUT Difference in
Undervoltage VIO VS = 3.5V, IOUT = 35mA 0.2 0.4 V
Line Regulation VOL 5V ≤ VS ≤ 28V, IOUT = 1mA 0.6 5 mV
Load Regulation VOLO 1mA ≤ IOUT ≤ 100mA 11 40 mV
Current Limit ILIM 160 260 400 mA
Quiescent Current IQ
IOUT = 100µA 45 100 µA
IOUT = 300µA 45 100
IOUT = 100mA 4.4 10 mA
Shutdown Supply Current ISHDN VEN ≤ 0.4V 17 30 µA
Thermal-Shutdown Temperature TJ(SHDN) Temperature rising +165 °C
Thermal-Shutdown Hysteresis ΔTJ(SHDN) 20 °C
RESET CIRCUIT
Reset Threshold Voltage VRT VOUT falling 85 90 94.5 %VOUT
Reset Threshold Hysteresis VRTH 20 45 80 mV
Reset Pulse Delay tRD CCT = 100nF, tR ≥ 100µs 55 105 180 ms
RES Output Low Voltage VRL VS ≥ 1.5V, RRES = 4kΩ to VOUT 0.4 V
RES Output High Leakage Current IRH VRES = 3.3V 1.0 µA
Delay Comparator Threshold VCTTH VCT rising 1.9 2.1 2.4 V
Delay Comparator Threshold
Hysteresis 100 mV
MAX5091 28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
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Electrical Characteristics (MAX5091B)
(VS = +14V, VOUT = 3.3V, EN unconnected, TA = TJ = -40°C to +125°C, CIN = 10μF, COUT = 10μF, unless otherwise noted. Typical
specifications are at TA = +25°C.) (Note 1)
Note 1: Limits at TA = -40°C are guaranteed by design and not production tested.
Note 2: Maximum output current is limited by the power dissipation capability of the package.
(Typical Application Circuit, VS = +14V, CIN = 10μF, COUT = 10μF, VSI = 0V, VEN = +2.4V, VOUT = +5V, TA = +25°C, unless
otherwise noted.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SENSE
Sense Threshold VST VSI falling 1.09 1.15 1.23 V
Sense Threshold Hysteresis 50 100 150 mV
Sense Output-Low Voltage VSL VSI ≤ 1.09V, VS ≥ 4V, RSO = 10kΩ to VOUT 0.4 V
Sense Output Leakage Current ISH VSO = 3.3V, VSI ≥ 1.5V 1 µA
Sense Input Current ISI VSI = 3.3V -1 +1 µA
ENABLE
Enable Voltage VEN
EN = high, regulator on 2.4 V
EN = low, regulator off 0.4
Enable Internal Pullup Current IEN EN is internally pulled up to 3.6V (max) 3 µA
OUTPUT VOLTAGE vs. INPUT VOLTAGE
MAX5091 toc02
VS (V)
V
OUT
(V)
54321
1
2
3
4
0
0 6
MAX5091BVOUT AT NO LOAD, 100A,
1mA, 10mA, 100mA
OUTPUT VOLTAGE vs. OUTPUT CURRENT
MAX5091 toc03
IOUT (mA)
V
OUT
(V)
1010.1
4.92
4.94
4.96
4.98
5.00
5.02
5.04
4.90
0.01 100
MAX5091A
VS = 14V
VS = 6V
OUTPUT VOLTAGE vs. INPUT VOLTAGE
MAX5091 toc01
VS (V)
V
OUT
(V)
10
515
3
4
5
6
2
0
MAX5091AVOUT AT NO LOAD, 100A,
1mA, 10mA, 100mA
MAX5091 28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
Maxim Integrated
5
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Typical Operating Characteristics
Electrical Characteristics (MAX5091B) (continued)
(Typical Application Circuit, VS = +14V, CIN = 10μF, COUT = 10μF, VSI = 0V, VEN = +2.4V, VOUT = +5V, TA = +25°C, unless
otherwise noted.)
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
MAX5091 toc10
TEMPERATURE (°C)
I
SHDN
(µA)
10065-30-5
15
16
17
18
19
20
14
-40 135
VS = 14V
EN = 0V
DROPOUT VOLTAGE
vs. LOAD CURRENT
MAX5091 toc11
I
OUT
(mA)
DROPOUT VOLTAGE (mV)
101
25
50
75
100
125
150
175
200
225
250
275
300
325
0
0.1 100
MAX5091A
VS = 4.75V
DROPOUT VOLTAGE
vs. LOAD CURRENT
MAX5091 toc12
IOUT (mA)
DROPOUT VOLTAGE (mV)
101
25
50
75
100
125
150
175
200
225
250
275
300
0
0.1 100
MAX5091B
VS = 3.3V
OUTPUT VOLTAGE
vs. TEMPERATURE
MAX5091 toc04
TEMPERATURE (°C)
V
OUT
(V)
11085603510-15
4.925
4.950
4.975
5.000
5.025
5.050
4.900
-40 135
MAX5091A
IOUT = 100A
IOUT = 1mA
IOUT = 10mA
IOUT = 100mA
QUIESCENT CURRENT
vs. INPUT VOLTAGE
MAX5091 toc05
VS (V)
I
Q
(µA)
26221814106
10
100
1000
12 30 3834
EN = OPEN
IOUT = NO LOAD
TA = +25°C, +85°C TA = +125°C
TA = -40°C
QUIESCENT CURRENT
vs. INPUT VOLTAGE
MAX5091 toc06
VS (V)
I
Q
(µA)
26221814106
10
100
1000
12 30 3834
EN = OPEN
IOUT = 100A
TA = +25°C, +85°C
TA = +125°C
TA = -40°C
RESET OUTPUT LOW
vs. TEMPERATURE
MAX5091 toc07
TEMPERATURE (°C)
RESET OUTPUT LOW (V)
1109580655035205-10-25
0.05
0.10
0.15
0.20
0.25
0
-40 125
RRES = 4k
RRES = 10k
QUIESCENT CURRENT
vs. OUTPUT CURRENT
MAX5091 toc08
IOUT (mA)
I
Q
(mA)
1 10
0.1
1
10
0.01
0.1 100
VS = 14V
TA = +25°C
SHUTDOWN SUPPLY CURRENT
vs. INPUT VOLTAGE
MAX5091 toc09
VS (V)
I
SHDN
(µA)
302010
10
20
30
40
0
0 40
VS = 14V
TA = +25°C
EN = 0V
MAX5091 28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
Maxim Integrated
6
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Typical Operating Characteristics (continued)
(Typical Application Circuit, VS = +14V, CIN = 10μF, COUT = 10μF, VSI = 0V, VEN = +2.4V, VOUT = +5V, TA = +25°C, unless
otherwise noted.)
DROPOUT VOLTAGE
vs. TEMPERATURE
MAX5091 toc13
TEMPERATURE (°C)
DROPOUT VOLTAGE (mV)
10065-5 30
50
100
150
200
250
300
350
400
0
-40 135
MAX5091A
VS = 4.75V
IOUT = 10mA
IOUT = 100mA
RESET THRESHOLD
vs. TEMPERATURE
MAX5091 toc14
TEMPERATURE (°C)
RESET THRESHOLD VOLTAGE (V)
1006530-5
4.42
4.44
4.46
4.48
4.50
4.52
4.54
4.56
4.58
4.60
4.40
-40 135
MAX5091A
VOUT FALLING
VOUT RISING
RESET VOLTAGE
vs. OUTPUT VOLTAGE
MAX5091 toc15
V
OUT
(V)
V
RES
(V)
4.64.54.4
1
2
3
4
5
0
4.3 4.7
MAX5091A
RRES = 10k TO OUT
VOUT FALLING VOUT RISING
SENSE THRESHOLD
vs. TEMPERATURE
MAX5091 toc16
TEMPERATURE (°C)
SENSE THRESHOLD (V)
1006530-5
1.05
1.10
1.15
1.20
1.25
1.30
1.35
1.40
1.45
1.50
1.00
-40 135
SI INPUT FALLING
SI INPUT RISING
SENSE OUTPUT
vs. SENSE INPUT
MAX5091 toc17
SENSE INPUT (V)
SENSE OUTPUT (V)
1.31.21.1
1
2
3
4
5
0
1.0 1.4
VSI FALLING
VSI RISING
POWER-SUPPLY REJECTION RATIO
vs. SUPPLY CURRENT
MAX5091 toc18
FREQUENCY (kHz)
PSRR (dB)
1010.1
-70
-60
-50
-40
-30
-20
-10
0
-80
0.01 100
VIN = 14V
IOUT = 10mA
500mVP-P
LOAD-TRANSIENT RESPONSE
MAX5091 toc19
200µs/div
VOUT
5V AC-COUPLED
100mV/div
IOUT
20mA/div
50mA
100µA
C
IN
= 10µF
C
OUT
= 10µF/10m ESR
I
STEP
= 100µA TO 50mA
LINE-TRANSIENT RESPONSE
MAX5091 toc20
200µs/div
VOUT
5V AC-COUPLED
200mV/div
IOUT = 1mA
VS
10V/div
40V
14V
MAX5091 28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
Maxim Integrated
7
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Typical Operating Characteristics (continued)
(Typical Application Circuit, VS = +14V, CIN = 10μF, COUT = 10μF, VSI = 0V, VEN = +2.4V, VOUT = +5V, TA = +25°C, unless
otherwise noted.)
PIN NAME FUNCTION
1 VS
Regulator Input. Operating supply range is from +5V to +28V and withstands 40V transients. Bypass
VS to GND with a 10µF capacitor.
2 SI Voltage Sense/Power-Fail Comparator Input. SI is the noninverting input of an uncommitted comparator. SO
asserts low if VSI drops below the reference level, VST.
3 EN Enable Input. Leave unconnected (or pull EN high) to turn on the regulator. Pull EN low to place the device in
shutdown mode. EN is internally pulled up to 3.6V.
4 CT
Reset Timeout Delay Capacitor Connection. Connect a capacitor from CT to GND to program the reset timeout
period/reset pulse delay. During regulation, CT is pulled up to VOUT. CT is pulled low during reset, when EN is
low, or when in thermal shutdown.
5 GND Ground. Bypass the input and output capacitors to the GND plane. Solder to large pads or the circuit-board
ground plane to maximize thermal dissipation.
6RES
Active-Low Reset Output. Pull up externally to VOUT. Open-drain RES goes low when VOUT is below the reset
threshold. Once output voltage is in regulation, RES goes high after the programmed reset timeout period is
over. RES is low when EN is low or in thermal shutdown.
7 SO
Voltage Sense/Power-Fail Comparator Output. Pull up externally to VOUT. Open-drain SO asserts
low when VSI drops below the reference level, VST. SO also asserts low when EN is low or in thermal
shutdown.
8 VOUT
Regulator Output. Fixed at +5V (MAX5091A) or +3.3V (MAX5091B). Bypass with a 10µF ceramic capacitor to
GND.
EP EP Exposed Paddle. EP is internally connected to GND. Connect EP to GND to provide a low thermal-resistance
path from the IC junction to the PC board. Do not use as the only electrical connection to GND.
VOUT STARTUP RESPONSE
MAX5091 toc21
10ms/div
VOUT
2V/div
VS
5V/div
0V
0V
IOUT = 10mA
ENABLE RESPONSE
MAX5091 toc22
200µs/div
VOUT
5V/div
EN
5V/div
0V
0V
IOUT = 100mA
SHUTDOWN RESPONSE
MAX5091 toc23
200µs/div
VOUT
2V/div
EN
2V/div
0V
0V
IOUT = 100mA
MAX5091 28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
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Pin Description
Typical Operating Characteristics (continued)
Figure 1. Functional Diagram
N
PASS
ELEMENT
DELAY
COMPARATOR
PREREGULATOR
ALWAYS-ON
FAULT
DETECTION
(TEMP AND SC)
VREF
1.25V
VREF
VINT
3.6V (MAX)
VREF
SCLIM
SD
VOUT
VS
CT
SI
EN
0.9 x VREF
2.1V
N
ICT
2µA
ENABLE
VINT
3µA
MAX
ALWAYS-ON
GND
RES
LDO
VOUT
VREF
N
SO
MAX5091
MAX5091 28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
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9
Detailed Description
Regulator
The MAX5091 high-voltage, LDO regulator operates
from +5V to +28V input voltage. The device with-
stands up to 40V transients, providing protection against
temporary overvoltage conditions like load dump. The
MAX5091 incorporates internal feedback resistors for
factory-preset voltages of either +5V (MAX5091A) or
+3.3V (MAX5091B). The regulator is capable of driving
up to 100mA of load current and features a typical current
limit of 260mA. The regulator uses a pnp pass element
and provides low 0.5V dropout while delivering 100mA
load current. The output of the regulator follows closely to
the input during turn-on. See the Output Voltage vs. Input
Voltage graph in the Typical Operating Characteristics.
This makes the usable input voltage range for 3.3V
and 5V output down to 3.7V and 5.5V, respectively. The
MAX5091 is designed to operate with very low quiescent
current during always-on operation when not in dropout.
The regulator is stable with a wide variety of capacitors
including low-ESR ceramic 10μF (0603 case size). The
load-transient response curves depict the stability of the
LDO when using different capacitance and ESR ranges.
See the Capacitor Selection and Regulator Stability sec-
tion in the Applications Information.
Reset Output (RES)
The MAX5091 integrates a power-on-reset circuit. RES
is an open-drain output that requires a pullup resistor to
VOUT. The open-drain MOSFET can sink up to 825μA
current while keeping the RES voltage below 0.4V. The
internal reset circuit monitors the regulator output voltage
and RES asserts an active-low output when the regula-
tor output falls below a reset threshold of typically 0.9 x
VOUT. The RES output remains low when VOUT is below
the reset threshold, and remains low for the duration of
the reset timeout period (tRD). The reset timeout period is
programmable and can be set with an external capacitor
connected from CT to ground. The duration of the delay
as a function of CT is:
()
6
CT CCTH
RD CT
CV
t 35 10
I
×
=
where VCCTH = 2.1V and ICT = 2 x 10-6 A.
The default reset timeout period is 35μs when no capaci-
tor is connected from CT to ground.
SI/SO Comparator
The MAX5091 includes an uncommitted comparator for
monitoring the input voltage or for detecting power-fail con-
ditions. The input SI is the noninverting input of the compar-
ator. The open-drain output SO asserts low when voltage
at the input SI drops below the threshold voltage, VST (see
Figure 1). The sense comparator typically has a hysteresis
of 100mV. Use the following equation to calculate the resis-
tor-divider for programming the trip voltage (VTRIP) during
power-fail. See the Typical Application Circuit.
( )
ST H
TRIP ST
L
VR
VV
R
×
= +
where VST = 1.16V (typ). Choose RL between 100kΩ to
300kΩ.
Enable Input
The enable (EN) is a TTL-compatible logic input. Logic
low at EN turns off the regulator and reduces the current
consumption to 17μA (typ). It is internally pulled up to a
logic-high voltage (3.6V max) by an internal resistor. Thus,
the MAX5091 is enabled by default when VS is applied
and EN is left unconnected. The regulator, reset supervi-
sor circuit, and the sense comparator can be manually
shut down by pulling EN low. For shutdown operation, the
pulldown network must be capable of sinking 3μA max,
since the internal pullup resistor sets the maximum pullup
current at 3μA. The external pulldown device should not
leak more than 1μA current when it is in the off-state.
Current Limit
The MAX5091 features a current limiter that monitors the
output current and controls the pass transistor’s gate voltage,
limiting the output current to typically 260mA. The output can
be continuously shorted to ground without damaging the
device at VS ≤ 16V. Note that the output short-circuit current
may increase the power dissipation significantly and raise the
junction temperature to its thermal-shutdown threshold. In
such a case, the MAX5091 is temporarily turned off.
Thermal Shutdown
When the junction temperature exceeds TJ = +165°C (typ),
an internal thermal sensor signals the shutdown logic to
turn off the pass transistor and allow the IC to cool. The
thermal sensor turns the pass transistor on again after the
IC’s junction temperature cools by +20°C (typ), resulting in
a cycled output during continuous thermal-overload condi-
tions. Thermal shutdown protects the MAX5091 in the event
of fault conditions. For continuous operation, do not exceed
the absolute maximum junction temperature of TJ = +150°C.
MAX5091 28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
www.maximintegrated.com Maxim Integrated
10
Applications Information
Available Output Current Calculation
The MAX5091 high-voltage regulator provides up to
100mA of output current. The input voltage extends to
+28V. Package power dissipation limits the amount of
output current available for a given input/output voltage
and ambient temperature. Figure 2 depicts the maximum
power dissipation curve for the 8-pin SO-EP package.
The graph assumes that the exposed metal back of the
MAX5091 package is soldered to copper on a single layer
PCB according to the JEDEC51 standard.
Use Figure 2 to determine the allowable package dissi-
pation for a given ambient temperature. Alternately, use
the following formula to calculate the allowable package
dissipation:
A
D
AA
1.538W for T 70 C
P
1.538 0.01923 (T 70 C) For 70 C T 125 C
≤+ °

=

° + ° < ≤+ °

After determining the allowable package dissipation,
calculate the maximum output current using the following
formula:
D
OUT(MAX) S OUT
P
IVV
The above equations do not include the power dissipation
from self-heating due to the IC ground current.
The junction-to-ambient thermal impedance depends
on the area of the copper plane, its thickness, and the
number of copper layers on PCB. For the higher power
dissipation requirement, use multiple-layered PCBs with
2oz copper and a large copper area.
Capacitor Selection and Regulator Stability
For stable operation over the full temperature range
and with load currents up to 100mA, use a 10μF output
capacitor with a low ESR. Table 1 shows a list of recom-
mended output capacitor ESR for various load conditions.
Figure 2. 8-Pin SO-EP Maximum Power Dissipation vs.
Temperature
Table 1. Recommended Output Capacitor
ESR
RECOMMENDED COUT ESR
IOUT VOUT = 3.3V VOUT = 5.0V
IOUT ≤ 10mA CESR < 0.66Ω CESR < 1Ω
IOUT ≤ 50mA CESR < 0.132Ω CESR < 0.2Ω
IOUT ≤ 100mA CESR < 66mΩ CESR < 0.1Ω
MAX5091 fig02
TEMPERATURE (°C)
PD (W)
130
120100
11030 40 50 60 70 80 9010 20
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0
140
150
1.538W
DERATE
19.23mW/°C
8-PIN SO-EP
MAX5091 28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
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11
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
8 TDFN-EP T833+2 21-0137 90-0059
8 SO-EP S8E+14 21-0111 90-0151
RES
GNDCT
1+
2
8
7
VOUT
SOSI
EN
VS
SO-EP
TOP VIEW
3
4
6
5
EXPOSED PADDLE
MAX5091
MAX5091 28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
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12
Pin Congurations (continued) Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character,
but the drawing pertains to the package regardless of RoHS
status.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
MAX5091 28V, 100mA, Low-Quiescent-Current LDO
with Reset and Power-Fail Input/Output
© 2014 Maxim Integrated Products, Inc.
13
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
011/06 Initial release
1 5/14 Removed “Automotive” from the Applications section 1
Revision History
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