TPS72301-Q1 TPS72325-Q1 SLVSAJ4A - SEPTEMBER 2010 - REVISED MARCH 2011 www.ti.com 200 mA Low-Noise, High-PSRR Negative Output Low-Dropout Linear Regulators Check for Samples: TPS72301-Q1, TPS72325-Q1 FEATURES APPLICATIONS * * * * * * * * * 1 2 * * * * * * * Qualified for Automotive Applications Ultralow Noise: 60 VRMS Typical High PSRR: 65 dB Typical at 1kHz Low Dropout Voltage: 280mV Typical at 200 mA, 2.5 V Available in -2.5V and Adjustable (-1.2V to -10V) Versions Stable With a 2.2 F Ceramic Output Capacitor Less Than 2 A Typical Quiescent Current in Shutdown Mode 2% Overall Accuracy (Line, Load, Temperature) Thermal and Over-Current Protection SOT23-5 (DBV) Package Operating Junction Temperature Range: -40C to 125C Optical Drives Optical Networking Noise Sensitive Circuitry GaAs FET Gate Bias Video Amplifiers DESCRIPTION The TPS723xx-Q1 family of low-dropout (LDO) negative voltage regulator offers an ideal combination of features to support low noise applications. This device is capable of operating with input voltages from -10V to -2.7V. The TPS72325-Q1 regulator is stable with small, low-cost ceramic capacitors, and include enable (EN) and noise reduction (NR) functions. Thermal short-circuit and over-current protections are provided by internal detection and shutdown logic. High PSRR (65 dB at 1kHz) and low noise (60VRMS) make the TPS723xx-Q1 ideal for low-noise applications. The TPS723xx-Q1 uses a precision voltage reference to achieve 2% overall accuracy over load, line, and temperature variations. Available in a small SOT23-5 package, the TPS723xx-Q1 is fully specified over a temperature range of -40C to +125C. Typical Application Circuit 2 2.2mF 3 IN OUT EN NR DBV PACKAGE (TOP VIEW) 5 2.2mF +1.5V GND -1.5V On Off On GND 1 IN 2 EN 3 5 OUT 4 NR 4 10nF GND 1 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2010-2011, Texas Instruments Incorporated TPS72301-Q1 TPS72325-Q1 SLVSAJ4A - SEPTEMBER 2010 - REVISED MARCH 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1) PRODUCT (1) (2) VOUT (2) (2) TOP-SIDE MARKING TPS72301QDBVRQ1 adjustable output voltage PPHQ TPS72325QDBVRQ1 nominal output voltage = 2.5V PSBQ For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Output voltages from -1.2V to -9V in 100mV increments are available. Minimum order quantities apply; contact factory for details and availability. ABSOLUTE MAXIMUM RATINGS (1) (2) Over operating temperature range, unless otherwise noted. VALUE UNITS -11 to +0.3 V Noise reduction pin voltage range, VNR -11 to +5.5 V Enable voltage range, VEN -VIN to +5.5 V Input voltage range, VIN Output current, IOUT Internally limited Output short-circuit duration Indefinite Continuous total power dissipation, PD See Power Dissipation Ratings table Junction temperature range, TJ -55 to +150 C Storage temperature range, Tstg -65 to +150 C Latch-up performance meets 100 mA per AEC-Q100 | Class I 100 mA Human-Body Model 2000 kV Machine Model 200 V Charged-Device Model 500 V ESD ratings (1) (2) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. POWER DISSIPATION RATINGS (2) 2 TA = +70c POWER RATING TA = +85c POWER RATING BOARD PACKAGE RJC RJA Low-K (1) DBV 64C/W 255C/W 3.9mW/C 390mW 215mW 155mW (2) DBV 64C/W 180C/W 5.6mW/C 560mW 310mW 225mW High-K (1) TA +25c POWER RATING DERATING FACTOR ABOVE TA = +25c The JEDEC Low-K (1s) board design used to derive this data was a 3 inch x 3 inch, two-layer board with 2-ounce copper traces on top of the board. The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch x 3 inch, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on the top and bottom of the board. Submit Documentation Feedback Copyright (c) 2010-2011, Texas Instruments Incorporated Product Folder Link(s): TPS72301-Q1 TPS72325-Q1 TPS72301-Q1 TPS72325-Q1 SLVSAJ4A - SEPTEMBER 2010 - REVISED MARCH 2011 www.ti.com ELECTRICAL CHARACTERISTICS Over operating junction temperature range, VIN = VOUTnom - 0.5V, IOUT = 1mA, VEN = 1.5V, COUT = 2.2F, and CNR = 0.01F, unless otherwise noted. Typical values are at TJ = +25C. TPS723xx-Q1 PARAMETER VIN Input voltage range TEST CONDITIONS (1) Accuracy VOUT%/VIN Line regulation TPS723xx-Q1 vs VIN/IOUT/T VOUT%/IOUT Load regulation VDO Dropout voltage at VOUT = 0.96 x VOUTnom ICL Current limit IGND ISHDN PSRR Shutdown ground pin current Power-supply rejection ratio Vn Output noise voltage tSTR Startup time VEN(HI) Enable threshold positive VEN(LO) Enable threshold negative VDIS(HI) Disable threshold positive VDIS(LO) Disable threshold negative -2.7 V 1 % -10V VIN VOUT - 0.5V, 10A IOUT 200mA -2 2 % 1 -10V VIN VOUT(nom) - 0.5V 0.04 %/V 0mA IOUT 200mA 0.002 %/mA IOUT = 200mA 280 500 mV 550 800 mA IOUT = 0mA (IQ), -10V VIN VOUT - 0.5V 130 200 IOUT = 200mA, -10V VIN VOUT - 0.5V 350 500 -0.4V VEN 0.4V, -10V VIN VOUT - 0.5V 0.1 2.0 IOUT = 200mA, 1kHz, CIN = COUT = 10F 65 IOUT = 200mA, 10kHz, CIN = COUT = 10F 48 COUT = 10F, 10Hz to 100kHz, IOUT = 200mA 60 VRMS VOUT = -2.5V, COUT = 1F, RL = 25 1 ms 300 A -10V VIN VOUT - 0.5V, -10V VEN 3.5V TSD Thermal shutdown temperature TJ Operating junction temperature A dB V -1.5 V 0.4 V -0.4 Enable pin current UNITS -1 1.5 IEN (1) MAX -10 VOUT = 0.85 x VOUT(nom) Ground pin current TYP TJ = +25C Nominal VOUT MIN V 0.1 Shutdown, temperature increasing +165 Reset, temperature decreasing +145 -40 2.0 A C +125 C Maximum VIN = (VOUT - VDO) or - 2.7V, whichever is more negative. Copyright (c) 2010-2011, Texas Instruments Incorporated Product Folder Link(s): TPS72301-Q1 TPS72325-Q1 Submit Documentation Feedback 3 TPS72301-Q1 TPS72325-Q1 SLVSAJ4A - SEPTEMBER 2010 - REVISED MARCH 2011 www.ti.com FUNCTIONAL BLOCK DIAGRAM TPS72325 IN OUT EN 100 kW VREF 1.186 V 5 pF Current Limit /Thermal Protection R1 GND R2 R1 + R2 = 97 kW NR TERMINAL FUNCTIONS TERMINAL 4 NAME NO. GND 1 DESCRIPTION Ground IN 2 Input supply EN 3 Bipolar enable pin. Driving this pin above the positive enable threshold or below the negative enable threshold turns on the regulator. Driving this pin below the positive disable threshold and above the negative disable threshold puts the regulator into shutdown mode. NR 4 Fixed voltage versions only. Connecting an external capacitor between this pin and ground, bypasses noise generated by the internal bandgap. This configuration allows output noise to be reduced to very low levels. OUT 5 Regulated output voltage. A small 2.2F ceramic capacitor is needed from this pin to GND to ensure stability. Submit Documentation Feedback Copyright (c) 2010-2011, Texas Instruments Incorporated Product Folder Link(s): TPS72301-Q1 TPS72325-Q1 TPS72301-Q1 TPS72325-Q1 SLVSAJ4A - SEPTEMBER 2010 - REVISED MARCH 2011 www.ti.com TYPICAL CHARACTERISTICS TPS723xx-Q1 at VIN = VOUTnom - 0.5V, IOUT = 1mA, VEN = 1.5V, COUT = 2.2F, and CNR = 0.01F, unless otherwise noted. OUTPUT VOLTAGE vs INPUT VOLTAGE OUTPUT VOLTAGE vs AMBIENT TEMPERATURE -2.475 Output Voltage, VOUT (V) Output Voltage (V) -2.475 -2.488 TJ = +25C TJ = -40C -2.500 TJ = +85C -2.513 TJ = +125C -2.525 -10 VIN = 3V, IOUT = 200mA -2.488 VIN = 10V, IOUT = 200mA -2.500 VIN = 10V, IOUT = 0mA -2.513 VIN = 3V, IOUT = 0mA -2.525 -9 -8 -7 -6 -5 -4 -3 -2 -40 0 -20 Input Voltage (V) 60 80 100 120 140 Figure 2. DROPOUT VOLTAGE vs OUTPUT CURRENT TPS723xx-Q1 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE 350 300 300 TJ = +125C Dropout Voltage (mV) Dropout Voltage (mV) 40 Figure 1. 350 250 TJ = +25C 200 150 TJ = -40C 100 50 250 200 150 100 50 0 0 0 25 50 75 100 125 150 175 200 -40 -20 0 Output Current (mA) 20 40 60 80 100 120 140 Junction Temperature (C) Figure 3. Figure 4. GROUND CURRENT vs INPUT VOLTAGE GROUND CURRENT vs OUTPUT CURRENT 500 400 450 350 400 TJ = +25C RL = 12.5W 350 Ground Current (mA) Ground Current (mA) 20 Ambient Temperature (C) 300 250 200 150 No Load 100 300 250 TJ = +125C 200 TJ = -40C 150 100 50 50 0 0 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 0 0 50 Input Voltage (V) Figure 5. 100 150 200 Output Current (mA) Figure 6. Copyright (c) 2010-2011, Texas Instruments Incorporated Product Folder Link(s): TPS72301-Q1 TPS72325-Q1 Submit Documentation Feedback 5 TPS72301-Q1 TPS72325-Q1 SLVSAJ4A - SEPTEMBER 2010 - REVISED MARCH 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) TPS723xx-Q1 at VIN = VOUTnom - 0.5V, IOUT = 1mA, VEN = 1.5V, COUT = 2.2F, and CNR = 0.01F, unless otherwise noted. GROUND CURRENT vs JUNCTION TEMPERATURE 800 450 750 400 700 VIN = 10V, IOUT = 200mA 350 Current Limit (mA) Ground Current (mA) CURRENT LIMIT vs JUNCTION TEMPERATURE 500 300 250 200 VIN = 3V, IOUT = 0mA 150 100 650 600 550 500 450 400 VIN = 10V, IOUT = 0mA 50 350 0 300 -40 0 -20 20 40 60 80 100 120 140 -40 0 -20 Junction Temperature (C) 20 40 60 80 100 120 140 Junction Temperature (C) Figure 7. Figure 8. STANDBY CURRENT vs JUNCTION TEMPERATURE ENABLE PIN CURRENT vs JUNCTION TEMPERATURE 250 1000 800 Enable Pin Current (nA) Standby Current (nA) 200 VIN = -10V 150 VIN = -3V 100 50 600 400 200 VIN = -10V, VEN = -0.5V 0 -200 VIN = -10V, VEN = 3.5V -400 -600 VIN = -10V, VEN = -10V -800 0 -1000 -40 0 -20 20 40 60 80 100 120 140 -40 0 -20 Junction Temperature (C) 20 Figure 9. 80 100 120 140 LINE TRANSIENT RESPONSE Input Voltage (V) Output Voltage (mV) 0.25 Line Regulation (%/V) Load Regulation (%/mA) 60 Figure 10. LINE AND LOAD REGULATION vs JUNCTION TEMPERATURE 0.13 Load 0 Line -0.13 100 50 0 -50 0 -3.0 -3.5 CIN = 2.2mF COUT = 2.2mF CNR = 0mF -4.0 -4.5 -0.25 -40 -20 0 20 40 60 80 100 120 140 0 20 40 Junction Temperature (C) Submit Documentation Feedback 60 80 100 120 140 160 180 200 Time (ms) Figure 11. 6 40 Ambient Temperature (C) Figure 12. Copyright (c) 2010-2011, Texas Instruments Incorporated Product Folder Link(s): TPS72301-Q1 TPS72325-Q1 TPS72301-Q1 TPS72325-Q1 SLVSAJ4A - SEPTEMBER 2010 - REVISED MARCH 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) TPS723xx-Q1 at VIN = VOUTnom - 0.5V, IOUT = 1mA, VEN = 1.5V, COUT = 2.2F, and CNR = 0.01F, unless otherwise noted. LOAD TRANSIENT RESPONSE Current Load (mA) 0 0 -100 CIN = 2.2mF COUT = 2.2mF CNR = 0mF -200 0 20 40 60 80 100 120 140 160 DVOUT, Change In Output Voltage (mV) DVOUT, Change In Output Voltage (mV) Current Load (mA) LOAD TRANSIENT RESPONSE 100 100 0 0 -100 CIN = 2.2mF COUT = 2.2mF CNR = 0mF -200 180 200 0 20 40 60 80 Time (ms) START-UP RESPONSE Input Voltage (V) Output Voltage (mV) START-UP RESPONSE Output Voltage (mV) Figure 14. Input Voltage (V) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 2 0 1 CIN = 2.2mF COUT = 2.2mF IOUT = 50mA CNR = 0.01mF 2 3 1.0 0 0.1 0.2 0.4 0.5 0.6 0.7 Figure 15. Figure 16. POWER-UP/POWER-DOWN TOTAL NOISE vs CNR (10Hz to 100kHz) 250 0.8 0.9 1.0 Total Noise (mVRMS) VIN -1.0 -1.5 -2.0 CIN = 2.2mF COUT = 2.2mF IOUT = 50mA CNR = 0mF -2.5 -3.0 CIN = 2.2mF COUT = 2.2mF, IOUT = 100mA VOUT 200 Voltage (V) 0.3 Time (ms) 0.5 -0.5 180 200 0 Time (ms) 0 140 160 Figure 13. CIN = 2.2mF COUT = 2.2mF IOUT = 50mA CNR = 0mF 0 100 120 Time (ms) COUT = 10mF, IOUT = 100mA 150 COUT = 2.2mF, IOUT = 25mA 100 50 COUT = 10mF, IOUT = 25mA 0 -3.5 0 1 2 3 4 5 6 7 8 9 10 1 10 100 1k 10k 100k CNR (pF) Time (ms) Figure 17. Figure 18. Copyright (c) 2010-2011, Texas Instruments Incorporated Product Folder Link(s): TPS72301-Q1 TPS72325-Q1 Submit Documentation Feedback 7 TPS72301-Q1 TPS72325-Q1 SLVSAJ4A - SEPTEMBER 2010 - REVISED MARCH 2011 www.ti.com TYPICAL CHARACTERISTICS (continued) TPS723xx-Q1 at VIN = VOUTnom - 0.5V, IOUT = 1mA, VEN = 1.5V, COUT = 2.2F, and CNR = 0.01F, unless otherwise noted. OUTPUT NOISE vs TIME NOISE SPECTRAL DENSITY vs FREQUENCY Output Noise (100mV/div) Noise Spectral Density (VRMS/OHz) 10m CIN = -2.2mF, COUT = 2.2mF IOUT = 100mA, CNR = 0.01mF IOUT = 25mA 1m IOUT = 100mA 100n CIN = 0.01mF COUT = 2.2mF CNR = 0.01mF 10n Time (1ms/div) 100 1k 10k 100k Frequency (Hz) Figure 19. Figure 20. NOISE SPECTRAL DENSITY vs FREQUENCY PSRR vs FREQUENCY 90 Power-Supply Rejection Ratio (dB) Noise Spectral Density (VRMS/OHz) 10m IOUT = 100mA 1m IOUT = 25mA 100n CIN = 0mF COUT = 2.2mF CNR = 0.01mF 80 70 IOUT = 100mA 60 IOUT = 1mA 50 40 30 20 VIN = -5V CIN = 10mF COUT = 10mF CNR = 0mF 10 0 IOUT = 200mA -10 10n 100 1k 10k 10 100k 100 1k 10k 100k Frequency (Hz) Frequency (Hz) Figure 21. Figure 22. 1M 10M PSRR vs FREQUENCY Power-Supply Rejection Ratio (dB) 90 80 70 IOUT = 100mA 60 IOUT = 1mA 50 40 30 20 10 0 VIN = -5V CIN = 10mF COUT = 10mF CNR = 0.01mF IOUT = 200mA -10 10 100 1k 10k 100k 1M 10M Frequency (Hz) Figure 23. 8 Submit Documentation Feedback Copyright (c) 2010-2011, Texas Instruments Incorporated Product Folder Link(s): TPS72301-Q1 TPS72325-Q1 TPS72301-Q1 TPS72325-Q1 SLVSAJ4A - SEPTEMBER 2010 - REVISED MARCH 2011 www.ti.com APPLICATION INFORMATION DEVICE OPERATION POWER-SUPPLY REJECTION The TPS723xx-Q1 is a low-dropout negative linear voltage regulator with a rated current of 200mA. It features very low noise and high power-supply rejection ratio (PSRR), making it ideal for high-sensitivity analog and RF applications. A shutdown mode is available, reducing ground current to 2A maximum over temperature and process. The TPS723xx-Q1 is offered in a small SOT23 package and is specified over a -40C to +125C junction temperature range. The TPS723xx-Q1 offers a very high PSRR for applications with noisy input sources or highly sensitive output supply lines. For best PSRR, use high-quality input and output capacitors. ENABLE The enable pin is active above +1.5V and below -1.5V, allowing it to be controlled by a standard TTL signal or by connection to VI if not used. When driven to GND most internal circuitry is turned off, putting the TPS723xx-Q1 into shutdown mode, drawing 2A maximum ground current. CAPACITOR SELECTION FOR STABILITY Appropriate input and output capacitors should be used for the intended application. The TPS723xx-Q1 only requires a 2.2F ceramic output capacitor to be used for stable operation. Both the capacitor value and ESR affect stability, output noise, PSRR, and transient response. For typical applications, a 2.2F ceramic output capacitor located close to the regulator is sufficient. OUTPUT NOISE Without external bypassing, output noise of the TPS723xx-Q1 from 10Hz to 100kHz is 200VRMS typical. The dominant contributor to output noise is the internal bandgap reference. Adding an external 0.01F capacitor to ground reduces noise to 60VRMS. Best noise performance is achieved using appropriate low ESR capacitors for bypassing noise at the NR and OUT pins. See Figure 18 in the Typical Characteristics section. CURRENT LIMIT The TPS723xx-Q1 has internal circuitry that monitors and limits output current to protect the regulator from damage under all load conditions. When output current reaches the output current limit (550mA typical), protection circuitry turns on, reducing output voltage to ensure that current does not increase. See Figure 8 in the Typical Characteristics section. Do not drive the output more than 0.3V above the input. Doing so will bias the body diode in the pass FET, allowing current to flow from the output to the input. This current is not limited by the device. If this condition is expected, care should be taken to externally limit the reverse current. THERMAL PROTECTION As protection from damage due to excessive junction temperatures, the TPS723xx-Q1 has internal protection circuitry. When junction temperature reaches approximately +165C, the output device is turned off. After the device has cooled by about 20C, the output device is enabled, allowing normal operation. For reliable operation, design is for worst-case junction temperature of +125C taking into account worst-case ambient temperature and load conditions. Copyright (c) 2010-2011, Texas Instruments Incorporated Product Folder Link(s): TPS72301-Q1 TPS72325-Q1 Submit Documentation Feedback 9 PACKAGE OPTION ADDENDUM www.ti.com 13-May-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp TPS72301QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS72325QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (3) Samples (Requires Login) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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OTHER QUALIFIED VERSIONS OF TPS72301-Q1, TPS72325-Q1 : * Catalog: TPS72301, TPS72325 NOTE: Qualified Version Definitions: Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 13-May-2011 * Catalog - TI's standard catalog product Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 4-May-2011 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) TPS72301QDBVRQ1 SOT-23 DBV 5 3000 179.0 8.4 TPS72325QDBVRQ1 SOT-23 DBV 5 3000 179.0 8.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 3.2 3.2 1.4 4.0 8.0 Q3 3.2 3.2 1.4 4.0 8.0 Q3 PACKAGE MATERIALS INFORMATION www.ti.com 4-May-2011 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS72301QDBVRQ1 SOT-23 DBV 5 3000 203.0 203.0 35.0 TPS72325QDBVRQ1 SOT-23 DBV 5 3000 203.0 203.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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