3
2
4
5
DBV PACKAGE
(TOP VIEW)
1
GND
IN
EN
OUT
NR
On
On
Off
GND
+1.5V
-1.5V
OUT
NR
GND
EN
IN
3
2
4
1
5
Typical Application Circuit
2.2 Fm2.2 Fm
10nF
TPS72301-Q1
TPS72325-Q1
www.ti.com
SLVSAJ4A –SEPTEMBER 2010–REVISED MARCH 2011
200 mA Low-Noise, High-PSRR Negative Output Low-Dropout Linear Regulators
Check for Samples: TPS72301-Q1,TPS72325-Q1
1FEATURES APPLICATIONS
•Optical Drives
2•Qualified for Automotive Applications
•Optical Networking
•Ultralow Noise: 60 μVRMS Typical
•Noise Sensitive Circuitry
•High PSRR: 65 dB Typical at 1kHz
•GaAs FET Gate Bias
•Low Dropout Voltage: 280mV Typical at 200
mA, 2.5 V •Video Amplifiers
•Available in –2.5V and Adjustable (–1.2V DESCRIPTION
to –10V) Versions The TPS723xx-Q1 family of low-dropout (LDO)
•Stable With a 2.2 μF Ceramic Output Capacitor negative voltage regulator offers an ideal combination
•Less Than 2 μA Typical Quiescent Current in of features to support low noise applications. This
Shutdown Mode device is capable of operating with input voltages
•2% Overall Accuracy from –10V to –2.7V. The TPS72325-Q1 regulator is
stable with small, low-cost ceramic capacitors, and
(Line, Load, Temperature) include enable (EN) and noise reduction (NR)
•Thermal and Over-Current Protection functions. Thermal short-circuit and over-current
•SOT23-5 (DBV) Package protections are provided by internal detection and
•Operating Junction Temperature Range: –40°Cshutdown logic. High PSRR (65 dB at 1kHz) and low
noise (60μVRMS) make the TPS723xx-Q1 ideal for
to 125°Clow-noise applications.
The TPS723xx-Q1 uses a precision voltage reference
to achieve 2% overall accuracy over load, line, and
temperature variations. Available in a small SOT23-5
package, the TPS723xx-Q1 is fully specified over a
temperature range of –40°C to +125°C.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright ©2010–2011, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TPS72301-Q1
TPS72325-Q1
SLVSAJ4A –SEPTEMBER 2010–REVISED MARCH 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1) (2)
PRODUCT VOUT (2) TOP-SIDE MARKING
TPS72301QDBVRQ1 adjustable output voltage PPHQ
TPS72325QDBVRQ1 nominal output voltage = 2.5V PSBQ
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Output voltages from –1.2V to –9V in 100mV increments are available. Minimum order quantities apply; contact factory for details and
availability.
ABSOLUTE MAXIMUM RATINGS(1) (2)
Over operating temperature range, unless otherwise noted. VALUE UNITS
Input voltage range, VIN –11 to +0.3 V
Noise reduction pin voltage range, VNR –11 to +5.5 V
Enable voltage range, VEN –VIN to +5.5 V
Output current, IOUT Internally limited
Output short-circuit duration Indefinite
Continuous total power dissipation, PDSee Power Dissipation Ratings table
Junction temperature range, TJ–55 to +150 °C
Storage temperature range, Tstg –65 to +150 °C
Latch-up performance meets 100 mA per AEC-Q100 | Class I 100 mA
Human-Body Model 2000 kV
ESD ratings Machine Model 200 V
Charged-Device Model 500 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
POWER DISSIPATION RATINGS TA≤+25°c TA= +70°c TA= +85°c
DERATING FACTOR POWER POWER POWER
BOARD PACKAGE RθJC RθJA ABOVE TA= +25°c RATING RATING RATING
Low-K(1) DBV 64°C/W 255°C/W 3.9mW/°C 390mW 215mW 155mW
High-K(2) DBV 64°C/W 180°C/W 5.6mW/°C 560mW 310mW 225mW
(1) The JEDEC Low-K (1s) board design used to derive this data was a 3 inch ×3 inch, two-layer board with 2-ounce copper traces on top
of the board.
(2) The JEDEC High-K (2s2p) board design used to derive this data was a 3 inch ×3 inch, multilayer board with 1-ounce internal power and
ground planes and 2-ounce copper traces on the top and bottom of the board.
2Submit Documentation Feedback Copyright ©2010–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS72301-Q1 TPS72325-Q1
TPS72301-Q1
TPS72325-Q1
www.ti.com
SLVSAJ4A –SEPTEMBER 2010–REVISED MARCH 2011
ELECTRICAL CHARACTERISTICS
Over operating junction temperature range, VIN = VOUTnom –0.5V, IOUT = 1mA, VEN = 1.5V, COUT = 2.2μF, and CNR = 0.01μF,
unless otherwise noted. Typical values are at TJ= +25°C. TPS723xx-Q1
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
VIN Input voltage range(1) –10 –2.7 V
Nominal TJ= +25°C–1 1 %
TPS723xx-Q1
VOUT Accuracy –10V ≤VIN ≤VOUT –0.5V,
vs –2±1 2 %
10μA≤IOUT ≤200mA
VIN/IOUT/T
VOUT%/VIN Line regulation –10V ≤VIN ≤VOUT(nom) –0.5V 0.04 %/V
VOUT%/IOUT Load regulation 0mA ≤IOUT ≤200mA 0.002 %/mA
VDO Dropout voltage at VOUT = 0.96 ×VOUTnom IOUT = 200mA 280 500 mV
ICL Current limit VOUT = 0.85 ×VOUT(nom) 300 550 800 mA
IOUT = 0mA (IQ), 130 200
–10V ≤VIN ≤VOUT –0.5V
IGND Ground pin current μA
IOUT = 200mA, 350 500
–10V ≤VIN ≤VOUT –0.5V
–0.4V ≤VEN ≤0.4V,
ISHDN Shutdown ground pin current 0.1 2.0 μA
–10V ≤VIN ≤VOUT –0.5V
IOUT = 200mA, 1kHz, 65
CIN = COUT = 10μF
PSRR Power-supply rejection ratio dB
IOUT = 200mA, 10kHz, 48
CIN = COUT = 10μF
COUT = 10μF, 10Hz to 100kHz,
VnOutput noise voltage 60 μVRMS
IOUT = 200mA
VOUT =–2.5V, COUT = 1μF,
tSTR Startup time 1 ms
RL= 25Ω
VEN(HI) Enable threshold positive 1.5 V
VEN(LO) Enable threshold negative –1.5 V
VDIS(HI) Disable threshold positive 0.4 V
VDIS(LO) Disable threshold negative –0.4 V
–10V ≤VIN ≤VOUT –0.5V,
IEN Enable pin current 0.1 2.0 μA
–10V ≤VEN ≤ ±3.5V
Shutdown, temperature increasing +165
TSD Thermal shutdown temperature °C
Reset, temperature decreasing +145
TJOperating junction temperature –40 +125 °C
(1) Maximum VIN = (VOUT –VDO) or –2.7V, whichever is more negative.
Copyright ©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TPS72301-Q1 TPS72325-Q1
TPS72325
OUT
IN
EN
Current Limit
/Thermal
Protection
NR
VREF
1.186 V
5 pF
R1
R1 + R2 = 97 kW
R2
100 kW
GND
TPS72301-Q1
TPS72325-Q1
SLVSAJ4A –SEPTEMBER 2010–REVISED MARCH 2011
www.ti.com
FUNCTIONAL BLOCK DIAGRAM
TERMINAL FUNCTIONS
TERMINAL
NAME NO. DESCRIPTION
GND 1 Ground
IN 2 Input supply
Bipolar enable pin. Driving this pin above the positive enable threshold or below the negative enable
EN 3 threshold turns on the regulator. Driving this pin below the positive disable threshold and above the
negative disable threshold puts the regulator into shutdown mode.
Fixed voltage versions only. Connecting an external capacitor between this pin and ground, bypasses
NR 4 noise generated by the internal bandgap. This configuration allows output noise to be reduced to very
low levels.
Regulated output voltage. A small 2.2μF ceramic capacitor is needed from this pin to GND to ensure
OUT 5 stability.
4Submit Documentation Feedback Copyright ©2010–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS72301-Q1 TPS72325-Q1
-2.475
-2.488
-2.500
-2.513
-2.525
InputVoltage(V)
-10 -9-8-7-2
OutputVoltage(V)
T =+25 C
J°
T =+125 C
J°
T =+85°
JC
-6-5-4-3
T = 40- °
JC
-2.475
-2.488
-2.500
-2.513
-2.525
AmbientTemperature (°C)
-40 -20 0 20 40 60 80 100 120 140
OutputVoltage,V (V)
OUT
VIN OUT
=3V,I =200mA
VIN OUT
=10V,I =200mA
VIN =10V,IOUT =0mA
VIN OUT
=3V,I =0mA
350
300
250
200
150
100
50
0
OutputCurrent(mA)
0 25 50 75 100 125 150 175 200
DropoutVoltage(mV)
T =+25 C
J°
T = 40°
JC
-
T =+125 C
J°
350
300
250
200
150
100
50
0
JunctionTemperature( C)°
-40 -20 0 20 40 60 80 100 120 140
DropoutVoltage(mV)
500
450
400
350
300
250
200
150
100
50
0
InputVoltage(V)
-10 -9-8-7-6-5-4-3-2-1 0
GroundCurrent( A)m
NoLoad
R =12.5W
L
400
350
300
250
200
150
100
50
0
OutputCurrent(mA)
0 50 100 150 200
GroundCurrent( A)m
T =+25 C
J°
T =+125 C
J°
T = 40- °
JC
TPS72301-Q1
TPS72325-Q1
www.ti.com
SLVSAJ4A –SEPTEMBER 2010–REVISED MARCH 2011
TYPICAL CHARACTERISTICS
TPS723xx-Q1 at VIN = VOUTnom –0.5V, IOUT = 1mA, VEN = 1.5V, COUT = 2.2μF, and CNR = 0.01μF, unless otherwise noted.
OUTPUT VOLTAGE vs INPUT VOLTAGE OUTPUT VOLTAGE vs AMBIENT TEMPERATURE
Figure 1. Figure 2.
TPS723xx-Q1
DROPOUT VOLTAGE vs OUTPUT CURRENT DROPOUT VOLTAGE vs JUNCTION TEMPERATURE
Figure 3. Figure 4.
GROUND CURRENT vs INPUT VOLTAGE GROUND CURRENT vs OUTPUT CURRENT
Figure 5. Figure 6.
Copyright ©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): TPS72301-Q1 TPS72325-Q1
500
450
400
350
300
250
200
150
100
50
0
JunctionTemperature( C)°
-40 -20 0 20 40 60 80 100 120 140
GroundCurrent( A)m
V =3V,I =0mA
IN OUT
V =10V,I =0mA
IN OUT
V =10V,I =200mA
IN OUT
800
750
700
650
600
550
500
450
400
350
300
JunctionTemperature( C)°
-40 -20 0 20 40 60 80 100 120 140
CurrentLimit(mA)
250
200
150
100
50
0
JunctionTemperature( C)°
-40 -20 0 20 40 60 80 100 120 140
StandbyCurrent(nA)
V = 3V
IN -
V = 10V
IN -
1000
800
600
400
200
0
-200
-400
-600
-800
-1000
AmbientTemperature( C)°
-40 -20 0 20 40 60 80 100 120 140
EnablePinCurrent(nA)
V = 10V,V-
IN EN = 0.5V-
V = 10V,V-
IN EN = 10V-
V = 10V,V-
IN EN =3.5V
0.25
0.13
0
-0.13
-0.25
JunctionTemperature( C)°
-40 -20 0 20 40 60 80 100 120 140
LineRegulation(%/V)
LoadRegulation(%/mA)
Load
Line
100
50
0
-50
0
-3.0
-3.5
-4.0
-4.5
Time( s)m
0 20 40 60 80 100 120 140 160 180 200
OutputVoltage(mV)
InputVoltage(V)
C =2.2 F
IN m
C =2.2 F
OUT m
C =0 F
NR m
TPS72301-Q1
TPS72325-Q1
SLVSAJ4A –SEPTEMBER 2010–REVISED MARCH 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
TPS723xx-Q1 at VIN = VOUTnom –0.5V, IOUT = 1mA, VEN = 1.5V, COUT = 2.2μF, and CNR = 0.01μF, unless otherwise noted.
GROUND CURRENT vs JUNCTION TEMPERATURE CURRENT LIMIT vs JUNCTION TEMPERATURE
Figure 7. Figure 8.
STANDBY CURRENT vs JUNCTION TEMPERATURE ENABLE PIN CURRENT vs JUNCTION TEMPERATURE
Figure 9. Figure 10.
LINE AND LOAD REGULATION
vs JUNCTION TEMPERATURE LINE TRANSIENT RESPONSE
Figure 11. Figure 12.
6Submit Documentation Feedback Copyright ©2010–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS72301-Q1 TPS72325-Q1
100
0
0
-100
-200
Time( s)m
0 20 40 60 80 100 120 140 160 180 200
DV ,ChangeIn
OUT
OutputVoltage(mV)
CurrentLoad(mA)
C =2.2 F
IN m
C =2.2 F
OUT m
C =0 F
NR m
100
0
0
-100
-200
Time( s)m
0 20 40 60 80 100 120 140 160 180 200
CurrentLoad(mA)
DV ,ChangeIn
OUT
OutputVoltage(mV)
C =2.2 F
IN m
C =2.2 F
OUT m
C =0 F
NR m
Time(ms)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
OutputVoltage(mV)
InputVoltage(V)
CIN =2.2mF
COUT =2.2mF
I =50mA
OUT
CNR =0mF
Time(ms)
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
OutputVoltage(mV)
InputVoltage(V)
CIN =2.2mF
COUT =2.2mF
I =50mA
OUT
CNR =0.01mF
0
1
2
0
1
2
3
Time(ms)
0 1 2 3 4 5 6 7 8 9 10
Voltage(V)
CIN =2.2mF
COUT =2.2mF
I =50mA
OUT
CNR =0mF
0
0.5
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-3.5
VOUT
VIN
250
200
150
100
50
0
C (pF)
NR
1 10 100 1k 10k 100k
TotalNoise( V )mRMS
C =2.2
OUT OUT
mF,I =100mA
C =10
OUT OUT
mF,I =100mA
C =2.2 F,Im
OUT OUT =25mA
C =10 F,Im
OUT OUT =25mA
C =2.2m
IN F
TPS72301-Q1
TPS72325-Q1
www.ti.com
SLVSAJ4A –SEPTEMBER 2010–REVISED MARCH 2011
TYPICAL CHARACTERISTICS (continued)
TPS723xx-Q1 at VIN = VOUTnom –0.5V, IOUT = 1mA, VEN = 1.5V, COUT = 2.2μF, and CNR = 0.01μF, unless otherwise noted.
LOAD TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE
Figure 13. Figure 14.
START-UP RESPONSE START-UP RESPONSE
Figure 15. Figure 16.
TOTAL NOISE vs CNR
POWER-UP/POWER-DOWN (10Hz to 100kHz)
Figure 17. Figure 18.
Copyright ©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Link(s): TPS72301-Q1 TPS72325-Q1
Time(1ms/div)
OutputNoise(100 V/div)m
C 2.2m
IN =-F,C m
OUT =2.2 F
I =0.01m
OUT =100mA,CNR F
10m
1m
100n
10n
Frequency(Hz)
100 1k 10k 100k
NoiseSpectralDensity(V / )ÖHz
RMS
C =0.01 F
IN m
C =2.2 F
OUT m
C =0.01 F
NR m
I =100mA
OUT
I =25 A
OUT m
10m
1m
100n
10n
Frequency(Hz)
100 1k 10k 100k
NoiseSpectralDensity(V / )ÖHz
RMS
C =0 F
IN m
C =2.2 F
OUT m
C =0.01 F
NR m
I =100mA
OUT
I =25 A
OUT m
90
80
70
60
50
40
30
20
10
0
-10
Frequency(Hz)
10 100 1k 10k 100k 1M 10M
Power-SupplyRejectionRatio(dB)
V-
IN = 5V
Cm
IN =10 F
Cm
OUT =10 F
C =0
NR mF
I =1mA
OUT
I =200mA
OUT
I =100mA
OUT
90
80
70
60
50
40
30
20
10
0
-10
Frequency(Hz)
10 100 1k 10k 100k 1M 10M
Power-SupplyRejectionRatio(dB)
VIN =-5V
CIN =10mF
COUT =10mF
C =0.01
NR mF
I =1mA
OUT
I =200mA
OUT
I =100mA
OUT
TPS72301-Q1
TPS72325-Q1
SLVSAJ4A –SEPTEMBER 2010–REVISED MARCH 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
TPS723xx-Q1 at VIN = VOUTnom –0.5V, IOUT = 1mA, VEN = 1.5V, COUT = 2.2μF, and CNR = 0.01μF, unless otherwise noted.
OUTPUT NOISE vs TIME NOISE SPECTRAL DENSITY vs FREQUENCY
Figure 19. Figure 20.
NOISE SPECTRAL DENSITY vs FREQUENCY PSRR vs FREQUENCY
Figure 21. Figure 22.
PSRR vs FREQUENCY
Figure 23.
8Submit Documentation Feedback Copyright ©2010–2011, Texas Instruments Incorporated
Product Folder Link(s): TPS72301-Q1 TPS72325-Q1
TPS72301-Q1
TPS72325-Q1
www.ti.com
SLVSAJ4A –SEPTEMBER 2010–REVISED MARCH 2011
APPLICATION INFORMATION
DEVICE OPERATION POWER-SUPPLY REJECTION
The TPS723xx-Q1 is a low-dropout negative linear The TPS723xx-Q1 offers a very high PSRR for
voltage regulator with a rated current of 200mA. It applications with noisy input sources or highly
features very low noise and high power-supply sensitive output supply lines. For best PSRR, use
rejection ratio (PSRR), making it ideal for high-quality input and output capacitors.
high-sensitivity analog and RF applications. A
shutdown mode is available, reducing ground current CURRENT LIMIT
to 2μA maximum over temperature and process. The The TPS723xx-Q1 has internal circuitry that monitors
TPS723xx-Q1 is offered in a small SOT23 package and limits output current to protect the regulator from
and is specified over a –40°C to +125°C junction damage under all load conditions. When output
temperature range. current reaches the output current limit (550mA
typical), protection circuitry turns on, reducing output
ENABLE voltage to ensure that current does not increase. See
The enable pin is active above +1.5V and Figure 8 in the Typical Characteristics section.
below –1.5V, allowing it to be controlled by a Do not drive the output more than 0.3V above the
standard TTL signal or by connection to VIif not input. Doing so will bias the body diode in the pass
used. When driven to GND most internal circuitry is FET, allowing current to flow from the output to the
turned off, putting the TPS723xx-Q1 into shutdown input. This current is not limited by the device. If this
mode, drawing 2μA maximum ground current. condition is expected, care should be taken to
externally limit the reverse current.
CAPACITOR SELECTION FOR STABILITY
Appropriate input and output capacitors should be THERMAL PROTECTION
used for the intended application. The TPS723xx-Q1 As protection from damage due to excessive junction
only requires a 2.2μF ceramic output capacitor to be temperatures, the TPS723xx-Q1 has internal
used for stable operation. Both the capacitor value protection circuitry. When junction temperature
and ESR affect stability, output noise, PSRR, and reaches approximately +165°C, the output device is
transient response. For typical applications, a 2.2μFturned off. After the device has cooled by about 20°C,
ceramic output capacitor located close to the the output device is enabled, allowing normal
regulator is sufficient. operation. For reliable operation, design is for
worst-case junction temperature of ≤+125°C taking
OUTPUT NOISE into account worst-case ambient temperature and
load conditions.
Without external bypassing, output noise of the
TPS723xx-Q1 from 10Hz to 100kHz is 200μVRMS
typical. The dominant contributor to output noise is
the internal bandgap reference. Adding an external
0.01μF capacitor to ground reduces noise to
60μVRMS. Best noise performance is achieved using
appropriate low ESR capacitors for bypassing noise
at the NR and OUT pins. See Figure 18 in the Typical
Characteristics section.
Copyright ©2010–2011, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Link(s): TPS72301-Q1 TPS72325-Q1
PACKAGE OPTION ADDENDUM
www.ti.com 13-May-2011
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TPS72301QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TPS72325QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS72301-Q1, TPS72325-Q1 :
•Catalog: TPS72301, TPS72325
NOTE: Qualified Version Definitions:
PACKAGE OPTION ADDENDUM
www.ti.com 13-May-2011
Addendum-Page 2
•Catalog - TI's standard catalog product
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TPS72301QDBVRQ1 SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
TPS72325QDBVRQ1 SOT-23 DBV 5 3000 179.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3
PACKAGE MATERIALS INFORMATION
www.ti.com 4-May-2011
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TPS72301QDBVRQ1 SOT-23 DBV 5 3000 203.0 203.0 35.0
TPS72325QDBVRQ1 SOT-23 DBV 5 3000 203.0 203.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 4-May-2011
Pack Materials-Page 2
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