6-229
File Number
1558.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 |Copyright © Intersil Corporation 1999
RFP15N05L, RFP15N06L
15A, 50V and 60V, 0.140 Ohm, Logic Level
N-Channel Power MOSFETs
These are N-Channel enhancement mode silicon gate
power field effect transistors designed for applications such
as switching regulators, switching converters, motor drivers,
relay drivers and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA0522.
Features
• 15A, 50V and 60V
•r
DS(ON) = 0.140Ω
• Design Optimized for 5V Gate Drives
• Can be Driven from QMOS, NMOS, TTL Circuits
• Compatible with Automotive Drive Requirements
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Majority Carrier Device
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
Packaging
JEDEC TO-220AB
Ordering Information
PART NUMBER PACKAGE BRAND
RFP15N05L TO-220AB RFP15N05L
RFP15N06L TO-220AB RFP15N06L
NOTE: When ordering, use the entire part number.
D
G
S
SOURCE
DRAIN
GATE
DRAIN
(TAB)
Data Sheet July 1999
6-230
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified RFP15N05L RFP15N06L UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS 50 60 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 50 60 V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM 15
40 15
40 A
A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±10 ±10 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P
D
Above TC = 25oC, Derate Linearly. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
0.48 60
0.48 W
W/oC
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG -55 to 150 -55 to 150 oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300
260 300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ= 25oC to 125oC.
Electrical Specifications TC = 25oC, Unless Otherwise Specified
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V
RFP15N05L 50 - - V
RFP15N06L 60 - - V
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA (Figure 7) 1 - 2 V
Zero Gate Voltage Drain Current IDSS VDS = 48V, VDS = 50V - - 1 µA
VDS = 48V, VDS = 50V TC = 125oC--50µA
Gate to Source Leakage Current IGSS VGS = ±10V, VDS = 0V - - 100 nA
Drain to Source On Resistance (Note 2) rDS(ON) ID = 15A, VGS = 5V (Figures 5, 6) - - 0.140 Ω
Input Capacitance CISS VDS = 25V, VGS = 0V, f = 1MHz
(Figure 8) - - 900 pF
Output Capacitance COSS - - 450 pF
Reverse-Transfer Capacitance CRSS - - 200 pF
Turn-On Delay Time td(ON) VDD = 30V, ID = 7.5A, RG = 6.25Ω
(Figures 10, 11) -1640ns
Rise Time tr- 250 325 ns
Turn-Off Delay Time td(OFF) - 200 325 ns
Fall Time tfVGS = 5V - 225 325 ns
RθJC RFP15N05L, RFP15N06L - - 2.083 oC/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage (Note 2) VSD ISD = 7.5A - - 1.4 V
Diode Reverse Recovery Time trr ISD = 4A, dISD/dt = 100A/µs - 225 - ns
NOTE:
2. Pulsed: pulse duration = ≤ 300µs maximum, duty cycle = ≤ 2%.
3. Repititive rating: pulse width limited by maximum junction temperature.
RFP15N05L, RFP15N06L
6-231
Typical Performance Curves
Unless Otherwise Specified
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE FIGURE 2. FORWARD BIAS SAFE OPERATING AREA
FIGURE 3. SATURATION CHARACTERISTICS FIGURE 4. TRANSFER CHARACTERISTICS
FIGURE 5. DRAIN TO SOURCE ON RESISTANCE vs DRAIN
CURRENT FIGURE 6. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
0 50 100 150
0
TC, CASE TEMPERATURE (oC)
POWER DISSIPATION MULTIPLIER
0.2
0.4
0.6
0.8
1.0
1.2
1 10 100 1000
VDS, DRAIN SOURCE VOLTAGE (V)
100
10
1
0
ID, DRAIN CURRENT (A)
OPERATION IN
THIS AREA IS
LIMITED BY rDS(ON)
ID MAX CONTINUOUS
RFP15N06L
RFP15N05L
DC OPERATION
CURVES MUST BE
DERATED LINEARLY
WITH INCREASE IN
TEMPERATURE
TC = 25oC
VGS = 10V
012345
VDS, DRAIN TO SOURCE VOLTAGE (V)
40
30
20
10
0
IDS, DRAIN TO SOURCE CURRENT (A)
PULSE DURATION = 80µs
DUTY CYCLE ≤ 0.5% MAX
TC = 25oCVGS = 7.5V
VGS = 3.5V
VGS = 3V
VGS = 5V
VGS = 4.5V
VGS = 4V
VGS = 2V
VGS = 2.5V
01 2345
VGS, GATE TO SOURCE VOLTAGE (V)
16
14
12
10
8
6
4
2
0
IDS, DRAIN TO SOURCE CURRENT
-40oC
125oC
25oC
VDS = 10V
PULSE DURATION = 80µs
DUTY CYCLE ≤ 0.5% MAX
125oC-40oC
0246810121416
ID, DRAIN TO SOURCE CURRENT (A)
0
rDS(ON), DRAIN TO SOURCE
ON RESISTANCE (Ω)
VGS = 5V
PULSE DURATION = 80µs
DUTY CYCLE ≤ 0.5% MAX
0.3
0.2
0.1
TC = 125oC
25oC
-40oC
VGS = 10V, ID = 15A
2.0
1.5
1
0.5
0
-50 0 50 100 150 200
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
RFP15N05L, RFP15N06L
6-232
FIGURE 7. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE FIGURE 8. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 9. NORMALIZED SWITCHING WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
FIGURE 10. SWITCHING TIME TEST CIRCUIT FIGURE 11. RESISTIVE SWITCHING WAVEFORMS
Typical Performance Curves
Unless Otherwise Specified (Continued)
VGS = VDS
ID = 250µA
1.4
1.2
1
0.8
0.6
-50 0 50 100 150 200
TJ, JUNCTION TEMPERATURE (oC)
NORMALIZED GATE THRESHOLD
VOLTAGE
1600
1400
1200
1000
800
600
400
200
00 1020304050
VDS, DRAIN TO SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
CRSS
COSS
CISS
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD
60
45
30
15
0
10
8
6
4
2
0
GATE SOURCE
VOLTAGE
RL = 4Ω
IG(REF) = 0.5mA
VGS = 5V
DRAIN SOURCE VOLTAGE
DRAIN TO SOURCE VOLTAGE (V)
GATE TO SOURCE VOLTAGE (V)
IG (REF)
IG (ACT)
20 IG (REF)
IG (ACT)
80
t, TIME (µs)
BVDSS
VDD = BVDSS VDD = BVDSS
0.75BVDSS
0.50BVDSS
0.25BVDSS
VGS
RL
RG
DUT
+
-VDD
tON
td(ON)
tr
90%
10%
VDS 90%
10%
tf
td(OFF)
tOFF
90%
50%
50%
10% PULSE WIDTH
VGS
0
0
RFP15N05L, RFP15N06L
6-233
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is gr anted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see w eb site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
FIGURE 12. GATE CHARGE TEST CIRCUIT FIGURE 13. GATE CHARGE WAVEFORMS
Test Circuits and Waveforms
(Continued)
RL
VGS +
-
VDS
VDD
DUT
IG(REF)
VDD
Qg(TH)
VGS = 1V
Qg(5)
VGS = 5V
Qg(TOT)
VGS = 10V
VDS
VGS
IG(REF)
0
0
RFP15N05L, RFP15N06L
