HA5022/883 S E M I C O N D U C T O R Dual 125MHz Video Current Feedback Amplifier with Disable January 1995 Features Description * This Circuit is Processed in Accordance to MIL-STD883 and is Fully Conformant Under the Provisions of Paragraph 1.2.1. The HA5022/883 is a dual version of the popular Harris HA5020. It features wide bandwidth and high slew rate, and is optimized for video applications and gains between 1 and 10. It is a current feedback amplifier and thus yields less bandwidth degradation at high closed loop gains than voltage feedback amplifiers. * Dual Version of HA-5020 * Individual Output Enable/Disable * Wide Unity Gain Bandwidth . . . . . . . . . . . . . . . 125MHz The low differential gain and phase, 0.1dB gain flatness, and ability to drive two back terminated 75 cables, make this amplifier ideal for demanding video applications. * Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475V/s * Differential Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.03% The HA5022/883 also features a disable function that significantly reduces supply current while forcing the output to a true high impedance state. This functionality allows 2:1 video multiplexers to be implemented with a single IC. * Differential Phase. . . . . . . . . . . . . . . . . . . . . . . 0.03 Deg. * Supply Current (per Amplifier) . . . . . . . . . . . . . . .7.5mA * Crosstalk Rejection at 10MHz. . . . . . . . . . . . . . . . -60dB The current feedback design allows the user to take advantage of the amplifier's bandwidth dependency on the feedback resistor. By reducing RF , the bandwidth can be increased to compensate for decreases at higher closed loop gains or heavy output loads. * ESD Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000V * Guaranteed Specifications at 5V Supplies Applications * Video Multiplexers; Video Switching and Routing Ordering Information * Video Gain Block PART NUMBER * Video Distribution Amplifier/RGB Amplifier * Flash A/D Driver HA5022MJ/883 TEMPERATURE RANGE -55oC to +125oC PACKAGE 16 Lead CerDIP * Current to Voltage Converter * Radar and Imaging Systems * Medical Imaging Pinout HA5022/883 (CERDIP) TOP VIEW -IN1 1 16 OUT1 + 15 NC +IN1 2 DIS1 3 14 NC V- 4 13 V+ DIS2 5 12 NC +IN2 6 -IN2 7 NC 8 11 NC + - 10 OUT2 9 NC CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures. Copyright (c) Harris Corporation 1995 1 511107-883 File Number 3729.1 Spec Number Specifications HA5022/883 Absolute Maximum Ratings Thermal Information Voltage Between V+ and V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10V Voltage at Either Input Terminal . . . . . . . . . . . . . . . . . . . . . . V+ to VOutput Current . . . . . . . . . . . . . . . . . . . . Full Short Circuit Protected Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . < 2000V Storage Temperature Range . . . . . . . . . . . . . . -65oC TA +150oC Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300oC Thermal Resistance JA JC CerDIP Package . . . . . . . . . . . . . . . . . 75oC/W 20oC/W Maximum Package Power Dissipation at +75oC CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.33W Package Power Dissipation Derating Factor above +75oC CerDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.3mW/oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Operating Conditions Operating Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . 5V to 15V Operating Temperature Range . . . . . . . . . . . . .-55oC TA +125oC VINCM 1/2(V+ - V-) VDISABLE = V+ or 0V RL 50 RF = 1k TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS Device Tested at: VSUPPLY = 5V, AV = +1, RF = 1k, RSOURCE = 0, RL = 400, VOUT = 0V, VDISABLE = V+, Unless Otherwise Specified. LIMITS PARAMETERS Input Offset Voltage Common Mode Rejection Ratio Power Supply Rejection Ratio SYMBOL VIO CMRR PSRR Delta Input Offset Voltage Between Channels VIO Non-Inverting Input (+IN) Current IBSP +IN Current Common Mode Sensitivity Inverting Input (-IN) Current Between Channels Inverting Input (-IN) Current CMSIBP IBSN IBSN CONDITIONS GROUP A SUBGROUPS TEMPERATURE MIN MAX UNITS 1 +25oC -3 3 mV 2, 3 +125oC, -55oC -5 5 mV VCM = 0V VCM = 2.5V V+ = 2.5V, V- = -7.5V V+ = 7.5V, V- = -2.5V 1 +25 C 53 - dB 2 +125oC 38 - dB VCM = 2.25V V+ = 2.75V, V- = -7.25V V+ = 7.25V, V- = -2.75V 3 -55oC 38 - dB VSUP = 1.5V V+ = 6.5V, V- = -5V V+ = 3.5V, V- = -5V 1 +25oC 60 - dB 2, 3 +125oC, -55oC 55 - dB 1 +25oC - 3.5 mV 2,3 +125oC, -55oC - 3.5 mV 1 +25oC -8 8 A 2, 3 +125oC, -55oC -20 20 A VCM = 2.5V V+ = 2.5V, V- = -7.5V V+ = 7.5V, V- = -2.5V 1 +25oC - 0.15 A/V 2 +125oC - 2.0 A/V VCM = 2.25V V+ = 2.75V, V- = -7.25V V+ = 7.25V, V- = -2.75V 3 -55oC - 2.0 A/V VCM = 0 1 +25oC -15 15 A 2, 3 +125oC -30 30 A 1 +25oC -12 12 A 2, 3 +125oC, -55oC -30 30 A VCM = 0 VCM = 0V VCM = 0V o Spec Number 2 511107-883 Specifications HA5022/883 TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested at: VSUPPLY = 5V, AV = +1, RF = 1k, RSOURCE = 0, RL = 400, VOUT = 0V, VDISABLE = V+, Unless Otherwise Specified. LIMITS PARAMETERS -IN Current Common Mode Sensitivity -IN Current Power Supply Sensitivity +IN Current Power Supply Sensitivity Output Voltage Swing SYMBOL CMSIBN PSSIBN PSSIBP VOP VON Short Circuit Output Current +ISC -ISC Output Current +IOUT -IOUT CONDITIONS GROUP A SUBGROUPS ICC +AZOL1 -AZOL1 UNITS +25 C - 0.4 A/V 2 +125oC - 5 A/V VCM = 2.25V V+ = 2.75V, V- = -7.25V V+ = 7.25V, V- = -2.75V 3 -55oC - 5 A/V VSUP = 1.5V V+ = 6.5V, V- = -5V V+ = 3.5V, V- = -5V 1 +25oC - 0.2 A/V 2, 3 +125oC, -55oC - 0.5 A/V 1 +25oC - 0.1 A/V 2, 3 +125oC, -55oC - 0.3 A/V 1 +25oC 2.5 - V 2, 3 +125oC, -55oC 2.5 - V 1 +25oC - -2.5 V 2, 3 +125oC, -55oC - -2.5 V 1 +25oC 50 - mA 2, 3 +125oC, -55oC 50 - mA 1 +25oC - -40 mA 2, 3 +125oC, -55oC - -40 mA 1 +25oC 20 - mA 2, 3 +125oC, -55oC 16.6 - mA 1 +25oC - -20 mA - -16.6 mA - 10 mA/Op Amp - 10 mA/Op Amp -10 - mA/Op Amp -10 - mA/Op Amp VSUP = 1.5V V+ = 6.5V, V- = -5V V+ = 3.5V, V- = -5V AV = +1 VIN = -3V RL = 150 VIN = -3V AV = +1 VIN = +3V RL = 150 VIN = +3V VIN = 2.5V VOUT = 0V VIN = 2.5V VOUT = 0V Note 1 Note 1 RL = 400 1 RL = 400 1 2, 3 Transimpedance MAX 1 2, 3 IEE MIN VCM = 2.5V V+ = 2.5V, V- = -7.5V V+ = 7.5V, V- = -2.5V 2, 3 Quiescent Power Supply Current TEMPERATURE o +125o o C, -55 C +25oC +125oC, -55oC +25oC +125oC, -55oC RL = 400 VOUT = 2.5V 1 +25oC 1 - M 2 +125oC 0.5 - M VOUT = 2.25V 3 -55oC 0.5 - M 1 +25oC 1 - M 2 +125oC 0.5 - M 3 -55oC 0.5 - M RL = 400 VOUT = 2.5V VOUT = 2.25V Spec Number 3 511107-883 Specifications HA5022/883 TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Tested at: VSUPPLY = 5V, AV = +1, RF = 1k, RSOURCE = 0, RL = 400, VOUT = 0V, VDISABLE = V+, Unless Otherwise Specified. LIMITS PARAMETERS Disabled Output Current SYMBOL +ILEAK -ILEAK Disable Pin Input Current Minimum DISABLE Pin Current to Disable Maximum DISABLE Pin Current to Enable Disabled Power Supply Current ILOGIC IDIS CONDITIONS GROUP A SUBGROUPS VIN = 0V, VOUT = +2.5V RL = Open, VDIS = 0V VIN = 0V, VOUT = -2.5V RL = Open, VDIS = 0V IEEDIS MAX UNITS +25 C - 1 A 2, 3 +125oC, -55oC - 2 A 1 +25oC - 1 A o 2, 3 +125 C, -55 C - 2 A 1 +25oC -1.0 - mA 2, 3 +125oC, -55oC -1.5 - mA 1 +25oC - 350 A 2, 3 +125oC, -55oC - 350 A 1 +25oC 20 - A 2, 3 +125oC, -55oC 20 - A 1 +25oC - 7.5 mA/Op Amp 2, 3 +125oC, -55oC - 7.5 mA/Op Amp 1 +25oC 7.5 - mA/Op Amp VDIS = 0V Note 3 ICCDIS MIN 1 Note 2 IEN TEMPERATURE RL = Open, VDIS = 0V RL = Open, VDIS = 0V o o NOTES: 1. Guaranteed from VOUT Test with RL = 150, by: IOUT = VOUT/150. 2. RL = 100, VIN = 2.5V. This is the minimum current which must be pulled out of the Disable pin in order to disable the output. The output is considered disabled when -10mV VOUT +10mV. 3. VIN = 0V. This is the maximum current that can be pulled out of the Disable pin with the HA5022/883 remaining enabled. The HA5022/883 is considered disabled when the supply current has decreased by at least 0.5mA. TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS Table 2 Intentionally Left Blank. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS Device Characterized at: VSUPPLY = 5V, AV = +2, RF = 681, RL = 400, Unless Otherwise Specified. LIMITS PARAMETERS -3dB Bandwidth Gain Flatness SYMBOL CONDITIONS NOTES TEMPERATURE MIN MAX UNITS BW(+1) AV = +1, RF = 1K VOUT = 100mVRMS 1 +125oC, -55oC 70 - MHz BW(+2) AV = +2, VOUT = 100mVRMS 1 +125oC, -55oC 70 - MHz GF5 AV = +2, f 5MHz VOUT = 100mVRMS 1 +125oC, -55oC - 0.045 dB GF10 AV = +2, f 10MHz VOUT = 100mVRMS 1 +125oC, -55oC - 0.085 dB GF20 AV = +2, f 20MHz VOUT = 100mVRMS 1 +125oC, -55oC - 0.65 dB Spec Number 4 511107-883 Specifications HA5022/883 TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) Device Characterized at: VSUPPLY = 5V, AV = +2, RF = 681, RL = 400, Unless Otherwise Specified. LIMITS PARAMETERS SYMBOL Slew Rate Rise and Fall Time Overshoot Propagation Delay CONDITIONS NOTES TEMPERATURE MIN MAX UNITS +SR(+1) AV = +1, RF = 1K VOUT = -2V to +2V 1, 4 +125oC, -55oC 300 - V/s -SR(+1) AV = +1, RF = 1K VOUT = +2V to -2V 1, 4 +125oC, -55oC 270 - V/s +SR(+2) AV = +2, VOUT = -2V to +2V 1, 4 +125oC, -55oC 465 - V/s -SR(+2) AV = +2, VOUT = +2V to -2V 1, 4 +125oC, -55oC 350 - V/s TR AV = +2, VOUT = -0.5V to -0.5V 1, 2 +125oC, -55oC - 5.5 ns TF AV = +2, VOUT = +0.5V to +0.5V 1, 2 +125oC, -55oC - 6.0 ns +OS AV = +2, VOUT = -0.5V to +0.5V 1, 3 +125oC, -55oC - 35 % -OS AV = +2, VOUT = +0.5V to -0.5V 1, 3 +125oC, -55oC - 27 % +TP AV = +2, RF = 681 VOUT = 0V to 1V 1, 2 +125oC, -55oC - 10 ns -TP AV = +2, RF = 681 VOUT = 1V to 0V 1, 2 +125oC, -55oC - 9.5 ns NOTES: 1. Parameters listed in Table 3 are controlled via design or process parameters and are not directly tested at final production. These parameters are lab characterized upon initial design release, or upon design changes. These parameters are guaranteed by characterization based upon data from multiple production runs which reflect lot-to-lot and within lot variation. 2. Measured between 10% and 90% points. 3. For 200ps input transition times. Overshoot decreases as input transition times increase, especially for AV = +1. Please refer to Performance Curves. 4. Measured between 25% and 75% points. TABLE 4. ELECTRICAL TEST REQUIREMENTS MIL-STD-883 TEST REQUIREMENTS SUBGROUPS (SEE TABLE 1) Interim Electrical Parameters (Pre Burn-In) 1 Final Electrical Test Parameters 1 (Note 1), 2, 3, 4 Group A Test Requirements 1, 2, 3, 4 Groups C and D Endpoints 1 NOTE: 1. PDA applies to Subgroup 1 only. Spec Number 5 511107-883 HA5022/883 Test Circuits and Waveforms V+ + ICC VIN 0.1 0.1 470pF +IBIAS = 1K 13 2 - K2 1 VOUT DUT 510 200pF 1K 16, 10 1K 2, 6 + x100 K2 = POSITION 2: VX -IBIAS = 50K 0.1 100 0.1 1, 7 + - VX 0.1 510 K1 NC K2 = POSITION 1: VX VIO = 100 10 3, 5 4 100 400 K5 100K (0.01%) 50 VZ 100K VZ + 0.1 + 10 0.1 HA-5177 NOTE: All Resistors = 1% () All Capacitors = 10% (F) Unless Otherwise Noted Chip Components Recommended K3 IEE K6 NC 0.1 VVD FIGURE 1. TEST CIRCUIT (Applies to Table 1) + DUT 50 HP4195 NETWORK ANALYZER 50 FIGURE 2. TEST CIRCUIT FOR TRANSIMPEDANCE MEASUREMENTS VIN + VIN DUT VOUT - 50 + DUT VOUT - 50 RL 100 RI 681 RL 400 RF , 681 RF , 1K FIGURE 4. LARGE SIGNAL PULSE RESPONSE CIRCUIT FIGURE 3. SMALL SIGNAL PULSE RESPONSE CIRCUIT FIGURE 6. LARGE SIGNAL RESPONSE Vertical Scale: VIN = 1V/Div., VOUT = 1V/Div. Horizontal Scale: 50ns/Div. FIGURE 5. SMALL SIGNAL RESPONSE Vertical Scale: VIN = 100mV/Div., VOUT = 100mV/Div. Horizontal Scale: 20ns/Div. Spec Number 6 511107-883 HA5022/883 Burn-In Circuit HA5022MJ/883 CERAMIC DIP R3 R2 1 R1 2 D4 VD2 C2 + 16 15 3 14 4 13 5 12 D3 V+ C1 D1 R4 6 R5 7 + - 11 10 9 8 R6 NOTES: R1 = R2 = R4 = R5 = 1k, 5% (Per Socket) R3 = R6 = 10k, 5% (Per Socket) C1 = C2 = 0.01F (Per Socket) or 0.1F (Per Row) Minimum D1 = D2 = 1N4002 or Equivalent (Per Board) D3 = D4 = 1N4002 or Equivalent (Per Socket) V+ = +5.5V 0.5V V- = -5.5V 0.5V Spec Number 7 511107-883 HA5022/883 Die Characteristics DIE DIMENSIONS: 65 x 100 x 19 mils 1 mils 1650 x 2540 x 483m 25.4m METALLIZATION: Type: Metal 1: AlCu (1%), Metal 2: AlCu (1%) Thickness: Metal 1: 8kA 0.4kA, Metal 2: 16kA 0.8kA WORST CASE CURRENT DENSITY: 1.62 x 105 A/cm2 at 35mA SUBSTRATE POTENTIAL (Powered Up): VGLASSIVATION: Type: Nitride Thickness: 4kA 0.4kA TRANSISTOR COUNT: 124 PROCESS: Bipolar Dielectric Isolation Metallization Mask Layout -IN1 OUT1 HA5022/883 V+ +IN1 DIS1 VNC DIS2 -IN2 OUT2 +IN2 Spec Number 8 511107-883 HA5022/883 Ceramic Dual-In-Line Frit Seal Packages (CerDIP) c1 F16.3 MIL-STD-1835 GDIP1-T16 (D-2, CONFIGURATION A) LEAD FINISH 16 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE -D- -A- BASE METAL INCHES (c) E b1 M M (b) -Bbbb S C A-B S SECTION A-A D S D BASE PLANE Q -C- SEATING PLANE A L S1 eA A A b2 b ccc M C A-B S e D S eA/2 c aaa M C A - B S D S SYMBOL MIN MAX MIN MAX NOTES A - 0.200 - 5.08 - b 0.014 0.026 0.36 0.66 2 b1 0.014 0.023 0.36 0.58 3 b2 0.045 0.065 1.14 1.65 - b3 0.023 0.045 0.58 1.14 4 c 0.008 0.018 0.20 0.46 2 c1 0.008 0.015 0.20 0.38 3 D - 0.840 - 21.34 5 E 0.220 0.310 5.59 7.87 5 e 0.100 BSC 2.54 BSC - eA 0.300 BSC 7.62 BSC - 3.81 BSC - eA/2 NOTES: 1. Index area: A notch or a pin one identification mark shall be located adjacent to pin one and shall be located within the shaded area shown. The manufacturer's identification shall not be used as a pin one identification mark. MILLIMETERS 0.150 BSC L 0.125 0.200 3.18 5.08 - Q 0.015 0.060 0.38 1.52 6 S1 0.005 - 0.13 - 7 90o 105o 90o 105o - aaa - 0.015 - 0.38 - bbb - 0.030 - 0.76 - 3. Dimensions b1 and c1 apply to lead base metal only. Dimension M applies to lead plating and finish thickness. ccc - 0.010 - 0.25 - M - 0.0015 - 0.038 2, 3 4. Corner leads (1, N, N/2, and N/2+1) may be configured with a partial lead paddle. For this configuration dimension b3 replaces dimension b2. N 2. The maximum limits of lead dimensions b and c or M shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 16 16 8 Rev. 0 4/94 5. This dimension allows for off-center lid, meniscus, and glass overrun. 6. Dimension Q shall be measured from the seating plane to the base plane. 7. Measure dimension S1 at all four corners. 8. N is the maximum number of terminal positions. 9. Dimensioning and tolerancing per ANSI Y14.5M - 1982. 10. Controlling dimension: INCH. Spec Number 9 511107-883 HA5022 S E M I C O N D U C T O R DESIGN INFORMATION Dual 125MHz Video Current Feedback Amplifier with Disable January 1995 The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified. +5 +5 VOUT = 0.2VP-P CL = 10pF AV = 1, RF = 1k +3 AV = 2, RF = 681 +2 AV = 5, RF = 1k +1 0 -1 -2 -3 +3 +1 AV = -2 0 -1 -2 AV = -10 AV = -5 -4 2 10 FREQUENCY (MHz) 100 -5 200 2 10 200 FIGURE 2. INVERTING FREQUENCY RESPONSE +135 -45 +90 AV = -1, RF = 750 -135 +45 AV = +10, RF = 383 -100 0 -225 -45 -270 -90 AV = -10, RF = 750 -135 -315 VOUT = 0.2VP-P CL = 10pF -360 130 120 5 -180 10 100 GAIN PEAKING 200 500 700 FREQUENCY (MHz) FIGURE 3. PHASE RESPONSE AS A FUNCTION OF FREQUENCY 900 1100 1300 FEEDBACK RESISTOR () 0 1500 FIGURE 4. BANDWIDTH AND GAIN PEAKING vs FEEDBACK RESISTANCE 100 130 -3dB BANDWIDTH 90 10 5 GAIN PEAKING (dB) 95 -3dB BANDWIDTH (MHz) VOUT = 0.2VP-P CL = 10pF AV = +2 120 -3dB BANDWIDTH 110 6 100 4 90 GAIN PEAKING GAIN PEAKING 350 10 -3dB BANDWIDTH 500 650 800 950 FEEDBACK RESISTOR () 80 0 1100 0 200 400 VOUT = 0.2VP-P CL = 10pF AV = +1 600 800 0 1000 LOAD RESISTOR () FIGURE 5. BANDWIDTH AND GAIN PEAKING vs FEEDBACK RESISTANCE FIGURE 6. BANDWIDTH AND GAIN PEAKING vs LOAD RESISTANCE 10 2 GAIN PEAKING (dB) -90 VOUT = 0.2VP-P CL = 10pF AV = +1 GAIN PEAKING (dB) +180 -3dB BANDWIDTH (MHz) AV = +1, RF = 1k INVERTING PHASE (DEGREES) 140 0 2 -3dB BANDWIDTH (MHz) 100 FREQUENCY (MHz) FIGURE 1. NON-INVERTING FREQUENCY RESPONSE NONINVERTING PHASE (DEGREES) AV = -1 +2 -3 AV = 10, RF = 383 -4 -5 VOUT = 0.2VP-P CL = 10pF RF = 750 +4 NORMALIZED GAIN (dB) NORMALIZED GAIN (dB) +4 HA5022 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified. (Continued) 16 VOUT = 0.2VP-P CL = 10pF AV = +10 VOUT = 0.1VP-P CL = 10pF VSUPPLY = 5V, AV = +2 60 OVERSHOOT (%) -3dB BANDWIDTH (MHz) 80 40 12 VSUPPLY = 15V, AV = +2 6 20 VSUPPLY = 5V, AV = +1 VSUPPLY = 15V, AV = +1 0 200 350 500 650 FEEDBACK RESISTOR () 800 0 950 FIGURE 7. BANDWIDTH vs FEEDBACK RESISTANCE 0 200 FREQUENCY = 3.58MHz DIFFERENTIAL PHASE (DEGREES) DIFFERENTIAL GAIN (%) 0.08 RL = 75 0.06 RL = 150 0.04 0.02 RL = 1k 0.06 0.04 RL = 150 RL = 75 0.02 RL = 1k 0.00 0.00 3 5 7 9 11 SUPPLY VOLTAGE (V) 13 3 15 FIGURE 9. DIFFERENTIAL GAIN vs SUPPLY VOLTAGE 5 7 9 11 SUPPLY VOLTAGE (V) 13 15 FIGURE 10. DIFFERENTIAL PHASE vs SUPPLY VOLTAGE -40 VOUT = 2.0VP-P CL = 30pF AV = +1 0 -10 REJECTION RATIO (dB) -50 HD2 DISTORTION (dBc) 1000 0.08 FREQUENCY = 3.58MHz -60 3RD ORDER IMD HD2 HD3 -20 -30 -40 CMRR -50 -60 NEGATIVE PSRR -70 -80 -80 POSITIVE PSRR HD3 -90 0.3 800 FIGURE 8. SMALL SIGNAL OVERSHOOT vs LOAD RESISTANCE 0.10 -70 400 600 LOAD RESISTANCE () 1 FREQUENCY (MHz) 0.001 10 FIGURE 11. DISTORTION vs FREQUENCY 0.01 0.1 FREQUENCY (MHz) 1 10 FIGURE 12. REJECTION RATIOS vs FREQUENCY 11 30 HA5022 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified. (Continued) 12 RL = 100 VOUT = 1.0VP-P AV = +1 RLOAD = 100 VOUT = 1.0VP-P PROPAGATION DELAY (ns) 7.5 7.0 6.5 10 AV = +10, RF = 383 8 AV = +2, RF = 681 6 AV = +1, RF =1k 4 6.0 -50 -25 0 +25 +50 TEMPERATURE (oC) +75 +100 +125 3 FIGURE 13. PROPAGATION DELAY vs TEMPERATURE 15 VOUT = 0.2VP-P CL = 10pF +0.6 450 +0.4 + SLEW RATE 400 NORMALIZED GAIN (dB) SLEW RATE (V/s) 13 +0.8 VOUT = 20VP-P 350 - SLEW RATE 300 250 200 150 +0.2 AV= +2, RF = 681 0 -0.2 -0.4 AV= +5, RF = 1k -0.6 AV = +1, RF = 1k -0.8 -1.0 100 -50 -25 0 +25 +50 +75 TEMPERATURE (oC) +100 +125 5 VOLTAGE NOISE (nV/Hz) AV = -1 0 -0.2 -0.4 -0.6 AV = -5 -0.8 AV = -2 AV = -10 5 10 25 30 1000 AV = 10, RF = 383 +0.2 -1.0 15 20 FREQUENCY (MHz) 100 VOUT = 0.2VP-P CL = 10pF RF = 750 +0.4 10 FIGURE 16. NON-INVERTING GAIN FLATNESS vs FREQUENCY +0.8 +0.6 AV = 10, RF =383 -1.2 FIGURE 15. SLEW RATE vs TEMPERATURE NORMALIZED GAIN (dB) 7 9 11 SUPPLY VOLTAGE (V) FIGURE 14. PROPAGATION DELAY vs SUPPLY VOLTAGE 500 -1.2 5 15 20 25 -INPUT NOISE CURRENT 80 800 600 60 +INPUT NOISE CURRENT 40 400 20 200 0 0.01 0.1 30 1 10 FREQUENCY (kHz) 0 100 +INPUT NOISE VOLTAGE FREQUENCY (MHz) FIGURE 17. INVERTING GAIN FLATNESS vs FREQUENCY FIGURE 18. INPUT NOISE CHARACTERISTICS 12 CURRENT NOISE (pA/Hz) PROPAGATION DELAY (ns) 8.0 HA5022 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified. (Continued) 1.5 BIAS CURRENT (A) 2 VIO (mV) 1.0 0.5 0.0 -60 -40 -20 0 +20 +40 +60 TEMPERATURE -2 -4 -60 +80 +100 +120 +140 -40 -20 0 +60 +80 +100 +120 +140 TEMPERATURE ( C) 4000 TRANSIMPEDANCE (k) 20 18 16 -60 -40 -20 0 +20 +40 +60 3000 2000 1000 -60 +80 +100 +120 +140 -40 -20 0 TEMPERATURE (oC) +20 +40 +60 +80 +100 +120 +140 TEMPERATURE (oC) FIGURE 21. -INPUT BIAS CURRENT vs TEMPERATURE FIGURE 22. TRANSIMPEDANCE vs TEMPERATURE 74 25 20 REJECTION RATIO (dB) +55oC 15 10 4 5 6 7 70 68 -PSRRN 66 64 62 CMRR 60 +25oC 3 +PSRR 72 +125oC ICC (mA) +40 FIGURE 20. +INPUT BIAS CURRENT vs TEMPERATURE 22 5 +20 o (oC) FIGURE 19. INPUT OFFSET VOLTAGE vs TEMPERATURE BIAS CURRENT (A) 0 8 9 10 11 12 13 14 58 -100 15 -50 0 +50 +100 +150 +200 TEMPERATURE (oC) SUPPLY VOLTAGE (V) FIGURE 23. SUPPLY CURRENT vs SUPPLY VOLTAGE FIGURE 24. REJECTION RATIO vs TEMPERATURE 13 +250 HA5022 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified. (Continued) 4.0 30 +10V +5V OUTPUT SWING (V) SUPPLY CURRENT (mA) 40 +15V 20 3.8 10 0 0 1 2 3 4 5 6 7 8 9 3.6 -60 10 11 12 13 14 15 -40 -20 0 FIGURE 25. SUPPLY CURRENT vs DISABLE INPUT VOLTAGE +40 +60 +80 +100 +120 +140 FIGURE 26. OUTPUT SWING vs TEMPERATURE 30 1.2 VCC = 15V 1.1 VIO (mV) 20 VOUT (VP-P) +20 TEMPERATURE (oC) DISABLE INPUT VOLTAGE (V) VCC = 10V 1.0 10 0.9 VCC = 4.5V 0.8 0 0.01 0.10 1.00 -60 10.00 -40 -20 0 FIGURE 27. OUTPUT SWING vs LOAD RESISTANCE +40 +60 +80 +100 +120 +140 FIGURE 28. INPUT OFFSET VOLTAGE CHANGE BETWEEN CHANNELS vs TEMPERATURE 30 1.5 -55oC 25 1.0 +25oC 20 ICC (mA) BIAS CURRENT (A) +20 TEMPERATURE (oC) LOAD RESISTANCE (k) 0.5 15 10 0.0 -60 +125oC 5 -40 -20 0 +20 +40 +60 +80 +100 +120 +140 TEMPERATURE (oC) 3 FIGURE 29. INPUT BIAS CURRENT CHANGE BETWEEN CHANNELS vs TEMPERATURE 4 5 6 7 8 9 10 11 SUPPLY VOLTAGE (V) 12 13 FIGURE 30. DISABLE SUPPLY CURRENT vs SUPPLY VOLTAGE 14 14 15 HA5022 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design information only. No guarantee is implied. Typical Performance Curves VSUPPLY = 5V, AV = +1, RF = 1k, RL = 400, TA = 25oC, Unless Otherwise Specified. (Continued) 18 30 -40 ENABLE 28 ENABLE TIME (ns) SEPARATION (dBc) 20 32 AV = +1 VOUT = 2VP-P -50 -60 16 14 26 ENABLE 24 12 22 10 20 8 18 6 DISABLE 4 16 -70 14 -80 0.1 1 FREQUENCY (MHz) 10 2 DISABLE 12 -2.5 -2.0 -1.5 -1.0 30 DISABLE TIME (s) -30 -0.5 0 0.5 1.0 1.5 2.0 0 2.5 OUTPUT VOLTAGE (V) FIGURE 31. CHANNEL SEPARATION vs FREQUENCY FIGURE 32. ENABLE/DISABLE TIME vs OUTPUT VOLTAGE 10 RL = 100 1 -30 -40 -50 -60 -70 0.1 0.01 180 0.001 135 90 45 0 -45 -80 1 FREQUENCY (MHz) 10 0.001 20 FIGURE 33. DISABLE FEEDTHROUGH vs FREQUENCY 0.01 0.1 1 10 FREQUENCY (MHz) 10 RL = 400 1 0.1 0.01 180 0.001 135 90 45 0 -45 -90 -135 0.001 0.01 -135 100 FIGURE 34. TRANSIMPEDANCE vs FREQUENCY 0.1 1 10 FREQUENCY (MHz) 100 FIGURE 35. TRANSIMPEDANCE vs FREQUENCY 15 PHASE ANGLE (DEGREES) 0.1 -90 PHASE ANGLE (DEGREES) -20 TRANSIMPEDANCE (M) FEEDTHROUGH (dB) -10 DISABLE = 0V VIN = 5VP-P RF = 750 TRANSIMPEDANCE (M) 0 HA5022 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design information only. No guarantee is implied. Application Information Driving Capacitive Loads Optimum Feedback Resistor Capacitive loads will degrade the amplifier's phase margin resulting in frequency response peaking and possible oscillations. In most cases the oscillation can be avoided by placing an isolation resistor (R) in series with the output as shown in Figure 36. The plots of inverting and non-inverting frequency response, see Figure 1 and Figure 2 in the Typical Performance Curves section, illustrate the performance of the HA5022 in various closed loop gain configurations. Although the bandwidth dependency on closed loop gain isn't as severe as that of a voltage feedback amplifier, there can be an appreciable decrease in bandwidth at higher gains. This decrease may be minimized by taking advantage of the current feedback amplifier's unique relationship between bandwidth and RF. All current feedback amplifiers require a feedback resistor, even for unity gain applications, and RF , in conjunction with the internal compensation capacitor, sets the dominant pole of the frequency response. Thus, the amplifier's bandwidth is inversely proportional to RF . The HA5022 design is optimized for a 1000 RF at a gain of +1. Decreasing RF in a unity gain application decreases stability, resulting in excessive peaking and overshoot. At higher gains the amplifier is more stable, so RF can be decreased in a trade-off of stability for bandwidth. The table below lists recommended RF values for various gains, and the expected bandwidth. RF () BANDWIDTH (MHz) -1 750 100 +1 1000 125 +2 681 95 +5 1000 52 +10 383 65 -10 750 22 R + VOUT - RT CL RF RI FIGURE 36. PLACEMENT OF THE OUTPUT ISOLATION RESISTOR, R The selection criteria for the isolation resistor is highly dependent on the load, but 27 has been determined to be a good starting value. Power Dissipation Considerations Due to the high supply current inherent in dual amplifiers, care must be taken to insure that the maximum junction temperature (TJ, see Absolute Maximum Ratings) is not exceeded. Figure 37 shows the maximum ambient temperature versus supply voltage for the available package styles. It is recommended that thermal calculations, which take into account output power, be performed by the designer. 175 MAX. AMBIENT TEMPERATURE GAIN (ACL) VIN PC Board Layout The frequency response of this amplifier depends greatly on the amount of care taken in designing the PC board. The use of low inductance components such as chip resistors and chip capacitors is strongly recommended. If leaded components are used the leads must be kept short especially for the power supply decoupling components and those components connected to the inverting input. 165 CERDIP 155 145 135 125 115 5 7 9 11 13 15 SUPPLY VOLTAGE (V) Attention must be given to decoupling the power supplies. A large value (10F) tantalum or electrolytic capacitor in parallel with a small value (0.1F) chip capacitor works well in most cases. FIGURE 37. MAXIMUM OPERATING AMBIENT TEMPERATURE vs SUPPLY VOLTAGE A ground plane is strongly recommended to control noise. Care must also be taken to minimize the capacitance to ground seen by the amplifier's inverting input (-IN). The larger this capacitance, the worse the gain peaking, resulting in pulse overshoot and possible instability. It is recommended that the ground plane be removed under traces connected to IN, and that connections to -IN be kept as short as possible to minimize the capacitance from this node to ground. 16 Enable/Disable Function When enabled the amplifier functions as a normal current feedback amplifier with all of the data in the electrical specifications table being valid and applicable. When disabled the amplifier output assumes a true high impedance state and the supply current is reduced significantly. The circuit shown in Figure 38 is a simplified schematic of HA5022 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design information only. No guarantee is implied. the enable/disable function. The large value resistors in series with the DISABLE pin makes it appear as a current source to the driver. When the driver pulls this pin low current flows out of the pin and into the driver. This current, which may be as large as 350A when external circuit and process variables are at their extremes, is required to insure that point "A" achieves the proper potential to disable the output. The driver must have the compliance and capability of sinking all of this current. of the actual signal switching takes place within the amplifier, it's differential gain and phase parameters, which are 0.03% and 0.03 degrees respectively, determine the circuit's performance. The other circuit, U1b, operates in a similar manner. When the plus supply rail is 5V the disable pin can be driven by a dedicated TTL gate as discussed earlier. If a multiplexer IC or its equivalent is used to select channels its logic must be break before make. When these conditions are satisfied the HA5022 is often used as a remote video multiplexer, and the multiplexer may be extended by adding more amplifier ICs. +VCC R6 15K R10 R33 Low Impedance Multiplexer QP18 D1 R7 15K R8 Two common problems surface when you try to multiplex multiple high speed signals into a low impedance source such as an A/D converter. The first problem is the low source impedance which tends to make amplifiers oscillate and causes gain errors. The second problem is the multiplexer which supplies no gain, introduces all kinds of distortion and limits the frequency response. Using op amps which have an enable/disable function, such as the HA5022, eliminates the multiplexer problems because the external mux chip is not needed, and the HA5022 can drive low impedance (large capacitance) loads if a series isolation resistor is used. A QP3 ENABLE/DISABLE INPUT FIGURE 38. SIMPLIFIED SCHEMATIC OF ENABLE/DISABLE FUNCTION When VCC is +5V the DISABLE pin may be driven with a dedicated TTL gate. The maximum low level output voltage of the TTL gate, 0.4V, has enough compliance to insure that the amplifier will always be disabled even though D1 will not turn on, and the TTL gate will sink enough current to keep point "A" at its proper voltage. When VCC is greater than +5 volts the DISABLE pin should be driven with an open collector device that has a breakdown rating greater than VCC . Referring to Figure 40, both inputs are terminated in their characteristic impedance; 75 is typical for video applications. Since the drivers usually are terminated in their characteristic impedance the input gain is 0.5, thus the amplifiers, U2, are configured in a gain of +2 to set the circuit gain equal to one. Resistors R2 and R3 determine the amplifier gain, and if a different gain is desired R2 should be changed according to the equation G = (1 + R3/R2). R3 sets the frequency response of the amplifier so you should refer to the manufacturers data sheet before changing it's value. R5, C1 and D1 are an asymmetrical charge/discharge time circuit which configures U1 as a break before make switch to prevent both amplifiers from being active simultaneously. If this design is extended to more channels the drive logic must be designed to be break before make. R4 is enclosed in the feedback loop of the amplifier so that the large open loop amplifier gain of U2 will present the load with a small closed loop output impedance while keeping the amplifier stable for all values of load capacitance. Referring to Figure 8, it can be seen that R6 will act as a pull-up resistor to +VCC if the DISABLE pin is left open. In those cases where the enable/disable function is not required on all circuits some circuits can be permanently enabled by letting the DISABLE pin float. If a driver is used to set the enable/disable level, be sure that the driver does not sink more than 20A when the DISABLE pin is at a high level. TTL gates, especially CMOS versions, do not violate this criteria so it is permissible to control the enable/disable function with TTL. Two Channel Video Multiplexer Referring to the amplifier U1A in Figure 39, R1 terminates the cable in its characteristic impedance of 75, and R4 back terminates the cable in its characteristic impedance. The amplifier is set up in a gain configuration of +2 to yield an overall network gain of +1 when driving a double terminated cable. The value of R3 can be changed if a different network gain is desired. R5 holds the disable pin at ground thus inhibiting the amplifier until the switch, S1, is thrown to position 1. At position 1 the switch pulls the disable pin up to the plus supply rail thereby enabling the amplifier. Since all The circuit shown in Figure 40 was tested for the full range of capacitor values with no oscillations being observed; thus, problem one has been solved. The frequency and gain characteristics of the circuit are now those of the amplifier independent of any multiplexing action; thus, problem two has been solved. The multiplexer transition time is approximately 15s with the component values shown. 17 HA5022 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design information only. No guarantee is implied. R4 75 U1A 3 1 + 2 - VIDEO INPUT #1 R1 75 VIDEO OUTPUT TO 75 LOAD 4 R5 2000 R2 681 R3 681 1 2 R9 75 U1B 8 10 9 VIDEO INPUT #2 R6 75 3 +5V S1 ALL OFF 7 R8 681 R11 100 R10 2000 R7 681 NOTES: 1. U1 is HA5022 +5V IN +5V -5V IN 2. All resistors in -5V 3. S1 is break before make + 10F 0.1F 4. Use ground plane 10F 0.1F + FIGURE 39. TWO CHANNEL HIGH IMPEDANCE MULTIPLEXER R3A 681 INPUT B R1A 681 R1A 75 U2A 16 1 2 INPUT A + -5V 3 D1A 1N4148 R1B 75 4 R4A 27 0.01F R5A 2000 U1C R2B 681 C1A 0.047F CHANNEL SWITCH R3B 681 7 U2B - 10 6 + 13 5 R4B 27 OUTPUT +5V 0.01F R5B 2000 INHIBIT U1A R6 100K U1B U1D D1B 1N4148 C1B 0.047F FIGURE 40. LOW IMPEDANCE MULTIPLEXER 18 NOTES: 1. U2: HA5022 2. U1: CD4011 Specifications HA5022 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design information only. No guarantee is implied. Electrical Specifications V+ = +5V, V- = -5V, RF = 1k, AV = +1, RL = 400, CL 10pF, Unless Otherwise Specified (NOTE 12) TEST LEVEL TEMPERATURE MIN TYP MAX UNITS A +25oC - 0.8 3 mV A Full - - 5 mV Delta VIO Between Channels A Full - 1.2 3.5 mV Average Input Offset Voltage Drift B Full - 5 - V/oC VIO Common Mode Rejection Ratio (Note 3) A +25oC 53 - - dB A Full 50 - - dB A +25oC 60 - - dB A Full 55 - - dB Input Common Mode Range (Note 3) A Full 2.5 - - V Non-Inverting Input (+IN) Current A +25oC - 3 8 A A Full - - 20 A A +25oC - - 0.15 A/V A Full - - 0.5 A/V A +25oC - - 0.1 A/V A Full - - 0.3 A/V A +25oC, +85oC - 4 12 A A -40oC - 10 30 A A +25oC, +85oC - 6 15 A A -40oC - 10 30 A A +25oC - - 0.4 A/V A Full - - 1.0 A/V A +25oC - - 0.2 A/V A Full - - 0.5 A/V Input Noise Voltage (f = 1kHz) B +25oC - 4.5 - nV/Hz +Input Noise Current (f = 1kHz) B +25oC - 2.5 - pA/Hz -Input Noise Current (f = 1kHz) B +25oC - 25.0 - pA/Hz PARAMETER HA5022I INPUT CHARACTERISTICS Input Offset Voltage (VIO) VIO Power Supply Rejection Ratio (Note 4) +IN Common Mode Rejection (Note 3) 1 ------) (+ IBCMR = R IN +IN Power Supply Rejection (Note 4) Inverting Input (-IN) Current Delta -IN BIAS Current Between Channels -IN Common Mode Rejection (Note 3) -IN Power Supply Rejection (Note 4) 19 Specifications HA5022 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design information only. No guarantee is implied. Electrical Specifications V+ = +5V, V- = -5V, RF = 1k, AV = +1, RL = 400, CL 10pF, Unless Otherwise Specified (Continued) (NOTE 12) TEST LEVEL TEMPERATURE MIN TYP MAX UNITS A +25oC 1.0 - - M A Full 0.85 - - M A +25oC 70 - - dB A Full 65 - - dB A +25oC 50 - - dB A Full 45 - - dB A +25oC 2.5 3.0 - V A Full 2.5 3.0 - V Output Current (Note 20) B Full 16.6 20.0 - mA Output Current (Short Circuit, Note 13) A Full 40 60 - mA Output Current (Disabled, Notes 5, 14) A Full - - 2 A Output Disable Time (Note 15) B +25oC - 40 - s Output Enable Time (Note 16) B +25oC - 40 - ns Output Capacitance (Disabled, Notes 5, 17) B +25oC - 15 - pF Supply Voltage Range A +25oC 5 - 15 V Quiescent Supply Current A Full - 7.5 10 mA/Op Amp Supply Current, Disabled (Note 5) A Full - 5 7.5 mA/Op Amp Disable Pin Input Current (Note 5) A Full - 1.0 1.5 mA Minimum Pin 8 Current to Disable (Note 6) A Full 350 - - A Maximum Pin 8 Current to Enable (Note 7) A Full - - 20 A Slew Rate (Note 8) B +25oC 275 400 - V/s Full Power Bandwidth (Note 9) B +25oC 22 28 - MHz Rise Time (Note 10) B +25oC - 6 - ns PARAMETER HA5022I TRANSFER CHARACTERISTICS Transimpedance (Note 21) Open Loop DC Voltage Gain RL = 400, VOUT = 2.5V Open Loop DC Voltage Gain RL = 100, VOUT = 2.5V OUTPUT CHARACTERISTICS Output Voltage Swing (Note 20) POWER SUPPLY CHARACTERISTICS AC CHARACTERISTICS (AV = +1) 20 Specifications HA5022 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design information only. No guarantee is implied. Electrical Specifications V+ = +5V, V- = -5V, RF = 1k, AV = +1, RL = 400, CL 10pF, Unless Otherwise Specified (Continued) (NOTE 12) TEST LEVEL TEMPERATURE MIN TYP MAX UNITS Fall Time (Note 10) B +25oC - 6 - ns Propagation Delay (Note 10) B +25oC - 6 - ns Overshoot B +25oC - 4.5 - % -3dB Bandwidth (Note 11) B +25oC - 125 - MHz Settling Time to 1%, 2V Output Step B +25oC - 50 - ns Settling Time to 0.25%, 2V Output Step B +25oC - 75 - ns Slew Rate (Note 8) B +25oC - 475 - V/s Full Power Bandwidth (Note 9) B +25oC - 26 - MHz Rise Time (Note 10) B +25oC - 6 - ns Fall Time (Note 10) B +25oC - 6 - ns Propagation Delay (Note 10) B +25oC - 6 - ns Overshoot B +25oC - 12 - % -3dB Bandwidth (Note 11) B +25oC - 95 - MHz Settling Time to 1%, 2V Output Step B +25oC - 50 - ns Settling Time to 0.25%, 2V Output Step B +25oC - 100 - ns 5MHz B +25oC - 0.02 - dB 20MHz B +25oC - 0.07 - dB Slew Rate (Note 8) B +25oC 350 475 - V/s Full Power Bandwidth (Note 9) B +25oC 28 38 - MHz Rise Time (Note 10) B +25oC - 8 - ns Fall Time (Note 10) B +25oC - 9 - ns Propagation Delay (Note 10) B +25oC - 9 - ns Overshoot B +25oC - 1.8 - % -3dB Bandwidth (Note 11) B +25oC - 65 - MHz Settling Time to 1%, 2V Output Step B +25oC - 75 - ns Settling Time to 0.1%, 2V Output Step B +25oC - 130 - ns PARAMETER HA5022I AC CHARACTERISTICS (AV = +2, RF = 681) Gain Flatness AC CHARACTERISTICS (AV = +10, RF = 383) 21 Specifications HA5022 DESIGN INFORMATION (Continued) The information contained in this section has been developed through characterization by Harris Semiconductor and is for use as application and design information only. No guarantee is implied. Electrical Specifications V+ = +5V, V- = -5V, RF = 1k, AV = +1, RL = 400, CL 10pF, Unless Otherwise Specified (Continued) (NOTE 12) TEST LEVEL TEMPERATURE MIN TYP MAX UNITS Differential Gain (Notes 18, 20) B +25oC - 0.03 - % Differential Phase (Notes 18, 20) B +25oC - 0.03 - Degrees PARAMETER HA5022I VIDEO CHARACTERISTICS NOTES: 1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit may be impaired. Functional operation under any of these conditions is not necessarily implied. 2. Output is protected for short circuits to ground. Brief short circuits to ground will not degrade reliability, however, continuous (100% duty cycle) output current should not exceed 15mA for maximum reliability. 3. VCM = 2.5V. At -40oC Product is tested at VCM = 2.25V because short test duration does not allow self heating. 4. 3.5V VS 6.5V. 5. Disable = 0V. 6. RL = 100, VIN = 2.5V. This is the minimum current which must be pulled out of the Disable pin in order to disable the output. The output is considered disabled when -10mV VOUT +10mV. 7. VIN = 0V. This is the maximum current that can be pulled out of the Disable pin with the HA5024 remaining enabled. The HA5024 is considered disabled when the supply current has decreased by at least 0.5mA. 8. VOUT switches from -2V to +2V, or from +2V to -2V. Specification is from the 25% to 75% points. 9. FPBW Slew Rate - ; V PEAK = = ------------------ 2V 2V PEAK 10. RL = 100, VOUT = 1V. Measured from 10% to 90% points for rise/fall times; from 50% points of input and output for propagation delay. 11. RL = 400, VOUT = 100mV. 12. A. Production Tested; B. Guaranteed Limit or Typical based on characterization; C. Design Typical for information only. 13. VIN = 2.5V, VOUT = 0V. 14. VOUT = 2.5V, VIN = OV. 15. VIN = +2V, Disable = +5V to 0V. Measured from the 50% point of Disable to VOUT = 0V. 16. VIN = +2V, Disable = 0V to +5V. Measured from the 50% point of Disable to VOUT = 2V. 17. VIN = 0V, Force VOUT from 0V to 2.5V, tR = tF = 50ns. 18. Measured with a VM700A video tester using an NTC-7 composite VITS. 19. Maximum power dissipation, including output load, must be designed to maintain junction temperature below +175oC for die, and below +150oC for plastic packages. See Applications Information section for safe operating area information. 20. RL = 150 . 21. VOUT = 2.5V. At -40oC Product is tested at VOUT = 2.25V because short test duration does not allow self heating. 22. ESD Protection is for human body model tested per MIL-STD-883, Method 3015.7. 22