Subject to change without notice Page 1Jan-01
Gen. Product Macro-
Cells Vcc
(V) Speed
(ns) Power
ATF1500A/AL 32 5 7-15/20 Std/Low
ATF1500ABV 32 3.3 12-15 Std
ATF1502AS/ASL 32 5 7-15/20 Std/Low
ATF1502ASV/ASVL 32 3.3 15/20 Std/Low
ATF1504AS/ASL 64 5 7-15/20 Std/Low
ATF1504ASV/ASVL 64 3.3 15/20 Std/Low
ATF1508AS/ASL 128 57-15/20 Std/Low
1st Generation
ATF1508ASV/ASVL 128 3.3 15/20 Std/Low
ATF1502SE/SEL 32 5 6-10/15 Std/Low
ATF1502AE/AEL 32 3.3 4-10/15 Std/Low
ATF1504SE/SEL 64 5 5-10/15 Std/Low
ATF1504AE/AEL 64 3.3 4-10/15 Std/Low
ATF1508SE/SEL 128 56-15/15 Std/Low
ATF1508AE/AEL 128 3.3 5-10/15 Std/Low
ATF1516SE/SEL 256 57-15/15 Std/Low
ATF1516AE/AEL 256 3.3 5-10/15 Std/Low
2nd Generation
ATF1532AE/AEL 512 3.3 5-10/15 Std/Low
DESCRIPTION
The Atmel ATF15xx Family of
Complex Programmable Logic
Devices delivers enhanced
functionality and flexibility with
no additional design effort. Our
superior Logic Doubling™
architecture consists of wider
fan-in, additional global routing
and clock options, and
macrocell enhancements that
allow PLD designers to pack in
more logic, particularly latches
and shifters. This dense
packing of logic stretches CPLD
resources by as much as 200%
or more, enabling use of a
smaller device or spare room for revisions. Factory programming is available, so for old or new designs,
prototypes or production, look to Atmel’s growing line of pin-compatible CPLDs.
FEATURES
q Logic-Doubling™
– Bury either Register or COM while using
the other for Output
– Independent feedback allows double latch
functions per MacroCell
– 5 Product Terms per MacroCell,
Expandable to 40
– D/T/L Configurable Flip-flops
– Global and/or per macrocell Register
Control Signals
– Multiple Global and per macrocell Clocks
– Global and/or per macrocell Output Enable
– Programmable Output Slew Rate per
MacroCell
– Programmable Output Open Collector
Option per MacroCell
q Advanced Power Management Features
– Input Transition Detection Standby / 5 µA
typical for “L” version
– Pin-controlled sub 1 mA Standby Mode
– Programmable Pin-keeper Inputs and I/Os
– Per MacroCell Low Power Option
– Power-up Reset Hysteresis Option
q EEPROM CPLDs
– 32 - 256 Macrocells
– Pin-compatible with Industry Standard devices
– Completely Reprogrammable
– 10,000 Program/Erase Cycles
– 20 Year Data Retention
– 2000V ESD Protection
– 200 mA Latch-up Immunity
– 100% Tested
Atmel Programmable Logic Devices
ATF15xx CPLD Family Overview
Family
Website: www.atmel.com
PLD Email: PLD@Atmel.com
PLD Hotline: (408) 436-4333
FAX-on-demand: (800) 292-8635
