DGN-8 THS3001 D-8 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 420-MHz HIGH-SPEED CURRENT-FEEDBACK AMPLIFIER FEATURES APPLICATIONS * * * * * * * * * * High Speed - 420 MHz Bandwidth (G = 1, -3 dB) - 6500 V/s Slew Rate - 40-ns Settling Time (0.1%) High Output Drive, IO = 100 mA Excellent Video Performance - 115 MHz Bandwidth (0.1 dB, G = 2) - 0.01% Differential Gain - 0.02 Differential Phase Low 3-mV (max) Input Offset Voltage Very Low Distortion - THD = -96 dBc at f = 1 MHz - THD = -80 dBc at f = 10 MHz Wide Range of Power Supplies - VCC = 4.5 V to 16 V Evaluation Module Available Communication Imaging High-Quality Video THS3001 D OR DGN PACKAGE (TOP VIEW) NC IN- IN+ 1 8 2 7 3 6 VCC- 4 5 NC VCC+ OUT NC NC - No internal connection RELATED DEVICES THS41011/2 290-MHz VFB High-Speed Amplifier THS6012 500-mA CFB HIgh-Speed Amplifier THS6022 250-mA CFB High-Speed Amplifier DESCRIPTION The THS3001 is a high-speed current-feedback operational amplifier, ideal for communication, imaging, and high-quality video applications. This device offers a very fast 6500-V/s slew rate, a 420-MHz bandwidth, and 40-ns settling time for large-signal applications requiring excellent transient response. In addition, the THS3001 operates with a very low distortion of -96 dBc, making it well suited for applications such as wireless communication basestations or ultrafast ADC or DAC buffers. HARMONIC DISTORTION vs FREQUENCY -75 -80 8 Gain = 2 VCC = 15 V VO = 2 VPP RL = 150 RF = 750 -85 6 3rd Harmonic -90 2nd Harmonic -95 5 1M f - Frequency - Hz 10M VCC = 5 V RF = 750 4 3 2 1 0 -100 100k VCC = 15 V RF = 680 7 Output Amplitude - dB Harmonic Distortion - dBc -70 OUTPUT AMPLITUDE vs FREQUENCY G=2 RL = 150 VI = 200 mV RMS -1 100k 1M 10M 100M f - Frequency - Hz 1G These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 1998-2005, Texas Instruments Incorporated THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 AVAILABLE OPTIONS (1) PACKAGED DEVICE TA 0C to 70C -40C to 85C SOIC (D) MSOP (DGN) THS3001CD THS3001CDGN THS3001CDR THS3001CDGNR THS3001HVCD THS3001HVCDGN THS3001HVCDR THS3001HVCDGNR THS3001ID THS3001IDGN THS3001IDR THS3001IDGNR THS3001HVID THS3001HVIDGN THS3001HVIDR (1) MSOP SYMBOL THS3001HVIDGNR TRANSPORT MEDIA, QUANTITY EVALUATION MODULE Rails, 75 THS3001EVM ADP Tape and Reel, 2500 -- Rails, 75 -- BNK Tape and Reel, 2500 -- Rails, 75 -- ADQ Tape and Reel, 2500 -- Rails, 75 -- BNJ Tape and Reel, 2500 -- For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) THS3001 THS3001HV UNITS 33 37 V VCC VCC V Output current 175 175 mA Differential input voltage 6 6 V VSS Supply voltage, VCC+ to VCC- VI Input voltage IO VID Continuous total power dissipation TJ TJ TA Tstg Maximum junction temperature See Dissipation Rating Table (2) Operating free-air temperature (2) (3) 150 C 125 125 C 0 to 70 0 to 70 C THS3001I, THS3001HVI -40 to 85 -40 to 85 C -65 to 125 -65 to 125 C 300 300 C Storage temperature Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds (1) 150 THS3001C, THS3001HVC Maximum junction temperature, continuous operation, long term reliability (3) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. The absolute maximum temperature under any condition is limited by the constraints of the silicon process. The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may result in reduced reliability and/or lifetime of the device. DISSIPATION RATING TABLE (1) (2) 2 POWER RATING (2) PACKAGE JC (C/W) JA (1) (C/W) TA 25C TA = 85C D (8) 38.3 97.5 1.02 W 410 mW DGN (8) 4.7 58.4 1.71 W 685 mW This data was taken using the JEDEC standard High-K test PCB. Power rating is determined with a junction temperature of 125C. This is the point where distortion starts to substantially increase. Thermal management of the final PCB should strive to keep the junction temperature at or below 125C for best performance and long term reliability. THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 RECOMMENDED OPERATING CONDITIONS MIN Split supply VSS Supply voltage, VCC+ and VCC- THS3001C, THS3001I Single supply Split supply THS3001HVC, THS3001HVI Single supply TA Operating free-air temperature 4.5 MAX UNIT 16 9 32 4.5 18.5 9 37 0 70 -40 85 THS3001C, THS3001HVC THS3001I, THS3001HVI NOM V C ELECTRICAL CHARACTERISITCS TA = 25C, RL = 150 , RF = 1 k (unless otherwise noted) TEST CONDITIONS (1) PARAMETER Split supply VCC Power supply operating range Single supply VCC = 5 V ICC VCC = 15 V Quiescent current VCC = 18.5 V, THS3001HV VCC = 5 V VO Output voltage swing VCC = 15 V VCC = 5 V or 15 V Input offset voltage drift VCC = 5 V or 15 V VCC = 5 V or 15 V Negative (IN-) VICR Common-mode input voltage range Open loop transresistance CMRR Common-mode rejection ratio 33 THS3001HVx 9 TA = 25C TA = full range 6.6 TA = full range 6.9 TA = full range 9 mA 9.5 10.5 2.9 3.2 3 3.3 RL = 150 12.1 12.8 RL = 1 k 12.8 13.1 V 100 85 TA = 25C mA 120 1 TA = full range 3 4 5 2 TA = full range 1 mV V/C 10 15 TA = 25C VCC = 15 V 10 A 15 3 3.2 12.9 13.2 VCC = 5 V, VO = 2.5 V, RL = 1 k 1.3 VCC = 15 V, VO = 7.5 V, RL = 1 k 2.4 VCC = 5 V, VCM = 2.5 V 62 70 VCC = 15 V, VCM = 10 V 65 73 TA = 25C 65 76 TA = full range 63 TA = 25C 69 TA = full range 67 Power supply rejection ratio 7.5 10 TA = 25C RL = 1 k V 8.5 TA = 25C RL = 150 UNIT 37 5.5 TA = full range VCC = 15 V (1) (2) 9 VCC = 5 V VCC = 5 V PSRR 18.5 TA = 25C Positive (IN+) Input bias current 4.5 THS3001C THS3001I RL = 75 Input offset voltage IIB THS3001HVx VCC = 15 V, VIO MAX 16.5 RL = 20 Output current (2) TYP 4.5 VCC = 5 V, IO MIN THS3001C THS3001I 76 V M dB dB dB Full range = 0C to 70C for the THS3001C and -40C to 85C for the THS3001I. Observe power dissipation ratings to keep the junction temperature below absolute maximum when the output is heavily loaded or shorted. See absolute maximum ratings section. 3 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 ELECTRICAL CHARACTERISITCS (continued) TA = 25C, RL = 150 , RF = 1 k (unless otherwise noted) TEST CONDITIONS (1) PARAMETER MIN TYP MAX UNIT Positive (IN+) 1.5 M Negative (IN-) 15 7.5 pF RI Input resistance CI Differential input capacitance RO Output resistance Open loop at 5 MHz 10 Vn Input voltage noise VCC = 5 V or 15 V, f = 10 kHz, G = 2 1.6 nV/Hz In Input current noise Positive (IN+) Negative (IN-) 13 VCC = 5 V or 15 V, f = 10 kHz, G = 2 pA/Hz 16 OPERATING CHARACTERISTICS TA = 25C, RL = 150 , RF = 1 k (unless otherwise noted) PARAMETER SR Slew rate (1) VCC = 5 V, VO(PP) = 4 V G=5 1300 VCC = 15 V, VO(PP) = 20 V G = -5 6500 G=5 6300 Gain = -1, 40 Settling time to 0.1% VCC = 5 V, 0 V to 2 V Step, Gain = -1, 25 Total harmonic distortion VCC = 15 V, fc = 10 MHz, VO(PP) = 2 V, G=2 Differential gain error G = 2, 40 IRE modulation, 100 IRE Ramp, NTSC and PAL G = 2, 40 IRE modulation, 100 IRE Ramp, NTSC and PAL Small signal bandwidth (-3 dB) BW Bandwidth for 0.1 dB flatness Full power bandwidth (2) MAX UNIT V/s ns -80 VCC = 5 V 0.015% VCC = 15 V 0.01% VCC = 5 V 0.01 VCC = 15 V 0.02 dBc VCC = 5 V 330 MHz VCC= 15 V 420 MHz G = 2, RF = 750 , VCC = 5 V 300 G = 2, RF = 680 , VCC = 15 V 385 G = 5, RF = 560 , VCC = 15 V 350 G = 2, RF = 750 , VCC = 5 V 85 G = 2, RF = 680 , VCC = 15 V 115 VCC = 5 V, VO(PP) = 4 V, RL = 500 G = -5 65 G=5 62 VCC = 15 V, VO(PP) = 20 V, RL = 500 G = -5 32 G=5 31 G = 1, RF = 1 k 4 TYP 1700 Settling time to 0.1% Differential phase error (1) (2) MIN G = -5 VCC = 15 V, 0 V to 10 V Step ts THD TEST CONDITIONS Slew rate is measured from an output level range of 25% to 75%. Full power bandwidth is defined as the frequency at which the output has 3% THD. MHz MHz MHz THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 PARAMETER MEASUREMENT INFORMATION RG RF VCC+ - VO + VI 50 VCC- RL Figure 1. Test Circuit, Gain = 1 + (RF/RG) TYPICAL CHARACTERISTICS Table of Graphs FIGURE |VO| Output voltage swing vs Free-air temperature 2 ICC Current supply vs Free-air temperature 3 IIB Input bias current vs Free-air temperature 4 VIO Input offset voltage vs Free-air temperature 5 vs Common-mode input voltage 6 vs Common-mode input voltage 7 vs Frequency 8 CMRR Common-mode rejection ratio Transresistance vs Free-air temperature 9 Closed-loop output impedance vs Frequency 10 Vn Voltage noise vs Frequency 11 In Current noise vs Frequency 11 vs Frequency 12 vs Free-air temperature 13 PSRR SR Power supply rejection ratio Slew rate Normalized slew rate vs Supply voltage vs Output step peak-to-peak vs Gain 14 15, 16 17 vs Peak-to-peak output voltage swing 18, 19 vs Frequency 20, 21 Differential gain vs Loading 22, 23 Differential phase vs Loading 24, 25 Output amplitude vs Frequency 26-30 Normalized output response vs Frequency Harmonic distortion Small and large signal frequency response 31-34 35, 36 Small signal pulse response 37, 38 Large signal pulse response 39 - 46 5 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 OUTPUT VOLTAGE SWING vs FREE-AIR TEMPERATURE 14 9 VCC = 15 V No Load 8 13 VCC = 15 V RL = 150 12.5 ICC - Supply Current - mA VO - Output Voltage Swing - V 13.5 CURRENT SUPPLY vs FREE-AIR TEMPERATURE 12 4 3.5 VCC = 5 V No Load 3 VCC = 5 V RL = 150 2.5 2 -40 -20 0 20 40 60 VCC = 15 V 7 6 VCC = 10 V 5 VCC = 5 V 4 80 3 -40 100 -20 TA - Free-Air Temperature - C 60 INPUT BIAS CURRENT vs FREE-AIR TEMPERATURE INPUT OFFSET VOLTAGE vs FREE-AIR TEMPERATURE 80 100 0 VCC = 5 V -1 VCC = 15 V -1.5 VCC = 5 V -2 IIB+ -0.2 VIO - Input Offset Voltage - mV I IB - Input Bias Current - A 40 Figure 3. IIB+ IIB- VCC = 15 V -2.5 -20 0 20 40 60 TA - Free-Air Temperature - C Figure 4. 80 VCC = 5 V -0.4 -0.6 VCC = 15 V -0.8 -1 Gain = 1 RF = 1 k IIB- 6 20 Figure 2. -0.5 -3 -40 0 TA - Free-Air Temperature - C 100 -1.2 -40 -20 0 20 40 60 TA - Free-Air Temperature - C Figure 5. 80 100 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 COMMON-MODE REJECTION RATIO vs COMMON-MODE INPUT VOLTAGE COMMON-MODE REJECTION RATIO vs COMMON-MODE INPUT VOLTAGE 80 TA = -40C 70 CMRR - Common-Mode Rejection Ratio - dB CMRR - Common-Mode Rejection Ratio - dB 80 TA = 85C TA = 25C 60 50 40 VCC = 15 V 30 70 TA = 85C TA = 25C 60 50 40 30 VCC = 5 V 20 0 80 2 4 6 8 10 12 0 14 1.5 2 2.5 3 3.5 Figure 6. Figure 7. COMMON-MODE REJECTION RATIO vs FREQUENCY TRANSRESISTANCE vs FREE-AIR TEMPERATURE 4 2.8 VCC = 15 V 2.6 VCC = 5 V VCC = 15 V 2.4 60 50 40 30 1 k 2.2 2 VCC = 10 V 1.8 1.6 1 k 20 - + VI 0 1k 1 |VIC| - Common-Mode Input Voltage - V 70 10 0.5 |VIC| - Common-Mode Input Voltage - V Transresistance - M CMRR - Common-Mode Rejection Ratio - dB TA = -40C 1 k 10k 1.4 VO 1 k 100k 1.2 1M f - Frequency - Hz Figure 8. 10M 100M 1 -40 VCC = 5 V VO = VCC/2 RL = 1 k -20 0 20 40 60 80 100 TA - Free-Air Temperature - C Figure 9. 7 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 CLOSED-LOOP OUTPUT IMPEDANCE vs FREQUENCY 1 VO 750 750 1 k - 0.1 + 50 VI THS3001 1000 VO Zo = -1 VI ( 0.01 100k 10M 100M f - Frequency - Hz PSRR - Power Supply Rejection Ratio - dB In+ 10 100 1k 10k 100k f - Frequency - Hz Figure 10. Figure 11. POWER SUPPLY REJECTION RATIO vs FREQUENCY POWER SUPPLY REJECTION RATIO vs FREE-AIR TEMPERATURE 90 VCC = 5 V VCC = 15 V VCC = 15 V VCC = 5 V 40 +PSRR 30 20 0 1k 10 1G -PSRR 10 In- Vn 60 50 100 ) 80 70 VCC = 15 V and 5 V TA = 25C 1 1M 90 G=1 RF = 1 k 10k 100k 1M f - Frequency - Hz Figure 12. 8 Vn - Voltage Noise - nV/ Hz and I n - Current Noise - pA/ Hz 10 1000 VCC = 15 V RF = 750 Gain = +2 TA = 25C VI(PP) = 2 V PSRR - Power Supply Rejection Ratio - dB Closed-Loop Output Impedance - 100 VOLTAGE NOISE AND CURRENT NOISE vs FREQUENCY 10M 100M 85 VCC = -5 V VCC = -15 V 80 VCC = +5 V 75 VCC = +15 V 70 -40 -20 0 20 40 60 TA - Free-Air Temperature - C Figure 13. 80 100 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 SLEW RATE vs SUPPLY VOLTAGE SLEW RATE vs OUTPUT STEP 7000 10000 G = +5 RL = 150 tr/tf = 300 ps RF = 1 k SR - Slew Rate - V/s SR - Slew Rate - V/s 6000 +SR 5000 4000 3000 +SR 2000 -SR 1000 VCC = 15 V G = +5 RL = 150 tr/tf = 300 ps RF = 1 k -SR 100 1000 5 7 9 11 13 0 15 5 10 15 20 VO(PP) - Output Step - V |VCC| - Supply Voltage - V Figure 14. Figure 15. SLEW RATE vs OUTPUT STEP NORMALIZED SLEW RATE vs GAIN 1.5 2000 VCC = 5 V VO(PP) = 4 V RL = 150 RF = 1 k tr/tf = 300 ps +SR SR - Normalized Slew Rate - V/ s 1.4 SR - Slew Rate - V/s 1000 -SR VCC = 5 V G = +5 RL = 150 tr/tf = 300 ps RF= 1 k 1.3 1.2 -Gain 1.1 1 +Gain 0.9 0.8 0.7 100 0 1 2 3 VO(PP) - Output Step - V Figure 16. 4 5 1 2 3 4 5 6 7 8 9 10 G - Gain - V/V Figure 17. 9 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 HARMONIC DISTORTION vs PEAK-TO-PEAK OUTPUT VOLTAGE SWING HARMONIC DISTORTION vs PEAK-TO-PEAK OUTPUT VOLTAGE SWING -50 -50 8 MHz Gain = 2 VCC = 15 V RL = 150 RF = 750 -60 -60 Harmonic Distortion - dBc Harmonic Distortion - dBc -55 4 MHz Gain = 2 VCC = 15 V RL = 150 RF = 750 -55 3rd Harmonic -65 -70 2nd Harmonic -75 3rd Harmonic -65 -70 -75 -80 2nd Harmonic -85 -80 -90 -85 -95 0 2 4 6 8 10 12 14 16 18 0 20 4 6 8 10 12 14 16 18 20 VO(PP) - Peak-to-Peak Output Voltage Swing - V Figure 18. Figure 19. HARMONIC DISTORTION vs FREQUENCY HARMONIC DISTORTION vs FREQUENCY -70 -60 Gain = 2 VCC = 15 V VO = 2 VPP RL = 150 RF = 750 -65 Harmonic Distortion - dBc -75 Harmonic Distortion - dBc 2 VO(PP) - Peak-to-Peak Output Voltage Swing - V -80 3rd Harmonic -85 -90 2nd Harmonic -95 -70 Gain = 2 VCC = 5 V VO = 2 VPP RL = 150 RF = 750 -75 -80 -85 2nd Harmonic -90 -95 3rd Harmonic -100 100k 1M f - Frequency - Hz Figure 20. 10 10M -100 100k 1M f - Frequency - Hz Figure 21. 10M THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 DIFFERENTIAL GAIN vs LOADING DIFFERENTIAL GAIN vs LOADING 0.04 0.04 Gain = 2 RF = 750 40 IRE NTSC Modulation Worst Case: 100 IRE Ramp Gain = 2 RF = 750 40 IRE PAL Modulation Worst Case: 100 IRE Ramp 0.03 Differential Gain - % Differential Gain - % 0.03 VCC = 15 V 0.02 VCC = 5 V 0.01 VCC = 15 V 0.02 VCC = 5 V 0.01 0 0 1 2 3 4 5 6 7 8 1 2 Number of 150 Loads 4 5 6 7 8 Number of 150 Loads Figure 22. Figure 23. DIFFERENTIAL PHASE vs LOADING DIFFERENTIAL PHASE vs LOADING 0.35 0.3 Gain = 2 RF = 750 40 IRE NTSC Modulation Worst Case: 100 IRE Ramp Gain = 2 RF = 750 40 IRE PAL Modulation Worst Case: 100 IRE Ramp 0.3 Differential Phase - Degrees 0.25 Differential Phase - Degrees 3 0.2 0.15 VCC = 15 V 0.1 VCC = 5 V 0.05 0.25 0.2 0.15 VCC = 15 V 0.1 VCC = 5 V 0.05 0 0 1 2 3 4 5 6 Number of 150 Loads Figure 24. 7 8 1 2 3 4 5 6 7 8 Number of 150 Loads Figure 25. 11 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 OUTPUT AMPLITUDE vs FREQUENCY OUTPUT AMPLITUDE vs FREQUENCY 3 Output Amplitude - dB 1 RF = 750 2 1 Output Amplitude - dB 2 3 Gain = 1 VCC = 15 V RL = 150 VI = 200 mV RMS 0 -1 -2 RF = 1 k -3 RF = 1.5 k 10M 100M RF = 1.5 k -6 100k 1G 10M 100M f - Frequency - Hz Figure 26. Figure 27. OUTPUT AMPLITUDE vs FREQUENCY OUTPUT AMPLITUDE vs FREQUENCY 1G 9 Gain = 2 VCC = 15 V RL = 150 VI = 200 mV RMS 8 RF = 560 7 6 5 4 RF = 680 3 RF = 1 k 2 4 RF = 1 k 2 0 100M 1G RF = 750 3 0 10M RF = 560 5 1 1M Gain = 2 VCC = 5 V RL = 150 VI = 200 mV RMS 6 1 -1 100k 1M f - Frequency - Hz Output Amplitude - dB 7 RF = 1 k -3 -5 8 Output Amplitude - dB -2 -5 9 12 -1 -4 1M RF = 750 0 -4 -6 100k Gain = 1 VCC = 5 V RL = 150 VI = 200 mV RMS -1 100k 1M 10M f - Frequency - Hz f - Frequency - Hz Figure 28. Figure 29. 100M 1G THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 OUTPUT AMPLITUDE vs FREQUENCY 70 Output Amplitude - dB 60 50 VCC = 15 V 40 30 VCC = 5 V 20 10 0 G = +1000 RF = 10 k RL = 150 VO = 200 mV RMS -10 100k 1M 10M 100M 1G f - Frequency - Hz Figure 30. NORMALIZED OUTPUT RESPONSE vs FREQUENCY NORMALIZED OUTPUT RESPONSE vs FREQUENCY 3 1 2 RF = 560 Normalized Output Response - dB Normalized Output Response - dB 2 3 Gain = -1 VCC = 15 V RL = 150 VI = 200 mV RMS 0 -1 RF = 680 -2 -3 RF = 1 k -4 -5 -6 100k 1 Gain = -1 VCC = 5 V RL = 150 VI = 200 mV RMS RF = 560 0 -1 RF = 750 -2 -3 RF = 1 k -4 -5 1M 10M 100M 1G -6 100k 1M 10M f - Frequency - Hz f - Frequency - Hz Figure 31. Figure 32. 100M 1G 13 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 NORMALIZED OUTPUT RESPONSE vs FREQUENCY NORMALIZED OUTPUT RESPONSE vs FREQUENCY 3 4 RF = 390 RF = 390 Normalized Output Response - dB Normalized Output Response - dB 2 0 RF = 560 -3 RF = 1 k -6 -9 -12 Gain = +5 VCC = 15 V RL = 150 VO = 200 mV RMS -15 100k 1M 0 -2 -6 -8 -10 10M 100M Gain = +5 VCC = 5 V RL = 150 VO = 200 mV RMS -14 100k 1G 1M 10M 100M 1G f - Frequency - Hz f - Frequency - Hz Figure 33. Figure 34. SMALL AND LARGE SIGNAL FREQUENCY RESPONSE SMALL AND LARGE SIGNAL FREQUENCY RESPONSE 3 VI = 500 mV VI = 500 mV -6 0 -9 -3 Output Level - dBV VI = 250 mV Output Level - dBV RF = 1 k -12 -3 -12 -15 VI = 125 mV -18 -21 VI = 250 mV -6 -9 VI = 125 mV -12 -15 VI = 62.5 mV -24 -27 -30 100k 14 RF = 620 -4 VI = 62.5 mV -18 Gain = 1 VCC = 15 V RF = 1 k RL = 150 1M -21 10M 100M 1G -24 100k Gain = 2 VCC = 15 V RF = 680 RL = 150 1M 10M f - Frequency - Hz f - Frequency - Hz Figure 35. Figure 36. 100M 1G THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 VI - Input Voltage - mV SMALL SIGNAL PULSE RESPONSE 300 100 -100 -200 200 VO- Output Voltage - mV VO - Output Voltage - V VI - Input Voltage - mV SMALL SIGNAL PULSE RESPONSE 100 0 Gain = 1 VCC = 5 V RL = 150 RF = 1 k tr/tf = 300 ps -100 -200 -300 10 20 30 40 50 60 70 80 -20 -60 200 100 0 Gain = 5 VCC = 5 V RL = 150 RF = 1 k tr/tf = 300 ps -100 -200 -300 0 10 20 30 40 50 60 70 80 t - Time - ns t - Time - ns Figure 37. Figure 38. LARGE SIGNAL PULSE RESPONSE LARGE SIGNAL PULSE RESPONSE VI - Input Voltage - V 3 1 -1 -3 2 1 0 Gain = +1 VCC = 15 V RL = 150 RF = 1 k tr/tf= 2.5 ns -1 -2 -3 20 90 100 VO - Output Voltage - V VO - Output Voltage - V VI - Input Voltage - V 0 60 90 100 3 1 -1 -3 2 1 0 Gain = 1 VCC = 5 V RL = 150 RF = 1 k tr/tf= 2.5 ns -1 -2 -3 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 t - Time - ns t - Time - ns Figure 39. Figure 40. 70 80 90 100 15 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 VI - Input Voltage - mV LARGE SIGNAL PULSE RESPONSE 3 1 -1 -3 10 VO - Output Voltage - V VO - Output Voltage - V VI - Input Voltage - V LARGE SIGNAL PULSE RESPONSE 5 0 Gain = +5 VCC = 15 V RL = 150 RF = 1 k tr/tf= 300 ps -5 -10 -15 10 20 30 40 50 60 70 80 -200 -600 2 1 0 Gain = 5 VCC = 5 V RL = 150 RF = 1 k tr/tf= 300 ps -1 -2 0 10 20 30 40 50 60 70 80 t - Time - ns t - Time - ns Figure 41. Figure 42. LARGE SIGNAL PULSE RESPONSE LARGE SIGNAL PULSE RESPONSE VI - Input Voltage - V 3 1 -1 2 1 Gain = -1 VCC = 15 V RL = 150 RF = 1 k tr/tf= 2.5 ns 0 -1 -2 -3 90 100 3 1 -1 2 1 Gain = -1 VCC = 5 V RL = 150 RF = 1 k tr/tf= 300 ps 0 -1 -2 -3 0 16 200 -3 90 100 VO - Output Voltage - V VO - Output Voltage - V VI - Input Voltage - V 0 600 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 t - Time - ns t - Time - ns Figure 43. Figure 44. 70 80 90 100 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 LARGE SIGNAL PULSE RESPONSE VI - Input Voltage - V 600 200 -200 -600 2 VO - Output Voltage - V VO - Output Voltage - V VI - Input Voltage - mV LARGE SIGNAL PULSE RESPONSE 1 0 Gain = -5 VCC = 5 V RL = 150 RF = 1 k tr/tf= 300 ps -1 -2 3 1 -1 -2 10 5 0 Gain = -5 VCC = 15 V RL = 150 RF = 1 k tr/tf= 300 ps -5 -10 -15 -3 0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 t - Time - ns t - Time - ns Figure 45. Figure 46. 70 80 90 100 17 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 APPLICATION INFORMATION THEORY OF OPERATION The THS3001 is a high-speed, operational amplifier configured in a current-feedback architecture. The device is built using a 30-V, dielectrically isolated, complementary bipolar process with NPN and PNP transistors possessing fTs of several GHz. This configuration implements an exceptionally high-performance amplifier that has a wide bandwidth, high slew rate, fast settling time, and low distortion. A simplified schematic is shown in Figure 47. VCC+ 7 IIB IN+ 3 2 IN- 6 OUT IIB 4 VCC- Figure 47. Simplified Schematic RECOMMENDED FEEDBACK AND GAIN RESISTOR VALUES The THS3001 is fabricated using Texas Instruments 30-V complementary bipolar process, HVBiCOM. This process provides the excellent isolation and extremely high slew rates that result in superior distortion characteristics. As with all current-feedback amplifiers, the bandwidth of the THS3001 is an inversely proportional function of the value of the feedback resistor (see Figures 26 to 34). The recommended resistors for the optimum frequency response are shown in Table 1. These should be used as a starting point and once optimum values are found, 1% tolerance resistors should be used to maintain frequency response characteristics. For most applications, a feedback resistor value of 1 k is recommended - a good compromise between bandwidth and phase margin that yields a stable amplifier. 18 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 APPLICATION INFORMATION (continued) Consistent with current-feedback amplifiers, increasing the gain is best accomplished by changing the gain resistor, not the feedback resistor. This is because the bandwidth of the amplifier is dominated by the feedback resistor value and internal dominant-pole capacitor. The ability to control the amplifier gain independent of the bandwidth constitutes a major advantage of current-feedback amplifiers over conventional voltage-feedback amplifiers. Therefore, once a frequency response is found suitable to a particular application, adjust the value of the gain resistor to increase or decrease the overall amplifier gain. Finally, it is important to realize the effects of the feedback resistance on distortion. Increasing the resistance decreases the loop gain and increases the distortion. It is also important to know that decreasing load impedance increases total harmonic distortion (THD). Typically, the third-order harmonic distortion increases more than the second-order harmonic distortion. Table 1. Recommended Resistor Values for Optimum Frequency Response GAIN RF for VCC = 15 V RF for VCC = 5 V 1 1 k 1 k 2, -1 680 750 2 620 620 5 560 620 OFFSET VOLTAGE The output offset voltage, (VOO) is the sum of the input offset voltage (VIO) and both input bias currents (IIB) times the corresponding gains. The following schematic and formula can be used to calculate the output offset voltage: RF RG IIB- + VIO RS - VO + IIB+ VOO VIO 1 R F RG IIB RS 1 R F RG IIB- RF Figure 48. Output Offset Voltage Model 19 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 NOISE CALCULATIONS Noise can cause errors on small signals. This is especially true for amplifying small signals coming over a transmission line or an antenna. The noise model for current-feedback amplifiers (CFB) is the same as for voltage feedback amplifiers (VFB). The only difference between the two is that CFB amplifiers generally specify different current-noise parameters for each input, while VFB amplifiers usually only specify one noise-current parameter. The noise model is shown in Figure 49. This model includes all of the noise sources as follows: * en = Amplifier internal voltage noise (nV/Hz) * IN+ = Nonverting current noise (pA/Hz) * IN- = Inverting current noise (pA/Hz) * eRx = Thermal voltage noise associated with each resistor (eRx = 4 kTRx) RS eRs en Noiseless + _ eni IN+ eno eRf RF eRg IN- RG Figure 49. Noise Model The total equivalent input noise density (eni) is calculated by using the following equation: e Where: ni 2 en IN R IN- R R S F G 2 2 4 kTRs 4 kT R R F G k = Boltzmann's constant = 1.380658 x 10-23 T = Temperature in degrees Kelvin (273 +C) RF || RG = Parallel resistance of RF and RG To get the equivalent output noise of the amplifier, just multiply the equivalent input noise density (eni) by the overall amplifier gain (AV). e no e ni A V e ni 1 RF (Noninverting Case) RG As the previous equations show, to keep noise at a minimum, small value resistors should be used. As the closed-loop gain is increased (by reducing RG), the input noise is reduced considerably because of the parallel resistance term. This leads to the general conclusion that the most dominant noise sources are the source resistor (RS) and the internal amplifier noise voltage (en). Because noise is summed in a root-mean-squares method, noise sources smaller than 25% of the largest noise source can be effectively ignored. This can greatly simplify the formula and make noise calculations much easier. 20 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 SLEW RATE The slew rate performance of a current-feedback amplifier, like the THS3001, is affected by many different factors. Some of these factors are external to the device, such as amplifier configuration and PCB parasitics, and others are internal to the device, such as available currents and node capacitance. Understanding some of these factors should help the PCB designer arrive at a more optimum circuit with fewer problems. Whether the THS3001 is used in an inverting amplifier configuration or a noninverting configuration can impact the output slew rate. As can be seen from the specification tables as well as some of the figures in this data sheet, slew-rate performance in the inverting configuration is faster than in the noninverting configuration. This is because in the inverting configuration the input terminals of the amplifier are at a virtual ground and do not significantly change voltage as the input changes. Consequently, the time to charge any capacitance on these input nodes is less than for the noninverting configuration, where the input nodes actually do change in voltage an amount equal to the size of the input step. In addition, any PCB parasitic capacitance on the input nodes degrades the slew rate further simply because there is more capacitance to charge. Also, if the supply voltage (VCC) to the amplifier is reduced, slew rate decreases because there is less current available within the amplifier to charge the capacitance on the input nodes as well as other internal nodes. Internally, the THS3001 has other factors that impact the slew rate. The amplifier's behavior during the slew-rate transition varies slightly depending upon the rise time of the input. This is because of the way the input stage handles faster and faster input edges. Slew rates (as measured at the amplifier output) of less than about 1500 V/s are processed by the input stage in a linear fashion. Consequently, the output waveform smoothly transitions between initial and final voltage levels. This is shown in Figure 50. For slew rates greater than 1500 V/s, additional slew-enhancing transistors present in the input stage begin to turn on to support these faster signals. The result is an amplifier with extremely fast slew-rate capabilities. Figure 50 and Figure 51 show waveforms for these faster slew rates. The additional aberrations present in the output waveform with these faster-slewing input signals are due to the brief saturation of the internal current mirrors. This phenomenon, which typically lasts less than 20 ns, is considered normal operation and is not detrimental to the device in any way. If for any reason this type of response is not desired, then increasing the feedback resistor or slowing down the input-signal slew rate reduces the effect. 4 SLEW RATE VI - Input Voltage - V VI - Input Voltage - V SLEW RATE 2 0 10 2 0 -2 5 SR = 1500 V/s Gain = 5 VCC = 15 V RL = 150 RF = 1 k tr/tf = 10 ns 0 -5 -10 -15 0 20 40 60 80 100 120 140 160 180 200 VO - Output Voltage - V VO - Output Voltage - V 5 4 SR = 2400 V/s Gain = 5 VCC = 15 V RL = 150 RF = 1 k tr/tf = 5 ns 0 -5 -10 -15 0 20 40 60 80 100 120 140 160 180 200 t - Time - ns t - Time - ns Figure 50. Figure 51. 21 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 DRIVING A CAPACITIVE LOAD Driving capacitive loads with high-performance amplifiers is not a problem as long as certain precautions are taken. The first is to realize that the THS3001 has been internally compensated to maximize its bandwidth and slew-rate performance. When the amplifier is compensated in this manner, capacitive loading directly on the output will decrease the device's phase margin leading to high-frequency ringing or oscillations. Therefore, for capacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series with the output of the amplifier, as shown in Figure 52. A minimum value of 20 should work well for most applications. For example, in 75- transmission systems, setting the series resistor value to 75 both isolates any capacitance loading and provides the proper line impedance matching at the source end. 1 k 1 k Input _ 20 Output THS3001 + CLOAD Figure 52. Driving a Capacitive Load 22 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 PCB DESIGN CONSIDERATIONS Proper PCB design techniques in two areas are important to ensure proper operation of the THS3001. These areas are high-speed layout techniques and thermal-management techniques. Because the THS3001 is a high-speed part, the following guidelines are recommended. * Ground plane - It is essential that a ground plane be used on the board to provide all components with a low inductive ground connection. Although a ground connection directly to a terminal of the THS3001 is not necessarily required, it is recommended that the thermal pad of the package be tied to ground. This serves two functions: it provides a low inductive ground to the device substrate to minimize internal crosstalk, and it provides the path for heat removal. * Input stray capacitance - To minimize potential problems with amplifier oscillation, the capacitance at the inverting input of the amplifiers must be kept to a minimum. To do this, PCB trace runs to the inverting input must be as short as possible, the ground plane must be removed under any etch runs connected to the inverting input, and external components should be placed as close as possible to the inverting input. This is especially true in the noninverting configuration. An example of this can be seen in Figure 53, which shows what happens when a 1-pF capacitor is added to the inverting input terminal. The bandwidth increases at the expense of peaking. This is because some of the error current is flowing through the stray capacitor instead of the inverting node of the amplifier. Although, while the device is in the inverting mode, stray capacitance at the inverting input has a minimal effect. This is because the inverting node is at a virtual ground and the voltage does not fluctuate nearly as much as in the noninverting configuration. This can be seen in Figure 54, where a 10-pF capacitor adds only 0.35 dB of peaking. In general, as the gain of the system increases, the output peaking due to this capacitor decreases. While this can initially look like a faster and better system, overshoot and ringing are more likely to occur under fast transient conditions. So proper analysis of adding a capacitor to the inverting input node should be performed for stable operation. OUTPUT AMPLITUDE vs FREQUENCY OUTPUT AMPLITUDE vs FREQUENCY 1 7 1 k Cin Output Amplitude - dB 5 Vin + 4 50 3 RL = 150 1 0 -1 -3 Cin -2 Vin -3 1 k 50 -4 1 k Vout - + RL = 150 -5 -6 CI = 0 pF (Stray C Only) Gain = 1 VCC = 15 V VO = 200 mV RMS -4 100k 1M 10M f - Frequency - Hz Figure 53. * CI = Stray C Only -1 2 -2 CI = 10 pF 0 Vout - Output Amplitude - dB 6 CI = 1 pF 100M -7 1G Gain = -1 VCC = 15 V VO = 200 mV RMS -8 100k 1M 10M 100M 1G f - Frequency - Hz Figure 54. Proper power-supply decoupling - Use a minimum 6.8-F tantalum capacitor in parallel with a 0.1-F ceramic capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers depending on the application, but a 0.1-F ceramic capacitor should always be used on the supply terminal of every amplifier. In addition, the 0.1-F capacitor should be placed as close as possible to the supply terminal. As this distance increases, the inductance in the connecting etch makes the capacitor less effective. The designer should strive for distances of less than 0.1 inch between the device power terminal and the ceramic capacitors. 23 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 THERMAL INFORMATION The THS3001 incorporates output-current-limiting protection. Should the output become shorted to ground, the output current is automatically limited to the value given in the data sheet. While this protects the output against excessive current, the device internal power dissipation increases due to the high current and large voltage drop across the output transistors. Continuous output shorts are not recommended and could damage the device. Additionally, connection of the amplifier output to one of the supply rails (VCC) is not recommended. Failure of the device is possible under this condition and should be avoided. But, the THS3001 does not incorporate thermal-shutdown protection. Because of this, special attention must be paid to the device's power dissipation or failure may result. The thermal coefficient JA is approximately 169C/W for the SOIC 8-pin D package. For a given JA, the maximum power dissipation, shown in Figure 55, is calculated by the following formula: T P D -T MAX A JA Where: PD TMAX TA JA = Maximum power dissipation of THS3001 (watts) = Absolute maximum junction temperature (150C) = Free-ambient air temperature (C) = Thermal coefficient from die junction to ambient air (C/W) PD - Maximum Power Dissipation - W 1.5 SOIC-D Package: JA = 169C/W TJ = 150C No Airflow 1 0.5 0 -40 -20 0 20 40 60 80 100 TA - Free-Air Temperature - C Figure 55. Maximum Power Dissipation vs Free-Air Temperature GENERAL CONFIGURATIONS A common error for the first-time CFB user is the creation of a unity gain buffer amplifier by shorting the output directly to the inverting input. A CFB amplifier in this configuration will oscillate and is not recommended. The THS3001, like all CFB amplifiers, must have a feedback resistor for stable operation. Additionally, placing capacitors directly from the output to the inverting input is not recommended. This is because, at high frequencies, a capacitor has a low impedance. This results in an unstable amplifier and should not be considered when using a current-feedback amplifier. Because of this, integrators and simple low-pass filters, which are easily implemented on a VFB amplifier, have to be designed slightly differently. If filtering is required, simply place an RC-filter at the noninverting terminal of the operational-amplifier (see Figure 56). 24 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 RG RF f V - R1 O V I VO + VI 3 dB 1 2R1C1 R 1 R F G 1 1 sR1C1 C1 Figure 56. Single-Pole Low-Pass Filter If a multiple-pole filter is required, the use of a Sallen-Key filter can work well with CFB amplifiers. This is because the filtering elements are not in the negative feedback loop and stability is not compromised. Because of their high slew rates and high bandwidths, CFB amplifiers can create accurate signals and help minimize distortion. An example is shown in Figure 57. C1 + _ VI R1 R1 = R2 = R C1 = C2 = C Q = Peaking Factor (Butterworth Q = 0.707) R2 f C2 RG 3 dB RG = RF ( 1 2RC RF 1 2- Q ) Figure 57. 2-Pole Low-Pass Sallen-Key Filter There are two simple ways to create an integrator with a CFB amplifier. The first, shown in Figure 58, adds a resistor in series with the capacitor. This is acceptable because at high frequencies, the resistor is dominant and the feedback impedance never drops below the resistor value. The second, shown in Figure 59, uses positive feedback to create the integration. Caution is advised because oscillations can occur due to the positive feedback. C1 RF VI S 1 R C1 F O F VI RG S V RG - + VO THS3001 R Figure 58. Inverting CFB Integrator 25 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 RG RF For Stable Operation: - THS3001 VO + R2 R1 || RA ( 1+ VO VI R1 R2 RF RG RF RG sR1C1 ) VI RA C1 Figure 59. Noninverting CFB Integrator The THS3001 may also be employed as a good video distribution amplifier. One characteristic of distribution amplifiers is the fact that the differential phase (DP) and the differential gain (DG) are compromised as the number of lines increases and the closed-loop gain increases (see Figures 22 to 25 for more information). Be sure to use termination resistors throughout the distribution system to minimize reflections and capacitive loading. 750 750 - 75 75- Transmission Line VO1 + VI 75 75 THS3001 N Lines 75 VON 75 Figure 60. Video Distribution Amplifier Application 26 THS3001 www.ti.com SLOS217E - JULY 1998 - REVISED MARCH 2005 EVALUATION BOARD An evaluation boards is available for the THS3001 (SLOP130). The board has been configured for low parasitic capacitance in order to realize the full performance of the amplifier. A schematic of the evaluation board is shown in Figure 61. The circuitry has been designed so that the amplifier may be used in either an inverting or noninverting configuration. For more detailed information, refer to the THS3001 EVM User's Manual (literature number SLOV021). To order the evaluation board, contact your local TI sales office or distributor. VCC+ + C2 0.1 F C1 6.8 F R1 1 k IN + R2 49.9 + R3 49.9 OUT THS3001 _ R5 1 k + C4 0.1 F C3 6.8 F IN - R4 49.9 VCC - Figure 61. THS3001 Evaluation Board Schematic 27 PACKAGE OPTION ADDENDUM www.ti.com 24-May-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty THS3001CD ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001CDGN ACTIVE MSOPPower PAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001CDGNG4 ACTIVE MSOPPower PAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001CDGNR ACTIVE MSOPPower PAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001CDGNRG4 ACTIVE MSOPPower PAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001CDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) THS3001HVCD PREVIEW SOIC D 8 75 TBD Call TI THS3001HVCDGN ACTIVE MSOPPower PAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001HVCDGNR ACTIVE MSOPPower PAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001HVCDR PREVIEW SOIC D 8 2500 TBD Call TI Call TI THS3001HVID PREVIEW SOIC D 8 75 TBD Call TI Call TI THS3001HVIDGN ACTIVE MSOPPower PAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001HVIDGNR ACTIVE MSOPPower PAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001HVIDR PREVIEW SOIC D 8 2500 TBD Call TI THS3001ID ACTIVE SOIC D 8 75 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001IDGN ACTIVE MSOPPower PAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001IDGNG4 ACTIVE MSOPPower PAD DGN 8 80 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001IDGNR ACTIVE MSOPPower PAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001IDGNRG4 ACTIVE MSOPPower PAD DGN 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM THS3001IDR ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Call TI Call TI PACKAGE OPTION ADDENDUM www.ti.com 24-May-2005 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. 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