DGN−8 D−8
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FEATURES APPLICATIONS
NC − No internal connection
1
2
3
4
8
7
6
5
NC
IN−
IN+
VCC−
NC
VCC+
OUT
NC
THS3001
D OR DGN PACKAGE
(TOP VIEW)
DESCRIPTION
f − Frequency − Hz
OUTPUT AMPLITUDE
vs FREQUENCY
5
3
1
−1 1M 100M
6
4
2
0
10M 1G100k
7
8
Output Amplitude − dB
G = 2
RL = 150 Ω
VI = 200 mV RMS
HARMONIC DISTORTION
vs FREQUENCY
−70
−80
−90
−100
−75
−85
−95
Harmonic Distortion − dBc
Gain = 2
VCC = ±15 V
VO = 2 VPP
RL = 150 Ω
RF = 750 Ω
100k 1M 10M
f − Frequency − Hz
VCC = ±15 V
RF = 680 Ω
VCC = ±5 V
RF = 750 Ω
3rd Harmonic
2nd Harmonic
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
420-MHz HIGH-SPEED CURRENT-FEEDBACK AMPLIFIER
•Communication•High Speed
•Imaging– 420 MHz Bandwidth (G = 1, -3 dB)
•High-Quality Video– 6500 V/µs Slew Rate– 40-ns Settling Time (0.1%)•High Output Drive, I
O
= 100 mA•Excellent Video Performance– 115 MHz Bandwidth (0.1 dB, G = 2)– 0.01% Differential Gain– 0.02 °Differential Phase•Low 3-mV (max) Input Offset Voltage•Very Low Distortion– THD = -96 dBc at f = 1 MHz
RELATED DEVICES– THD = -80 dBc at f = 10 MHz
THS41011/2 290-MHz VFB High-Speed Amplifier•Wide Range of Power Supplies
THS6012 500-mA CFB HIgh-Speed Amplifier– V
CC
=±4.5 V to ±16 V
THS6022 250-mA CFB High-Speed Amplifier•Evaluation Module Available
The THS3001 is a high-speed current-feedback operational amplifier, ideal for communication, imaging, andhigh-quality video applications. This device offers a very fast 6500-V/µs slew rate, a 420-MHz bandwidth, and40-ns settling time for large-signal applications requiring excellent transient response. In addition, the THS3001operates with a very low distortion of –96 dBc, making it well suited for applications such as wirelesscommunication basestations or ultrafast ADC or DAC buffers.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2005, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
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ABSOLUTE MAXIMUM RATINGS
(1)
DISSIPATION RATING TABLE
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
AVAILABLE OPTIONS
(1)
PACKAGED DEVICE
TRANSPORT EVALUATIONT
A
SOIC MSOP MSOP
MEDIA, QUANTITY MODULE(D) (DGN) SYMBOL
THS3001CD THS3001CDGN Rails, 75 THS3001EVMADP
Tape and Reel,THS3001CDR THS3001CDGNR --25000°C to 70 °C
THS3001HVCD THS3001HVCDGN Rails, 75 --BNK
Tape and Reel,THS3001HVCDR THS3001HVCDGNR --2500THS3001ID THS3001IDGN Rails, 75 --ADQ
Tape and Reel,THS3001IDR THS3001IDGNR --2500-40 °C to 85 °C
THS3001HVID THS3001HVIDGN Rails, 75 --BNJ
Tape and Reel,THS3001HVIDR THS3001HVIDGNR --2500
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIwebsite at www.ti.com .
over operating free-air temperature range (unless otherwise noted)
THS3001 THS3001HV UNITS
V
SS
Supply voltage, V
CC+
to V
CC-
33 37 VV
I
Input voltage ±V
CC
±V
CC
VI
O
Output current 175 175 mAV
ID
Differential input voltage ±6±6 VContinuous total power dissipation See Dissipation Rating TableT
J
Maximum junction temperature
(2)
150 150 °CT
J
Maximum junction temperature, continuous operation, long term reliability
(3)
125 125 °CTHS3001C,
0 to 70 0 to 70 °CTHS3001HVCT
A
Operating free-air temperature
THS3001I,
-40 to 85 -40 to 85 °CTHS3001HVIT
stg
Storage temperature -65 to 125 -65 to 125 °CLead temperature 1,6 mm (1/16 inch) from case for 10 seconds 300 300 °C
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods maydegrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyondthose specified is not implied.(2) The absolute maximum temperature under any condition is limited by the constraints of the silicon process.(3) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature mayresult in reduced reliability and/or lifetime of the device.
POWER RATING
(2)θ
JC
θ
JA
(1)PACKAGE
(°C/W) ( °C/W)
T
A
≤25 °C T
A
= 85 °C
D (8) 38.3 97.5 1.02 W 410 mWDGN (8) 4.7 58.4 1.71 W 685 mW
(1) This data was taken using the JEDEC standard High-K test PCB.(2) Power rating is determined with a junction temperature of 125 °C. This is the point where distortion starts to substantially increase.Thermal management of the final PCB should strive to keep the junction temperature at or below 125 °C for best performance and longterm reliability.
2
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RECOMMENDED OPERATING CONDITIONS
ELECTRICAL CHARACTERISITCS
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
MIN NOM MAX UNIT
Split supply ±4.5 ±16THS3001C,
THS3001ISingle supply 9 32 VV
SS
Supply voltage, V
CC+
and V
CC-
Split supply ±4.5 ±18.5THS3001HVC,
THS3001HVISingle supply 9 37THS3001C, THS3001HVC 0 70T
A
Operating free-air temperature °CTHS3001I, THS3001HVI -40 85
T
A
= 25 °C, R
L
= 150 Ω, R
F
= 1 k Ω(unless otherwise noted)
PARAMETER TEST CONDITIONS
(1)
MIN TYP MAX UNIT
THS3001C
±4.5 ±16.5THS3001ISplit supply
THS3001HVx ±4.5 ±18.5V
CC
Power supply operating range VTHS3001C
9 33THS3001ISingle supply
THS3001HVx 9 37T
A
= 25 °C 5.5 7.5V
CC
=±5 V
T
A
= full range 8.5T
A
= 25 °C 6.6 9I
CC
Quiescent current V
CC
=±15 V mAT
A
= full range 10T
A
= 25 °C 6.9 9.5V
CC
=±18.5 V,THS3001HV
T
A
= full range 10.5R
L
= 150 Ω ± 2.9 ±3.2V
CC
=±5 V
R
L
= 1 k Ω ± 3±3.3V
O
Output voltage swing VR
L
= 150 Ω ± 12.1 ±12.8V
CC
=±15 V
R
L
= 1 k Ω ± 12.8 ±13.1V
CC
=±5 V, R
L
= 20 Ω100I
O
Output current
(2)
mAV
CC
=±15 V, R
L
= 75 Ω85 120T
A
= 25 °C 1 3V
IO
Input offset voltage V
CC
=±5 V or ±15 V mVT
A
= full range 4Input offset voltage drift V
CC
=±5 V or ±15 V 5 µV/ °CT
A
= 25 °C 2 10Positive (IN+)
T
A
= full range 15I
IB
Input bias current V
CC
=±5 V or ±15 V µAT
A
= 25 °C 1 10Negative (IN-)
T
A
= full range 15V
CC
=±5 V ±3±3.2V
ICR
Common-mode input voltage range VV
CC
=±15 V ±12.9 ±13.2V
CC
=±5 V, V
O
=±2.5 V, R
L
= 1 k Ω1.3Open loop transresistance M ΩV
CC
=±15 V, V
O
=±7.5 V, R
L
= 1 k Ω2.4V
CC
=±5 V, V
CM
=±2.5 V 62 70CMRR Common-mode rejection ratio dBV
CC
=±15 V, V
CM
=±10 V 65 73T
A
= 25 °C 65 76V
CC
=±5 V dBT
A
= full range 63PSRR Power supply rejection ratio
T
A
= 25 °C 69 76V
CC
=±15 V dBT
A
= full range 67
(1) Full range = 0 °C to 70 °C for the THS3001C and -40 °C to 85 °C for the THS3001I.(2) Observe power dissipation ratings to keep the junction temperature below absolute maximum when the output is heavily loaded orshorted. See absolute maximum ratings section.
3
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OPERATING CHARACTERISTICS
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
ELECTRICAL CHARACTERISITCS (continued)T
A
= 25 °C, R
L
= 150 Ω, R
F
= 1 k Ω(unless otherwise noted)
PARAMETER TEST CONDITIONS
(1)
MIN TYP MAX UNIT
Positive (IN+) 1.5 M ΩR
I
Input resistance
Negative (IN-) 15 ΩC
I
Differential input capacitance 7.5 pFR
O
Output resistance Open loop at 5 MHz 10 ΩV
n
Input voltage noise V
CC
=±5 V or ±15 V, f = 10 kHz, G = 2 1.6 nV/ √HzPositive (IN+) 13I
n
Input current noise V
CC
=±5 V or ±15 V, f = 10 kHz, G = 2 pA/ √HzNegative (IN-) 16
T
A
= 25 °C, R
L
= 150 Ω, R
F
= 1 k Ω(unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
G = -5 1700V
CC
=±5 V,V
O(PP)
= 4 V
G = 5 1300SR Slew rate
(1)
V/µsG = -5 6500V
CC
=±15 V,V
O(PP)
= 20 V
G = 5 6300V
CC
=±15 V,Settling time to 0.1% Gain = -1, 400 V to 10 V Stept
s
nsV
CC
=±5 V,Settling time to 0.1% Gain = -1, 250 V to 2 V Step,V
CC
=±15 V, V
O(PP)
= 2 V,THD Total harmonic distortion -80 dBcf
c
= 10 MHz, G = 2V
CC
=±5 V 0.015%G = 2, 40 IRE modulation,Differential gain error
±100 IRE Ramp, NTSC and PAL
V
CC
=±15 V 0.01%V
CC
=±5 V 0.01 °G = 2, 40 IRE modulation,Differential phase error
±100 IRE Ramp, NTSC and PAL
V
CC
=±15 V 0.02 °V
CC
=±5 V 330 MHzG = 1, R
F
= 1 k Ω
V
CC
=±15 V 420 MHzSmall signal bandwidth (-3 dB) G = 2, R
F
= 750 Ω, V
CC
=±5 V 300BW G = 2, R
F
= 680 Ω, V
CC
=±15 V 385 MHzG = 5, R
F
= 560 Ω, V
CC
=±15 V 350G = 2, R
F
= 750 Ω, V
CC
=±5 V 85Bandwidth for 0.1 dB flatness MHzG = 2, R
F
= 680 Ω, V
CC
=±15 V 115G = -5 65V
CC
=±5 V, V
O(PP)
= 4 V,R
L
= 500 Ω
G = 5 62Full power bandwidth
(2)
MHzG = -5 32V
CC
=±15 V, V
O(PP)
= 20 V,R
L
= 500 Ω
G = 5 31
(1) Slew rate is measured from an output level range of 25% to 75%.(2) Full power bandwidth is defined as the frequency at which the output has 3% THD.
4
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PARAMETER MEASUREMENT INFORMATION
VIVO
+
−
RGRF
RL
50 ΩVCC−
VCC+
TYPICAL CHARACTERISTICS
Table of Graphs
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
Figure 1. Test Circuit, Gain = 1 + (R
F
/R
G
)
FIGURE
|V
O
| Output voltage swing vs Free-air temperature 2I
CC
Current supply vs Free-air temperature 3I
IB
Input bias current vs Free-air temperature 4V
IO
Input offset voltage vs Free-air temperature 5vs Common-mode input voltage 6CMRR Common-mode rejection ratio vs Common-mode input voltage 7vs Frequency 8Transresistance vs Free-air temperature 9Closed-loop output impedance vs Frequency 10V
n
Voltage noise vs Frequency 11I
n
Current noise vs Frequency 11vs Frequency 12PSRR Power supply rejection ratio
vs Free-air temperature 13vs Supply voltage 14Slew rateSR vs Output step peak-to-peak 15, 16Normalized slew rate vs Gain 17vs Peak-to-peak output voltage swing 18, 19Harmonic distortion
vs Frequency 20, 21Differential gain vs Loading 22, 23Differential phase vs Loading 24, 25Output amplitude vs Frequency 26-30Normalized output response vs Frequency 31-34Small and large signal frequency response 35, 36Small signal pulse response 37, 38Large signal pulse response 39 - 46
5
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TA − Free-Air Temperature − °C
12
2−20 20
14
4
0 40 100−40 60 80
O − Output Voltage Swing − VV
12.5
13
13.5
3.5
3
2.5
VCC = ±5 V
RL = 150 Ω
VCC = ±5 V
No Load
VCC = ±15 V
RL = 150 Ω
VCC = ±15 V
No Load
TA − Free-Air Temperature − °C
9
7
5
3−20 20
8
6
4
0 40 100−40 60 80
VCC = ±5 V
VCC = ±15 V
VCC = ±10 V
ICC − Supply Current − mA
−40 −20 0 20 80 100
TA − Free-Air Temperature − °C
6040
IIB − Input Bias Current −
−1
−2
−3
−0.5
−1.5
−2.5
Aµ
VCC = ±5 V
VCC = ±15 V
VCC = ±5 V
VCC = ±15 V
IIB−
IIB−
IIB+
IIB+
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
OUTPUT VOLTAGE SWING CURRENT SUPPLYvs vsFREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 2. Figure 3.
INPUT BIAS CURRENT INPUT OFFSET VOLTAGEvs vsFREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
Figure 4. Figure 5.
6
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|VIC| − Common-Mode Input Voltage − V
60
50
40
30 2 64 8 14
80
0 10 12
70
TA = −40°C
CMRR − Common-Mode Rejection Ratio − dB
TA = 85°CTA = 25°C
VCC = ±15 V
|VIC| − Common-Mode Input Voltage − V
50
40
30
20 0.5 1.51 2 4
80
0 2.5 3
60
TA = −40°C
CMRR − Common-Mode Rejection Ratio − dB
TA = 85°C
TA = 25°C
VCC = ±5 V
3.5
70
TA − Free-Air Temperature − °C
2.2
1.8
1.4
1−20 20
2.4
2
1.6
1.2
0 40 100
VO = VCC/2
RL = 1 kΩ
2.8
−40 60 80
2.6
Transresistance − MΩ
VCC = ±5 V
VCC = ±15 V
VCC = ±10 V
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
COMMON-MODE REJECTION RATIO COMMON-MODE REJECTION RATIOvs vsCOMMON-MODE INPUT VOLTAGE COMMON-MODE INPUT VOLTAGE
Figure 6. Figure 7.
COMMON-MODE REJECTION RATIO TRANSRESISTANCEvs vsFREQUENCY FREE-AIR TEMPERATURE
Figure 8. Figure 9.
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f − Frequency − Hz
100
10
1100 10k1k 100k10
1000 VCC = ±15 V and ±5 V
TA = 25°C
In−
nV/ Hz− Voltage Noise −VnIn− Current Noise − pA/ Hz
and
In+
Vn
10
1
0.1
0.01 1M f − Frequency − Hz
100k 10M 100M
100
Closed-Loop Output Impedance −
VCC = ±15 V
RF = 750 Ω
Gain = +2
TA = 25°C
VI(PP) = 2 V
1G
Ω
VO
+
−
50 Ω
750 Ω1 kΩVI
THS3001
750 Ω
(VO
VI
=
1000
Zo)
− 1
TA − Free-Air Temperature − °C
80
70 −20 20
85
75
0 40 100−40 60 80
90
PSRR − Power Supply Rejection Ratio − dB
VCC = +5 V
VCC = +15 V
VCC = −5 V
VCC = −15 V
f − Frequency − Hz
PSRR − Power Supply Rejection Ratio − dB
1k 10k 10M 100M1M100k
60
40
20
0
50
30
10
80
90
70
VCC = ±5 V
VCC = ±15 V
G = 1
RF = 1 kΩ
VCC = ±5 V
VCC = ±15 V
−PSRR
+PSRR
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
CLOSED-LOOP OUTPUT IMPEDANCE VOLTAGE NOISE AND CURRENT NOISEvs vsFREQUENCY FREQUENCY
Figure 10. Figure 11.
POWER SUPPLY REJECTION RATIO POWER SUPPLY REJECTION RATIOvs vsFREQUENCY FREE-AIR TEMPERATURE
Figure 12. Figure 13.
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VO(PP) − Output Step − V
10000
100 5 15
1000
10 200
VCC = ±15 V
G = +5
RL = 150 Ω
tr/tf = 300 ps
RF = 1 kΩ
SR − Slew Rate − V/µs
+SR
−SR
|VCC| − Supply Voltage − V
4000
3000
2000
1000 7 119 13
6000
515
5000
G = +5
RL = 150 Ω
tr/tf = 300 ps
RF = 1 kΩ
SR − Slew Rate − V/µs
−SR
+SR
7000
G − Gain − V/V
1.3
1.1
0.9
0.7 2 4
1.2
1
0.8
3 5 101 6 7
−Gain
+Gain
8 9
1.5
1.4
VCC = ±5 V
VO(PP) = 4 V
RL = 150 Ω
RF = 1 kΩ
tr/tf = 300 ps
SR − Normalized Slew Rate − V/µs
VO(PP) − Output Step − V
2000
100 1 3
1000
2 40 5
VCC = ±5 V
G = +5
RL = 150 Ω
tr/tf = 300 ps
RF= 1 kΩ
−SR
+SR
SR − Slew Rate − V/µs
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
SLEW RATE SLEW RATEvs vsSUPPLY VOLTAGE OUTPUT STEP
Figure 14. Figure 15.
SLEW RATE NORMALIZED SLEW RATEvs vsOUTPUT STEP GAIN
Figure 16. Figure 17.
9
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−70
−80
−90
−100
−75
−85
−95
2nd Harmonic
3rd Harmonic
Harmonic Distortion − dBc
Gain = 2
VCC = ±15 V
VO = 2 VPP
RL = 150 Ω
RF = 750 Ω
100k 1M 10M
f − Frequency − Hz
−70
−80
−90
−100
−75
−85
−95
2nd Harmonic
3rd Harmonic
Harmonic Distortion − dBc
Gain = 2
VCC = ±5 V
VO = 2 VPP
RL = 150 Ω
RF = 750 Ω
100k 1M 10M
f − Frequency − Hz
−60
−65
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
HARMONIC DISTORTION HARMONIC DISTORTIONvs vsPEAK-TO-PEAK OUTPUT VOLTAGE SWING PEAK-TO-PEAK OUTPUT VOLTAGE SWING
Figure 18. Figure 19.
HARMONIC DISTORTION HARMONIC DISTORTIONvs vsFREQUENCY FREQUENCY
Figure 20. Figure 21.
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1 2 3 4 7 8
Number of 150 Ω Loads
65
VCC = ±15 V
0.04
0.02
0
0.03
0.01
VCC = ±5 V
Differential Gain − %
Gain = 2
RF = 750 Ω
40 IRE NTSC Modulation
Worst Case: ±100 IRE Ramp
1 2 3 4 7 8
Number of 150 Ω Loads
65
VCC = ±15 V
0.04
0.02
0
0.03
0.01
VCC = ±5 V
Differential Gain − %
Gain = 2
RF = 750 Ω
40 IRE PAL Modulation
Worst Case: ±100 IRE Ramp
1 2 3 4 7 8
Number of 150 Ω Loads
65
VCC = ±15 V
0.3
0.1
0
0.15
0.05
VCC = ±5 V
Differential Phase − Degrees
Gain = 2
RF = 750 Ω
40 IRE NTSC Modulation
Worst Case: ±100 IRE Ramp
0.2
0.25
1 2 3 4 7 8
Number of 150 Ω Loads
65
VCC = ±15 V
0.35
0.1
0
0.15
0.05
VCC = ±5 V
Differential Phase − Degrees
Gain = 2
RF = 750 Ω
40 IRE PAL Modulation
Worst Case: ±100 IRE Ramp
0.2
0.25
0.3
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
DIFFERENTIAL GAIN DIFFERENTIAL GAINvs vsLOADING LOADING
Figure 22. Figure 23.
DIFFERENTIAL PHASE DIFFERENTIAL PHASEvs vsLOADING LOADING
Figure 24. Figure 25.
11
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f − Frequency − Hz
0
−2
−4
−6 1M 100M
1
−1
−3
−5
10M 1G100k
2
3
RF = 750 Ω
Output Amplitude − dB
RF = 1.5 kΩ
Gain = 1
VCC = ±15 V
RL = 150 Ω
VI = 200 mV RMS
RF = 1 kΩ
f − Frequency − Hz
0
−2
−4
−6 1M 100M
1
−1
−3
−5
10M 1G100k
2
3
RF = 750 Ω
Output Amplitude − dB
RF = 1.5 kΩ
Gain = 1
VCC = ±5 V
RL = 150 Ω
VI = 200 mV RMS
RF = 1 kΩ
f − Frequency − Hz
5
3
1
−1 1M 100M
6
4
2
0
10M 1G100k
7
8RF = 560 Ω
Output Amplitude − dB
RF = 1 kΩ
Gain = 2
VCC = ±15 V
RL = 150 Ω
VI = 200 mV RMS
RF = 680 Ω
9
f − Frequency − Hz
5
3
1
−1 1M 100M
6
4
2
0
10M 1G100k
7
8RF = 560 Ω
Output Amplitude − dB
RF = 1 kΩ
Gain = 2
VCC = ±5 V
RL = 150 Ω
VI = 200 mV RMS
RF = 750 Ω
9
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
OUTPUT AMPLITUDE OUTPUT AMPLITUDEvs vsFREQUENCY FREQUENCY
Figure 26. Figure 27.
OUTPUT AMPLITUDE OUTPUT AMPLITUDEvs vsFREQUENCY FREQUENCY
Figure 28. Figure 29.
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f − Frequency − Hz
50
30
10
−10 1M 100M
60
40
20
0
10M 1G100k
70
G = +1000
RF = 10 kΩ
RL = 150 Ω
VO = 200 mV RMS
VCC = ±5 V
VCC = ±15 V
Output Amplitude − dB
f − Frequency − Hz
0
−2
−4
−6 1M 100M
1
−1
−3
−5
10M 1G100k
2
3
RF = 560 Ω
Normalized Output Response − dB
RF = 680 Ω
RF = 1 kΩ
Gain = −1
VCC = ±15 V
RL = 150 Ω
VI = 200 mV RMS
f − Frequency − Hz
0
−2
−4
−6 1M 100M
1
−1
−3
−5
10M 1G100k
2
3
RF = 560 Ω
Normalized Output Response − dB
RF = 750 Ω
RF = 1 kΩ
Gain = −1
VCC = ±5 V
RL = 150 Ω
VI = 200 mV RMS
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
OUTPUT AMPLITUDE
vsFREQUENCY
Figure 30.
NORMALIZED OUTPUT RESPONSE NORMALIZED OUTPUT RESPONSEvs vsFREQUENCY FREQUENCY
Figure 31. Figure 32.
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f − Frequency − Hz
3
−3
−9
−15 1M 100M
0
−6
−12
10M 1G100k
Gain = +5
VCC = ±15 V
RL = 150 Ω
VO = 200 mV RMS
RF = 390 Ω
Normalized Output Response − dB
RF = 560 Ω
RF = 1 kΩ
f − Frequency − Hz
−2
−6
−10
−14 1M 100M
0
−4
−8
−12
10M 1G100k
2
4
Gain = +5
VCC = ±5 V
RL = 150 Ω
VO = 200 mV RMS
RF = 390 Ω
Normalized Output Response − dB
RF = 620 Ω
RF = 1 kΩ
f − Frequency − Hz
−12
−18
−24
−30 1M 100M
−9
−15
−21
−27
10M 1G100k
−6
−3
Gain = 1
VCC = ±15 V
RF = 1 kΩ
RL = 150 Ω
VI = 500 mV
VI = 250 mV
VI = 125 mV
VI = 62.5 mV
Output Level − dBV
f − Frequency − Hz
−6
−12
−18
−24 1M 100M
−3
−9
−15
−21
10M 1G100k
0
3
Output Level − dBV
Gain = 2
VCC = ±15 V
RF = 680 Ω
RL = 150 Ω
VI = 500 mV
VI = 250 mV
VI = 125 mV
VI = 62.5 mV
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
NORMALIZED OUTPUT RESPONSE NORMALIZED OUTPUT RESPONSEvs vsFREQUENCY FREQUENCY
Figure 33. Figure 34.
SMALL AND LARGE SIGNAL FREQUENCY RESPONSE SMALL AND LARGE SIGNAL FREQUENCY RESPONSE
Figure 35. Figure 36.
14
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t − Time − ns
Gain = 1
VCC = ±5 V
RL = 150 Ω
RF = 1 kΩ
tr/tf = 300 ps
−200
0
100
−100
100
−100
0 302010 40 50 7060 80 90 100
300
−200
−300
− Output Voltage − V
VOVI− Input Voltage − mV
200
t − Time − ns
Gain = 5
VCC = ±5 V
RL = 150 Ω
RF = 1 kΩ
tr/tf = 300 ps
−60
0
100
−100
20
−20
0 302010 40 50 7060 80 90 100
60
−200
−300
− Output Voltage − mV
VOVI− Input Voltage − mV
200
t − Time − ns
Gain = +1
VCC = ±15 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 2.5 ns
−3
0
1
−1
1
−1
0 302010 40 50 7060 80 90 100
3
−2
−3
− Output Voltage − V
VOVI− Input Voltage − V
2
t − Time − ns
Gain = 1
VCC = ±5 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 2.5 ns
−3
0
1
−1
1
−1
0 302010 40 50 7060 80 90 100
3
−2
−3
− Output Voltage − V
VOVI− Input Voltage − V
2
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
SMALL SIGNAL PULSE RESPONSE SMALL SIGNAL PULSE RESPONSE
Figure 37. Figure 38.
LARGE SIGNAL PULSE RESPONSE LARGE SIGNAL PULSE RESPONSE
Figure 39. Figure 40.
15
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t − Time − ns
Gain = +5
VCC = ±15 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 300 ps
−3
0
5
−5
1
−1
0 302010 40 50 7060 80 90 100
3
−10
−15
− Output Voltage − V
VOVI− Input Voltage − V
10
t − Time − ns
Gain = 5
VCC = ±5 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 300 ps
−600
0
1
−1
200
−200
0 302010 40 50 7060 80 90 100
600
−2
−3
− Output Voltage − V
VOVI− Input Voltage − mV
2
t − Time − ns
Gain = −1
VCC = ±15 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 2.5 ns
2
0
1
−1
1
−1
0 302010 40 50 7060 80 90 100
3
−2
−3
− Output Voltage − V
VOVI− Input Voltage − V
t − Time − ns
Gain = −1
VCC = ±5 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 300 ps
2
0
1
−1
1
−1
0 302010 40 50 7060 80 90 100
3
−2
−3
− Output Voltage − V
VOVI− Input Voltage − V
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
LARGE SIGNAL PULSE RESPONSE LARGE SIGNAL PULSE RESPONSE
Figure 41. Figure 42.
LARGE SIGNAL PULSE RESPONSE LARGE SIGNAL PULSE RESPONSE
Figure 43. Figure 44.
16
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t − Time − ns
Gain = −5
VCC = ±15 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 300 ps
−2
0
5
−5
1
−1
0 302010 40 50 7060 80 90 100
3
−10
−15
− Output Voltage − V
VOVI− Input Voltage − V
10
t − Time − ns
Gain = −5
VCC = ±5 V
RL = 150 Ω
RF = 1 kΩ
tr/tf= 300 ps
−600
0
1
−1
200
−200
0 302010 40 50 7060 80 90 100
600
−2
−3
− Output Voltage − V
VOVI− Input Voltage − mV
2
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
LARGE SIGNAL PULSE RESPONSE LARGE SIGNAL PULSE RESPONSE
Figure 45. Figure 46.
17
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APPLICATION INFORMATION
THEORY OF OPERATION
IN+ IN−
VCC+
VCC−
OUT
3 2 6
7
4
IIB
IIB
RECOMMENDED FEEDBACK AND GAIN RESISTOR VALUES
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
The THS3001 is a high-speed, operational amplifier configured in a current-feedback architecture. The device isbuilt using a 30-V, dielectrically isolated, complementary bipolar process with NPN and PNP transistorspossessing f
T
s of several GHz. This configuration implements an exceptionally high-performance amplifier thathas a wide bandwidth, high slew rate, fast settling time, and low distortion. A simplified schematic is shown inFigure 47 .
Figure 47. Simplified Schematic
The THS3001 is fabricated using Texas Instruments 30-V complementary bipolar process, HVBiCOM. Thisprocess provides the excellent isolation and extremely high slew rates that result in superior distortioncharacteristics.
As with all current-feedback amplifiers, the bandwidth of the THS3001 is an inversely proportional function of thevalue of the feedback resistor (see Figures 26 to 34). The recommended resistors for the optimum frequencyresponse are shown in Table 1 . These should be used as a starting point and once optimum values are found,1% tolerance resistors should be used to maintain frequency response characteristics. For most applications, afeedback resistor value of 1 k Ωis recommended - a good compromise between bandwidth and phase marginthat yields a stable amplifier.
18
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OFFSET VOLTAGE
VOO VIO1RF
RGIIBRS1RF
RGIIB– RF
+
−
VIO
+
RG
RS
RF
IIB−
VO
IIB+
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
APPLICATION INFORMATION (continued)Consistent with current-feedback amplifiers, increasing the gain is best accomplished by changing the gainresistor, not the feedback resistor. This is because the bandwidth of the amplifier is dominated by the feedbackresistor value and internal dominant-pole capacitor. The ability to control the amplifier gain independent of thebandwidth constitutes a major advantage of current-feedback amplifiers over conventional voltage-feedbackamplifiers. Therefore, once a frequency response is found suitable to a particular application, adjust the value ofthe gain resistor to increase or decrease the overall amplifier gain.
Finally, it is important to realize the effects of the feedback resistance on distortion. Increasing the resistancedecreases the loop gain and increases the distortion. It is also important to know that decreasing load impedanceincreases total harmonic distortion (THD). Typically, the third-order harmonic distortion increases more than thesecond-order harmonic distortion.
Table 1. Recommended Resistor Values for OptimumFrequency Response
GAIN R
F
for V
CC
=±15 V R
F
for V
CC
=±5 V
1 1 k Ω1 k Ω2, -1 680 Ω750 Ω2 620 Ω620 Ω5 560 Ω620 Ω
The output offset voltage, (V
OO
) is the sum of the input offset voltage (V
IO
) and both input bias currents (I
IB
) timesthe corresponding gains. The following schematic and formula can be used to calculate the output offset voltage:
Figure 48. Output Offset Voltage Model
19
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NOISE CALCULATIONS
_
+
RF
RS
RG
eRg
eRf
eRs en
IN+
Noiseless
IN−
eni eno
eni en2IN RS2IN– RFRG24 kTRs4 kTRFRG
Where: k = Boltzmann’s constant = 1.380658 × 10−23
T = Temperature in degrees Kelvin (273 +°C)
RF || RG = Parallel resistance of RF and RG
eno eni AVeni1RF
RG(Noninverting Case)
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
Noise can cause errors on small signals. This is especially true for amplifying small signals coming over atransmission line or an antenna. The noise model for current-feedback amplifiers (CFB) is the same as forvoltage feedback amplifiers (VFB). The only difference between the two is that CFB amplifiers generally specifydifferent current-noise parameters for each input, while VFB amplifiers usually only specify one noise-currentparameter. The noise model is shown in Figure 49 . This model includes all of the noise sources as follows:•e
n
= Amplifier internal voltage noise (nV/ √Hz)•IN+ = Nonverting current noise (pA/ √Hz)•IN- = Inverting current noise (pA/ √Hz)•e
Rx
= Thermal voltage noise associated with each resistor (e
Rx
= 4 kTR
x
)
Figure 49. Noise Model
The total equivalent input noise density (e
ni
) is calculated by using the following equation:
To get the equivalent output noise of the amplifier, just multiply the equivalent input noise density (e
ni
) by theoverall amplifier gain (A
V
).
As the previous equations show, to keep noise at a minimum, small value resistors should be used. As theclosed-loop gain is increased (by reducing R
G
), the input noise is reduced considerably because of the parallelresistance term. This leads to the general conclusion that the most dominant noise sources are the sourceresistor (R
S
) and the internal amplifier noise voltage (e
n
). Because noise is summed in a root-mean-squaresmethod, noise sources smaller than 25% of the largest noise source can be effectively ignored. This can greatlysimplify the formula and make noise calculations much easier.
20
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SLEW RATE
t − Time − ns
SR = 1500 V/µs
Gain = 5
VCC = ±15 V
RL = 150 Ω
RF = 1 kΩ
tr/tf = 10 ns
10
0
5
−5
2
0
0 604020 80 100 140120 160 180 200
4
−10
−15
− Output Voltage − V
VOVI− Input Voltage − V
t − Time − ns
SR = 2400 V/µs
Gain = 5
VCC = ±15 V
RL = 150 Ω
RF = 1 kΩ
tr/tf = 5 ns
−2
0
5
−5
2
0
0 604020 80 100 140120 160 180 200
4
−10
−15
− Output Voltage − V
VOVI− Input Voltage − V
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
The slew rate performance of a current-feedback amplifier, like the THS3001, is affected by many differentfactors. Some of these factors are external to the device, such as amplifier configuration and PCB parasitics, andothers are internal to the device, such as available currents and node capacitance. Understanding some of thesefactors should help the PCB designer arrive at a more optimum circuit with fewer problems.
Whether the THS3001 is used in an inverting amplifier configuration or a noninverting configuration can impactthe output slew rate. As can be seen from the specification tables as well as some of the figures in this datasheet, slew-rate performance in the inverting configuration is faster than in the noninverting configuration. This isbecause in the inverting configuration the input terminals of the amplifier are at a virtual ground and do notsignificantly change voltage as the input changes. Consequently, the time to charge any capacitance on theseinput nodes is less than for the noninverting configuration, where the input nodes actually do change in voltagean amount equal to the size of the input step. In addition, any PCB parasitic capacitance on the input nodesdegrades the slew rate further simply because there is more capacitance to charge. Also, if the supply voltage(V
CC
) to the amplifier is reduced, slew rate decreases because there is less current available within the amplifierto charge the capacitance on the input nodes as well as other internal nodes.
Internally, the THS3001 has other factors that impact the slew rate. The amplifier's behavior during the slew-ratetransition varies slightly depending upon the rise time of the input. This is because of the way the input stagehandles faster and faster input edges. Slew rates (as measured at the amplifier output) of less than about1500 V/µs are processed by the input stage in a linear fashion. Consequently, the output waveform smoothlytransitions between initial and final voltage levels. This is shown in Figure 50 . For slew rates greater than 1500V/µs, additional slew-enhancing transistors present in the input stage begin to turn on to support these fastersignals. The result is an amplifier with extremely fast slew-rate capabilities. Figure 50 and Figure 51 showwaveforms for these faster slew rates. The additional aberrations present in the output waveform with thesefaster-slewing input signals are due to the brief saturation of the internal current mirrors. This phenomenon,which typically lasts less than 20 ns, is considered normal operation and is not detrimental to the device in anyway. If for any reason this type of response is not desired, then increasing the feedback resistor or slowing downthe input-signal slew rate reduces the effect.
SLEW RATE SLEW RATE
Figure 50. Figure 51.
21
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DRIVING A CAPACITIVE LOAD
+
_
THS3001
CLOAD
1 kΩ
Input
Output
1 kΩ
20 Ω
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
Driving capacitive loads with high-performance amplifiers is not a problem as long as certain precautions aretaken. The first is to realize that the THS3001 has been internally compensated to maximize its bandwidth andslew-rate performance. When the amplifier is compensated in this manner, capacitive loading directly on theoutput will decrease the device's phase margin leading to high-frequency ringing or oscillations. Therefore, forcapacitive loads of greater than 10 pF, it is recommended that a resistor be placed in series with the output ofthe amplifier, as shown in Figure 52 . A minimum value of 20 Ωshould work well for most applications. Forexample, in 75- Ωtransmission systems, setting the series resistor value to 75 Ωboth isolates any capacitanceloading and provides the proper line impedance matching at the source end.
Figure 52. Driving a Capacitive Load
22
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PCB DESIGN CONSIDERATIONS
−2
−4
−6
−8 1M f − Frequency − Hz
−1
−3
−5
−7
100k 10M 100M
0
Output Amplitude − dB
1
1G
Gain = −1
VCC = ±15 V
VO = 200 mV RMS
CI = 10 pF
CI = Stray C Only
+
−
1 kΩ
RL =
150 Ω
Cin
Vin
Vout
1 kΩ
50 Ω
2
0
−2
−4 1M f − Frequency − Hz
3
1
−1
−3
100k 10M 100M
4
6
Output Amplitude − dB
5
7
1G
Gain = 1
VCC = ±15 V
VO = 200 mV RMS
CI = 1 pF
CI = 0 pF
(Stray C Only)
+
−
1 kΩ
50 ΩRL =
150 Ω
Cin
Vin Vout
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
Proper PCB design techniques in two areas are important to ensure proper operation of the THS3001. Theseareas are high-speed layout techniques and thermal-management techniques. Because the THS3001 is ahigh-speed part, the following guidelines are recommended.•Ground plane - It is essential that a ground plane be used on the board to provide all components with a lowinductive ground connection. Although a ground connection directly to a terminal of the THS3001 is notnecessarily required, it is recommended that the thermal pad of the package be tied to ground. This servestwo functions: it provides a low inductive ground to the device substrate to minimize internal crosstalk, and itprovides the path for heat removal.•Input stray capacitance - To minimize potential problems with amplifier oscillation, the capacitance at theinverting input of the amplifiers must be kept to a minimum. To do this, PCB trace runs to the inverting inputmust be as short as possible, the ground plane must be removed under any etch runs connected to theinverting input, and external components should be placed as close as possible to the inverting input. This isespecially true in the noninverting configuration. An example of this can be seen in Figure 53 , which showswhat happens when a 1-pF capacitor is added to the inverting input terminal. The bandwidth increases at theexpense of peaking. This is because some of the error current is flowing through the stray capacitor insteadof the inverting node of the amplifier. Although, while the device is in the inverting mode, stray capacitance atthe inverting input has a minimal effect. This is because the inverting node is at a virtual ground and thevoltage does not fluctuate nearly as much as in the noninverting configuration. This can be seen inFigure 54 , where a 10-pF capacitor adds only 0.35 dB of peaking. In general, as the gain of the systemincreases, the output peaking due to this capacitor decreases. While this can initially look like a faster andbetter system, overshoot and ringing are more likely to occur under fast transient conditions. So properanalysis of adding a capacitor to the inverting input node should be performed for stable operation.
OUTPUT AMPLITUDE OUTPUT AMPLITUDEvs vsFREQUENCY FREQUENCY
Figure 53. Figure 54.
•Proper power-supply decoupling - Use a minimum 6.8-µF tantalum capacitor in parallel with a 0.1-µF ceramiccapacitor on each supply terminal. It may be possible to share the tantalum among several amplifiersdepending on the application, but a 0.1-µF ceramic capacitor should always be used on the supply terminalof every amplifier. In addition, the 0.1-µF capacitor should be placed as close as possible to the supplyterminal. As this distance increases, the inductance in the connecting etch makes the capacitor lesseffective. The designer should strive for distances of less than 0.1 inch between the device power terminaland the ceramic capacitors.
23
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THERMAL INFORMATION
PDTMAX–TA
JA
Where: PD= Maximum power dissipation of THS3001 (watts)
TMAX = Absolute maximum junction temperature (150°C)
TA= Free-ambient air temperature (°C)
θJA = Thermal coefficient from die junction to ambient air (°C/W)
TA − Free-Air Temperature − °C
1
0−20 20
1.5
0.5
0 40 100−40 60 80
PD− Maximum Power Dissipation − W
SOIC-D Package:
θJA = 169°C/W
TJ = 150°C
No Airflow
GENERAL CONFIGURATIONS
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
The THS3001 incorporates output-current-limiting protection. Should the output become shorted to ground, theoutput current is automatically limited to the value given in the data sheet. While this protects the output againstexcessive current, the device internal power dissipation increases due to the high current and large voltage dropacross the output transistors. Continuous output shorts are not recommended and could damage the device.Additionally, connection of the amplifier output to one of the supply rails ( ±V
CC
) is not recommended. Failure ofthe device is possible under this condition and should be avoided. But, the THS3001 does not incorporatethermal-shutdown protection. Because of this, special attention must be paid to the device's power dissipation orfailure may result.
The thermal coefficient θ
JA
is approximately 169 °C/W for the SOIC 8-pin D package. For a given θ
JA
, themaximum power dissipation, shown in Figure 55 , is calculated by the following formula:
Figure 55. Maximum Power Dissipation vs Free-Air Temperature
A common error for the first-time CFB user is the creation of a unity gain buffer amplifier by shorting the outputdirectly to the inverting input. A CFB amplifier in this configuration will oscillate and is not recommended. TheTHS3001, like all CFB amplifiers, must have a feedback resistor for stable operation. Additionally, placingcapacitors directly from the output to the inverting input is not recommended. This is because, at highfrequencies, a capacitor has a low impedance. This results in an unstable amplifier and should not be consideredwhen using a current-feedback amplifier. Because of this, integrators and simple low-pass filters, which areeasily implemented on a VFB amplifier, have to be designed slightly differently. If filtering is required, simplyplace an RC-filter at the noninverting terminal of the operational-amplifier (see Figure 56 ).
24
www.ti.com
VIVO
C1
+
−
RGRF
R1
f3 dB 1
2R1C1
VO
VI1RF
RG1
1sR1C1
VI
C2
R2R1
C1
RF
RG
R1 = R2 = R
C1 = C2 = C
Q = Peaking Factor
(Butterworth Q = 0.707)
(
=1
Q
2 − )
RGRF
_
+f3 dB 1
2RC
+
−
C1
RF
RG
VO
VI
THS3001
VO
VIRF
RG
S1
RFC1
S
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
Figure 56. Single-Pole Low-Pass Filter
If a multiple-pole filter is required, the use of a Sallen-Key filter can work well with CFB amplifiers. This isbecause the filtering elements are not in the negative feedback loop and stability is not compromised. Because oftheir high slew rates and high bandwidths, CFB amplifiers can create accurate signals and help minimizedistortion. An example is shown in Figure 57 .
Figure 57. 2-Pole Low-Pass Sallen-Key Filter
There are two simple ways to create an integrator with a CFB amplifier. The first, shown in Figure 58 , adds aresistor in series with the capacitor. This is acceptable because at high frequencies, the resistor is dominant andthe feedback impedance never drops below the resistor value. The second, shown in Figure 59 , uses positivefeedback to create the integration. Caution is advised because oscillations can occur due to the positivefeedback.
Figure 58. Inverting CFB Integrator
25
www.ti.com
+
−
RF
VO
RG
R2R1
C1
RA
VI
THS3001
For Stable Operation:
R2
R1 || RA≥RF
RG
sR1C1
()
RF
RG
1 +
VO ≅ VI
+
−
750 Ω750 Ω
75 Ω75 Ω
75 Ω
75 Ω
75 Ω
N Lines
VO1
VON
THS3001
75-Ω Transmission Line
VI
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
Figure 59. Noninverting CFB Integrator
The THS3001 may also be employed as a good video distribution amplifier. One characteristic of distributionamplifiers is the fact that the differential phase (DP) and the differential gain (DG) are compromised as thenumber of lines increases and the closed-loop gain increases (see Figures 22 to 25 for more information). Besure to use termination resistors throughout the distribution system to minimize reflections and capacitiveloading.
Figure 60. Video Distribution Amplifier Application
26
www.ti.com
EVALUATION BOARD
_
+
THS3001
VCC−
VCC+
C3
6.8 µF
C4
0.1 µF
C1
6.8 µF
C2
0.1 µF
R1
1 kΩ
R5
1 kΩ
R3
49.9 Ω
R2
49.9 Ω
R4
49.9 Ω
IN−
IN+
OUT
+
+
THS3001
SLOS217E – JULY 1998 – REVISED MARCH 2005
An evaluation boards is available for the THS3001 (SLOP130). The board has been configured for low parasiticcapacitance in order to realize the full performance of the amplifier. A schematic of the evaluation board is shownin Figure 61 . The circuitry has been designed so that the amplifier may be used in either an inverting ornoninverting configuration. For more detailed information, refer to the THS3001 EVM User's Manual (literaturenumber SLOV021). To order the evaluation board, contact your local TI sales office or distributor.
Figure 61. THS3001 Evaluation Board Schematic
27
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
THS3001CD ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001CDGN ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001CDGNG4 ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001CDGNR ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001CDGNRG4 ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001CDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001HVCD PREVIEW SOIC D 8 75 TBD Call TI Call TI
THS3001HVCDGN ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001HVCDGNR ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001HVCDR PREVIEW SOIC D 8 2500 TBD Call TI Call TI
THS3001HVID PREVIEW SOIC D 8 75 TBD Call TI Call TI
THS3001HVIDGN ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001HVIDGNR ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001HVIDR PREVIEW SOIC D 8 2500 TBD Call TI Call TI
THS3001ID ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001IDGN ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001IDGNG4 ACTIVE MSOP-
Power
PAD
DGN 8 80 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001IDGNR ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001IDGNRG4 ACTIVE MSOP-
Power
PAD
DGN 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
THS3001IDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 24-May-2005
Addendum-Page 1
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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