Product Specification PE42420 UltraCMOS(R) SPDT RF Switch 100-6000 MHz Product Description Features The PE42420 is a HaRPTM technology-enhanced absorptive SPDT RF switch designed for use in 3G/4G wireless infrastructure and other high performance RF applications. It is ideal for transmit path switching, RF and IF signal routing, AGC loops, and filter bank switching applications. HaRPTM technology enhanced No gate and phase lag No drift in insertion loss and phase This general purpose switch is comprised of two symmetric RF ports and has exceptional port to port isolation up to 6 GHz. An integrated CMOS decoder facilitates a two-pin low voltage CMOS control interface. In addition, no external blocking capacitors are required if 0 VDC is present on the RF ports. The PE42420 is manufactured on Peregrine's UltraCMOS process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate. (R) Peregrine's HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 1. Functional Diagram High linearity IIP3 of 65 dBm High isolation 69 dB @ 1 GHz 62 dB @ 3 GHz 50 dB @ 6 GHz Supports +1.8V control logic +105 C operating temperature High ESD tolerance 4 kV HBM on RFC 2 kV HBM on all other pins Figure 2. Package Type 20-lead 4 x 4 mm LGA DOC-02177 Document No. DOC-14514-5 www.psemi.com (c)2010-2016 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 12 PE42420 Product Specification Table 1. Electrical Specifications @ +25 C, VDD = 3.0V (ZS = ZL = 50) Parameter Path Condition Operating frequency Insertion loss Isolation Isolation Typ 100 Max Unit 6000 MHz 1.15 1.15 1.20 1.35 1.55 1.90 dB dB dB dB dB dB RFC-RFX 100-1000 MHz 1000-2000 MHz 2000-3000 MHz1 3000-4000 MHz1 4000-5000 MHz1 5000-6000 MHz1 RFX-RFX 100-1000 MHz 1000-2000 MHz 2000-3000 MHz 3000-4000 MHz 4000-5000 MHz 5000-6000 MHz 67 63 59 60 54 44 69 64 62 64 60 50 dB dB dB dB dB dB RFC-RFX 100-1000 MHz 1000-2000 MHz 2000-3000 MHz 3000-4000 MHz 4000-5000 MHz 5000-6000 MHz 69 65 63 62 52 44 71 67 68 67 57 48 dB dB dB dB dB dB 20 15 13 dB dB dB 0.95 0.95 1.00 1.15 1.25 1.60 100-4000 MHz 4000-5000 MHz1 5000-6000 MHz1 Return loss (all ports) Input 1dB compression point2 RFC-RFX 100-6000 MHz Input IP2 RFC-RFX 100-6000 MHz Input IP3 RFC-RFX 100-6000 MHz Switching time Min 33 60 50% CTRL to 90% or 10% RF dBm 110 dBm 65 dBm 300 400 ns Notes: 1. Insertion loss and return loss can be improved by external matching. 2. The input 1dB compression point is a linearity figure of merit. Refer to Table 3 for the maximum operating power PIN (50). (c)2010-2016 Peregrine Semiconductor Corp. All rights reserved. Page 2 of 12 Document No. DOC-14514-5 UltraCMOS(R) RFIC Solutions PE42420 Product Specification Table 1A. Electrical Specifications @ +105 C, VDD = 2.3V to 5.5V (ZS = ZL = 50) Parameter Path Condition Operating frequency Insertion loss Isolation Isolation Min Typ 100 1.05 1.10 1.25 1.35 1.50 1.60 Max Unit 6000 MHz 1.25 1.35 1.45 1.75 2.00 2.00 dB dB dB dB dB dB RFC-RFX 100-1000 MHz 1000-2000 MHz 2000-3000 MHz1 3000-4000 MHz1 4000-5000 MHz1 5000-6000 MHz1 RFX-RFX 100-1000 MHz 1000-2000 MHz 2000-3000 MHz 3000-4000 MHz 4000-5000 MHz 5000-6000 MHz 66 63 59 60 54 44 68 64 62 64 60 50 dB dB dB dB dB dB RFC-RFX 100-1000 MHz 1000-2000 MHz 2000-3000 MHz 3000-4000 MHz 4000-5000 MHz 5000-6000 MHz 68 65 62 62 51 44 70 67 67 67 55 48 dB dB dB dB dB dB 19 15 13 dB dB dB 100-4000 MHz 4000-5000 MHz1 5000-6000 MHz1 Return loss (all ports) Input 1dB compression point2 RFC-RFX 100-6000 MHz Input IP2 RFC-RFX 100-6000 MHz Input IP3 RFC-RFX 100-6000 MHz Switching time 33 60 50% CTRL to 90% or 10% RF dBm 110 dBm 65 dBm 300 400 ns Notes: 1. Insertion loss and return loss can be improved by external matching. 2. The input 1dB compression point is a linearity figure of merit. Refer to Table 3 for the maximum operating power PIN (50). Document No. DOC-14514-5 www.psemi.com (c)2010-2016 Peregrine Semiconductor Corp. All rights reserved. Page 3 of 12 PE42420 Product Specification Figure 3. Pin Configuration (Top View) Table 3. Operating Ranges Parameter Symbol Min Supply voltage VDD 2.7 Supply current VDD = 2.7-5.5V IDD Digital input high (CTRL1, CTRL2) VIH Digital input low (CTRL1, CTRL2) VIL Max Unit 5.5 V 200 A 1.17 3.6 V -0.3 0.6 V 12 A PIN 30 dBm Maximum power into termination (RFX)* PMAX 20 dBm Operating temperature range TOP +105 C Digital input current Maximum operating power (RFC-RFX)* Table 2. Pin Descriptions Typ 120 9 ICTRL -40 Note: * 100% duty cycle, all bands, 50. Pin # Pin Name Description 1, 2, 4-7, 9, 10-12, 14, 15, 18, 19 GND Ground 3 RF1* RF port 8 RFC* RF common 13 RF2* RF port 16 CTRL2 Digital control logic input 2 17 CTRL1 Digital control logic input 1 20 VDD Pad GND Table 4. Absolute Maximum Ratings Parameter/Condition Supply voltage Supply voltage Exposed pad: ground for proper operation Note: * RF pins 3, 8 and 13 must be at 0 VDC. The RF pins do not require DC blocking capacitors for proper operation if the 0 VDC requirement is met. Digital input voltage (CTRL1, CTRL2) Operating power (RFC-RFX)1 Power into termination (RFX)1 Storage temperature range Maximum die junction temperature ESD voltage HBM RFC All other pins Min Max Unit VDD -0.3 5.5 V VCTRL -0.3 3.6 V PIN 30 dBm PMAX 20 dBm +150 C TJMAX +125 C VESD 4000 2000 V V VESD 100 V TST -65 2 ESD voltage MM3, all pins Notes: Symbol 1. 100% duty cycle, all bands, 50. 2. Human Body Model (MIL-STD 883 Method 3015). 3. Machine Model (JEDEC JESD22-A115). Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. (c)2010-2016 Peregrine Semiconductor Corp. All rights reserved. Page 4 of 12 Document No. DOC-14514-5 UltraCMOS(R) RFIC Solutions PE42420 Product Specification Electrostatic Discharge (ESD) Precautions When handling this UltraCMOS device, observe the same precautions that you would use with other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the specified rating. Table 5. Truth Table CTRL1 CTRL2 RFC-RF1 RFC-RF2 Low Low OFF OFF Low High OFF ON High Low ON OFF High High N/A* N/A* Note: * CTRL1 = High and CTRL2 = High are not supported Latch-Up Immunity Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. Switching Frequency The PE42420 has a maximum 25 kHz switching frequency. Switching frequency describes the time duration between switching events. Switching time is the time duration between the point the control signal reaches 50% of the final value and the point the output signal reaches within 10% or 90% of its target value. Switching time is provided in Table 1. Document No. DOC-14514-5 www.psemi.com Moisture Sensitivity Level The Moisture Sensitivity Level rating for the PE42420 in the 20-lead 4 x 4 mm LGA package is MSL3. Spurious Performance The typical spurious performance of the PE42420 is -155 dBm. (c)2010-2016 Peregrine Semiconductor Corp. All rights reserved. Page 5 of 12 PE42420 Product Specification Typical Performance Data @ +25 C and VDD = 3.0V, unless otherwise specified Figure 4. Insertion Loss (RFC-RFX) Figure 5. Insertion Loss vs Temp (RFX-RFC) Figure 6. Insertion Loss vs VDD (RFX-RFC) Figure 7. RFC Port Return Loss vs Temp (RF1 Active) Figure 8. RFC Port Return Loss vs VDD (RF1 Active) (c)2010-2016 Peregrine Semiconductor Corp. All rights reserved. Page 6 of 12 Document No. DOC-14514-5 UltraCMOS(R) RFIC Solutions PE42420 Product Specification Typical Performance Data@ Data +25 C and VDD = 3.0V, unless otherwise specified (continued) Figure 9. RFC Port Return Loss vs Temp (RF2 Active) Figure 10. RFC Port Return Loss vs VDD (RF2 Active) Figure 11. Active Port Return Loss vs Temp (RF1 Active) Figure 12. Active Port Return Loss vs VDD (RF1 Active) Figure 13. Terminated Port Return Loss vs Temp (RF1 Active) Figure 14. Terminated Port Return Loss vs VDD (RF1 Active) Document No. DOC-14514-5 www.psemi.com (c)2010-2016 Peregrine Semiconductor Corp. All rights reserved. Page 7 of 12 PE42420 Product Specification Typical Performance Data@ +25 C and VDD = 3.0V, unless otherwise specified (continued) Figure 15. Isolation vs Temp (RFX-RFX) Figure 16. Isolation vs VDD (RFX-RFX) Figure 17. Isolation vs Temp (RFC-RFX) Figure 18. Isolation vs VDD (RFC-RFX) (c)2010-2016 Peregrine Semiconductor Corp. All rights reserved. Page 8 of 12 Document No. DOC-14514-5 UltraCMOS(R) RFIC Solutions PE42420 Product Specification Evaluation Kit Figure 19. Evaluation Board Layout The SPDT switch evaluation board was designed to ease customer evaluation of Peregrine's PE42420. The RF common port is connected through a 50 transmission line via the top SMA connector, J2. RF1 and RF2 ports are connected through 50 transmission lines via SMA connectors J1 and J3, respectively. A 50 through transmission line is available via SMA connectors J4 and J5, which can be used to calculate the loss of the PCB. J6 provides DC and digital inputs to the device. The board is constructed of a four metal layer material with a total thickness of 36 mils. To achieve high isolation, the 50 transmission lines are designed in layer 2 using a stripline waveguide design. The board stack up for 50 transmission lines has 10 mil thickness of Rogers 4350 between layer 1 and layer 2, and 10 mil thickness of Rogers 4350 between layer 2 and layer 3. For the true performance of the PE42420 to be realized, the PCB should be designed in such a way that RF transmission lines and sensitive DC I/O traces are heavily isolated from one another. PRT-11505 Document No. DOC-14514-5 www.psemi.com (c)2010-2016 Peregrine Semiconductor Corp. All rights reserved. Page 9 of 12 PE42420 Product Specification Figure 20. Evaluation Board Schematic J6 HEADER 7X2 0 OHM 16 GND PE42420 GND 15 GND 14 GND 12 5 GND GND 11 2 4 6 8 10 12 14 R2 1M C2 C3 22pF 22pF J3 SMASM 50 OHM T-Line 1 10 9 8 2 4 6 8 10 12 14 GND GND GND RF2 4 RFC RF1 13 GND 3 R1 1M 1 3 5 7 9 11 13 2 R3 18 17 C1 19 U1 6 50 OHM T-Line 2 1 J4 SMASM 2 1 J5 SMASM 50 OHM T-Line 1 2 J2 SMASM GND GND GND 2 1 2 7 50 OHM T-Line GND 20 VDD 1 J1 SMASM C1 0.1 uF C2 C4 22pF 5 7 VDD 9 11 13 R4 0 OHM C1 1 C2 3 DOC-14527 (c)2010-2016 Peregrine Semiconductor Corp. All rights reserved. Page 10 of 12 Document No. DOC-14514-5 UltraCMOS(R) RFIC Solutions PE42420 Product Specification Figure 21. Package Drawing 20-lead 4 x 4 mm LGA 0.10 C A 4.00 (2X) 2.000.05 0.400.05 (x20) B 0.50 (x16) 11 0.31 (x20) 0.60 (x20) 0.50 (x16) 15 16 10 4.00 2.000.05 2.05 0.260.05 (x20) 20 6 5 0.10 C (2X) 0.10 4.20 1 2.00 REF Detail A 2.05 4.20 PIN #1 CORNER TOP VIEW BOTTOM VIEW RECOMMENDED LAND PATTERN 0.700.04 DOC-01890 0.10 C 0.940.07 0.08 C SEATING PLANE SIDE VIEW C 0.16 0.28 0.33 0.34 1 Figure 22. Top Marking Specifications 42420 YYWW ZZZZZZ = Pin 1 designator YYWW = Last 2 digits of assembly year, starting from 2010 ZZZZZ = Assembly lot code (max 6 characters) DOC-65737 Document No. DOC-14514-5 www.psemi.com (c)2010-2016 Peregrine Semiconductor Corp. All rights reserved. Page 11 of 12 PE42420 Product Specification Figure 23. Tape and Reel Drawing Tape Feed Direction Notes: 1. 10 sprocket hole pitch cumulative tolerance 0.02. 2. Camber not to exceed 1 mm in 100 mm. 3. Material: PS + C. 4. Ao and Bo measured as indicated. 5. Ko measured from a plane on the inside bottom of the pocket to the top surface of the carrier. 6. Pocket position relative to sprocket hole measured as true position of pocket, not pocket hole. Ao = 4.35 mm Bo = 4.35 mm Ko = 1.1 mm Table 6. Ordering Information Order Code Description Package Shipping Method PE42420C-Z PE42420 SPDT RF switch Green 20-lead 4 x 4 mm LGA 3000 units / T&R EK42420C-02 PE42420 Evaluation kit Evaluation kit 1 / Box Sales Contact and Information For sales and contact information please visit www.psemi.com. Advance Information: The product is in a formative or design stage. The datasheet contains design target specifications for product development. Specifications and features may change in any manner without notice. Preliminary Specification: The datasheet contains preliminary data. Additional data may be added at a later date. Peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. Product Specification: The datasheet contains final data. In the event Peregrine decides to change the specifications, Peregrine will notify customers of the intended changes by issuing a CNF (Customer Notification Form). The information in this datasheet is believed to be reliable. However, Peregrine assumes no liability for the use of this information. Use shall be entirely at the user's own risk. (c)2010-2016 Peregrine Semiconductor Corp. All rights reserved. Page 12 of 12 No patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. Peregrine's products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the Peregrine product could create a situation in which personal injury or death might occur. Peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. The Peregrine name, logo, UltraCMOS and UTSi are registered trademarks and HaRP, MultiSwitch and DuNE are trademarks of Peregrine Semiconductor Corp. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com. Document No. DOC-14514-5 UltraCMOS(R) RFIC Solutions