NIS6111QPT1 - ON Semiconductor - Datasheet.Directory

October, 2008 − Rev. 6

1Publication Order Number:

NIS6111/D

NIS6111

BERStIC (Better Efficiency

Rectifier System)

Ultra Efficient, High Speed Diode

The NIS6111 ORing diode is a high speed, high efficiency, hybrid

rectifier, designed for low voltage, high current systems, such as

those required for today’s digital circuits. It couples a high speed

integrated circuit with a power MOSFET to create a diode with the

same forward drop characteristics as a MOSFET. It offers increased

efficiency for switching power supplies as well as in ORing diode

applications.

It offers a low on resistance that can be further reduced by the

addition of external MOSFETs. It features the highest reverse

recovery speed of any device in the industry.

Features

•Low Forward Drop Improves System Efficiency

•Ultra High Speed

•Can be used in High Side and Low Side Configurations

•24 V Rating

•Allows use of External MOSFETs for Extended Current Handling

Capacity

•Pb−Free Package is Available*

Applications

•Redundant Power Supplies for High−Availability Systems

•Static ORing Diodes

•Low Voltage, Isolated Outputs

•Flyback, Forward Converter, Half Bridge Converters

PIN ASSIGNMENT

Pin Symbol Function

1 Anode Power Input Connected to System

2 Bias Output of Internal Voltage Regulator provides power for

internal only. No external components required at this pin.

3 Gate Gate Driver Output for Internal and External

N−Channel MOSFET

4 Cathode Power Output Connected to System

5Reg In Input of Internal Voltage Regulator

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques Reference

Manual, SOLDERRM/D.

PLLP32

CASE 488AC

PIN CONNECTIONS

MARKING

DIAGRAM

NIS6111= Specific Device Code

A = Assembly Location

WL = Wafer Lot

YY = Year

WW = Work Week

G = Pb−Free Package

NIS6111

AWLYYWWG

ÇÇÇÇÇÇÇ

ÇÇÇ

ÇÇ

ÇÇÇÇÇÇ

ÇÇ

(Bottom View)

321

http://onsemi.com

Equivalent Circuit

Cathode

Reg In Gate

Anode NTD110N02R

Device Package Shipping†

ORDERING INFORMATION

NIS6111QPT1 PLLP32 1500 Tape & Reel

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.

NIS6111QPT1G PLLP32

(Pb−Free)

1500 Tape & Reel

NIS6111

http://onsemi.com

MAXIMUM RATINGS (TJ = 25°C, unless otherwise noted.)

Rating Symbol Value Unit

Peak Repetitive Reverse Voltage (VK to VA) VRRM 24 V

Peak Regulator Input (Reg In) Voltage Vregmax 28 V

Average Rectified Forward Current IFAV 30 A

Non−repetitive Peak Surge Current IFSM 90 A

Analog Die Thermal Resistance (Min Copper Area) qA j−a83 °C/W

MOSFET Die Thermal Resistance (Min Copper Area) qM j−a78 °C/W

Analog Die Thermal Resistance (Junction−to−Top of Board) qA j−t4.9 °C/W

MOSFET Die Thermal Resistance (Junction−to−Top of Board) qM j−t0.6 °C/W

Analog Die Thermal Resistance (Junction−to−Bottom of Board) (Note 4) qA j−b30 °C/W

MOSFET Die Thermal Resistance (Junction−to−Bottom of Board) (Note 4) qM j−b7.0 °C/W

Storage Temperature Range Tstg −55 to 150 °C

Operating Temperature Range TJ−40 to 125 °C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

NIS6111

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ELECTRICAL CHARACTERISTICS (TJ = 25°C, Reg In = 8.0 V, unless otherwise noted.)

Characteristic Symbol Min Typ Max Unit

SYNCHRONOUS RECTIFIER

ON STATE

Conduction Mode ON Resistance (I = 10 Adc, VGS = 5.0 V)

(I = 20 Adc, VGS = 5.0 V)

RON −

−

3.7

4.7

4.5

−

OFF STATE

Reverse Leakage Current (VR = 24 VDC) IDSS − − 10 mA

Reverse Leakage Current (VR = 24 VDC, TJ = 125°C) IDSS − − 100 mA

SWITCHING (See Figures 1 and 3) (Note 2)

FET Turn−on Time (Imax = 3.0 A, I rev = 1.0 A, Vrev = 5.0 V) tsat −45 −ns

Turnoff Propagation

Delay Time (Vds = Voffset to ID = 0)

tpd −35 −ns

BODY DIODE

Forward On−Voltage (Notes 1 and 3) I = 10 Adc, VGS = 0 V

I = 20 Adc, VGS = 0 V

VSD −

−

0.75

0.8

−

1.2

Vdc

POWER SUPPLY (VR = 20 V, TJ = 255C)

Supply Voltage (Pin 2 to Pin 1), Internal Bias Voltage VCC 4.8 5.0 5.2 V

Cap Charge Time

(0.5 V Initial Charge, 5.0 V @ Reg In, to 4.5 V, C = 0.22 mF)

TJ = −40°C to 125°C

tchg

2.0

−

3.7

4.7

5.0

−

Headroom (for Vcap = 4.7 V) Vhd 1.0 1.27 1.5 V

Minimum Duty Cycle for Operation (Freq = 100 kHz) (Note 5) dmin −2.0 −%

Delay Time (Tamb = 20°C) Td51 ns

Reg In Voltage (Pin 5 to Pin 1)

Minimum Voltage Required for Operation (VUVLO + Vhd) 4.8 V

Minimum Voltage Required for Full Gate Drive (VCC + Vhd) 6.3 V

CONTROL CIRCUIT

Bias Supply Current (VBIAS = 5.0 V) IBIAS 0.8 1.3 1.8 mA

Input Offset Voltage IOS −2.0 5.0 mV

Shutdown Voltage (UVLO) VUVLO 3.35 3.55 3.65 V

Turn−on Voltage (UVLO) VTO 3.65 3.81 3.95 V

1. Pulse width v 300 ms, duty cycle v 2%.

2. Pulse width 2.0 ms, duty cycle t5%.

3. Switching characteristics are independent of operating junction temperature.

4. Based on 0.062″ FR4 board, double−sided 1 oz copper.

5. Minimum time required to recharge internal capacitor.

NIS6111

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Figure 1. Switching Waveform

Vrev

Vfwd

tsat

Vsat

Imax

trev

Irev

Voltage

Regulator

Reg In

Bias

Gate Anode

Cathode

Figure 2. Functional Block Diagram

Figure 3. Synchronous Buck Turn Off Delay

1.8

1.6

1.2

1.4

1.0

0.8

0.6

Figure 4. On−Resistance Variation with Temperature

TJ, JUNCTION TEMPERATURE (°C)

RDS(on), DRAIN−TO−SOURCE RESISTANCE

(NORMALIZED)

IDSS, LEAKAGE (nA)

−50 50250−25 75 125100 150

ID = 55 A

VGS = 4.5 V

−40 −20 0 20 40 60 80 100 120

TEMPERATURE (°C)

DELAY TIME (nS)

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

−40 −20 0 20 40 60 80 100 120

TEMPERATURE (°C)

HEADROOM VOLTAGE (V)

Figure 5. Delay Time versus Temperature Figure 6. Headroom versus Temperature

NIS6111

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600055005000450040003500300025002000150010005000

COPPER AREA (mm2)

qJA (C/W)

Figure 7. Thermal Resistance vs. Copper Area for MOSFET (M) and Analog Die (A)

JA (M) − (M) Heated

JA (A) − (A) Heated

Source 1

5.15 V

5.2 V

15 V

Source 2

Load

Figure 8. Test Circuit for Short Circuit ORing Test Figure 9. Waveforms from Short Circuit ORing Test

Figure 10. Positive ORing Diode Connection with

Additional External FETs

5.0 V

Load

Anode Cathode

18 V

NTD110N02R

Reg In

Gate

12 V

AnodeCathode

Reg In

Load

Figure 11. Negative ORing Diode Connection

NIS6111

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OPERATING DESCRIPTION

Introduction

The BERS rectifier offers a new concept in rectification

for low voltage, high current outputs. This product

combines a high speed integrated circuit with a power

MOSFET, to create a device with speeds better than an

ultrafast silicon rectifier, and a forward drop that is less than

that of a Schottky diode.

This device is specifically designed for the low voltage

outputs required by today’s digital circuits. Current digital

products operate on voltages of less than 5.0 V and currents

in the tens to hundreds of amperes. BERS can greatly

increase the efficiency of low voltage, high current

converters, by reducing the rectifier drop to several

hundred millivolts.

This device consists of four major circuits as well as a

capacitor. BERS contains a power supply to regulate the

voltage on the bias supply cap, a high speed comparator to

sense the conduction state of the device, a high speed

driver, a power FET and a capacitor.

Bias Supply

The internal bias supply is a high current, switching

regulator. It will maintain a regulated voltage on the

internal capacitor as long as sufficient voltage is available

at the Reg In pin. When this pin is high, a current limited

switch allows current to charge the capacitor. When the

maximum charge voltage is reached, the switch is turned

off. If there is not sufficient reverse voltage to maintain a

5.0 V charge on the capacitor, the bias supply will charge

it to within 1.0 V of the reverse voltage.

The Regulator Input pin can be connected to the cathode

and will recharge the internal capacitor when the BERS is

reversed biased. This input requires a minimum voltage of

4.7 V to operate. In some cases this amount of reverse

voltage may not be available. When this is the case, the

Reg In pin can be connected to a higher voltage source. It

is not necessary that this source be synchronous with the

cathode voltage.

The Reg In voltage should not be allowed to go more

negative than the anode of the device. If this scenario can

occur, a small switching diode should be placed in series

with the Reg In pin.

Comparator/Driver

The polarity comparator is a medium gain, ultra high

speed design. It is integrated with the driver circuit, to

optimize the switching speed of the device. The

comparator input has a low offset voltage which biases the

inverting input several millivolts above ground. This is to

assure that at zero (or very low) current levels, the device

is off.

Figure 12. Detailed Block Diagram

Cap Power Supply

Reg In

UVLO

Cathode

FETComparator and Driver

Bias

NIS6111

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PACKAGE DIMENSIONS

PLLP32

CASE 488AC−01

ISSUE A

ÇÇÇÇ

0.15 C

THERMAL #1

INDEX AREA

0.08 C

0.10 C

TOP VIEW

SIDE VIEW

NOTES:

1. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO METALLIZED

TERMINAL AND IS MEASURED BETWEEN

0.25 MM AND 40 MM FROM TERMINAL TIP

4. UNILATERAL COPLANARITY ZONE APPLIES

TO THE EXPOSED HEAT SINK SLUG AS

WELL AS THEIR TERMINALS.

ÇÇÇÇÇÇÇ

32X

BOTTOM VIEW

ÇÇÇ

ÇÇ

ÇÇÇÇÇ

F1 F1

D2 D1

H2X

2526272829303132

161514131211109

bF1

0.10 BC

0.05 C

DIM MIN NOM MAX

MILLIMETERS

A1.750 1.850 1.950

A1 0.000 −−−− 0.050

A3 0.254 REF

b0.350 0.400 0.450

D9.000 BSC

D1 5.987 6.087 6.187

D2 1.924 2.024 2.124

D3 2.713 2.813 2.913

D4 1.584 1.684 1.784

D5 3.547 3.647 3.747

E9.000 BSC

E1 4.472 4.572 4.672

E2 0.638 0.738 0.838

e0.800 BSC

F1 1.500 REF

F2 1.324 1.424 1.524

G2.700 2.800 2.900

H2.000 REF

J1.016 BSC

K0.381 REF

L0.500 0.600 0.700

L1 0.062 0.162 0.262

L2 0.760 0.770 0.870

L3 0.281 0.381 0.481

NIS6111

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ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any

liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental

damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over

time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under

its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body,

or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death

may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees,

subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of

personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part.

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PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5773−3850

NIS6111/D

BERS is a trademark of Semiconductor Components Industries, LLC (SCILLC).

The product described herein (NIS6111), may be covered by U.S. patents including 6,271,712. There may be other patents pending.

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