2016-08-01 1 Rev. 2.0
ICL8105 - Digital Flyback Controller IC
XDP™ digital power
Datasheet
About this document
Scope and purpose
This document contains information about Infineon high-performance single-stage digital flyback controller
ICL8105 for LED lighting applications. Features and electrical characteristics are listed and explained.
Intended audience
This document is intended for customers wishing to design high-performance single-stage digital flyback AC-
DC converters for LED lighting based on the ICL8105 controller
ICL8105 - Digital Flyback Controller IC
Datasheet
Datasheet 2 Rev. 2.0
2016-08-01
Revision History
Page or Item Subjects (major changes since previous revision)
Rev. 2.0, 2016-08-01
Cover page Change “.dp digital power 2.0” to “XDP™ digital power”.
Page 4 & 5 Added product highlight & schematic for primary side micro-controller dimming
application.Updated schematic for secondary side 0-10V dimming application from using
dimming transformer to CDM10V.
Page 6 Updated pin SQW, ZCD definition and function in Table 2.
Page 7 Updated Section 2.1 to introduce “ICL8105 supports primary side micro-controller
dimming application”
Section 2.2.4 Updated Figure 9 and description for parameter naming correction from I_out_min to
I_out_dim_min. Added note to indicate V_dim_max is fixed at 1.72V.
Section 2.2.5 Updated description and figure for isolated dimming interface circuitry from using
dimming transformer to CDM10V
Section 2.2.6 Updated section title from “output voltage” to “ output load voltage”. Added description to
indicate wide output load voltage range condition (more than 2 times of the minimum
output load voltage)
Section 2.2.7 Updated application note description forthe auto-discharge circuit reference.
Section 2.2.9 Added footnote for parameter n_ss
Section 2.3 Tabled 4: Changed UVLO protection reaction from “auto-restart” to “hardware restart” and
added note for VCC overvoltage protection reaction to indicate it is configurable. Added
startup output undervoltage protection for Vout. Updated Section 2.3.3 description.
Section 2.4.1 Added description about ICL8105 excel tool and changed description from 40W form factor
board to 40W reference design with CDM10V
Section 2.4.2 Updated example value and configuration range of parameters in Table 5. Moved
t_min_demag from fine-tuning section to multimode section in Table 5. Moved parameter
Reaction_VCCP, a_DIM, N_DCM_MOD_GAIN, V_DIM_MIN & V_DIM_OFF,from Table 6 to Table 5, Moved
parameter V_outUV from Table 5 to Table 6, Changed parameter V_GD value (from 9V to 10.5V),
Changed parameter naming from EN_STOP to Debug_mode. Added parameter f_DCM_init and
remove parameter EN_EPFC. Added selection of “Narrow_24.9V” for parameter VCC_SUPPLY.
Page 24 Added section 2.4.3 about “Debug mode support”.
Table 10 Added row with Ta(max) =105 °C, Tj(max) =150 °C, Added note of Ta(max), Tj(max) limit
based on f_sw_max setting
Table 11 Added row with tMCLK(typ) = 20.9ns, Added note of tMCLK(typ) selection based on f_sw_max
Table 15 Added V_OCP1 tolerance based on lower V_OCP1 setting range. Added V_OCP2 selection of
0.6V and changed the range of V_OCP1 in the note for V_OCP2 selection
Table 16 Changed V_GD typical value from 9.0V to 10.5V
Revision History
ICL8105 - Digital Flyback Controller IC
Datasheet
Datasheet 3 Rev. 2.0
2016-08-01
Table of Contents
About this document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1 Pin configuration and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Controller features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2.1 Primary side voltage and current sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2.1.1 Input current sensing via pin CS and output current calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.1.2 Input voltage sensing via pin ZCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.1.3 Output voltage sensing via pin ZCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.2 Primary side control scheme for output current control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2.3 Power factor correction (PFC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2.4 Dimming via pin DIM/UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2.5 Isolated dimming interface with CDM10V (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.2.6 Wide output load voltage range circuit (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.7 Automatic output discharge circuit (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.8 VCC startup function combined with direct input monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.9 Configurable soft start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.2.10 Configurable gate voltage rising slope at pin GD (Lower EMI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.3 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.3.1 Undervoltage lockout for VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.2 Overvoltage protection for VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.3 Over / undervoltage protection for output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.4 Over / undervoltage protection for input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
2.3.5 Input overcurrent detection level 1 (OCP1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.6 Input overcurrent protection level 2 (OCP2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.7 Output overcurrent protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.8 Overtemperature protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.3.9 Firmware protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.4 Configuration and support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.4.1 Configuration procedure and design-in support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.4.2 Overview configurable parameters and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.4.3 Debug mode support . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.1 Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.2 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.4 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4 Outline dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Datasheet 4 Rev. 2.0
2016-08-01
ICL8105 - Digital Flyback Controller IC
Datasheet
Overview
Product highlights
Highly accurate primary side controlled output current (Line/load regulation typical within +/- 3%)
High power quality (typical PF up to 0.99 and THD < 10%)
High Efficiency (up to 91%)
Configurable output current with no BOM change
Supports universal input voltage (85 – 305 V AC)
Supports wide output load voltage (up to 4 times of minimum output load voltage)
Ideal for application with dimming signal from micro-controller on primary side
Supports fully isolated 0 – 10 V dimming with Infineon CDM10V
Supports low output current dimming.
Low standby power
Features
Single stage QR Flyback with PFC and high precision primary side controlled constant current output
Excellent line and load regulation
Supports AC input (45 ~ 65 Hz) and/or DC input voltage operation
Integrated 600 V startup cell
Low Bill Of Material (BOM)
Configurable parameters, e.g. adjustable voltage and current ranges, protection modes
Supports non-dimmed and/or dimmed applications.
Intelligent thermal management with adaptive thermal protection
Applications
Electronic control gear for LED luminaires (5 W to 80 W)
Description
The ICL8105 is a high performance microcontroller-based digital single-stage flyback controller with power
factor correction (PFC) for constant output current applications. The IC is available in a DSO-8 package and
supports a wide feature set, requiring a minimum of external components. The digital engine offers the
possibility to configure operational parameters and protection modes, which helps to ease the design phase
and allows a reduced number of hardware variants in production. Accurate primary side output current
control is implemented to eliminate the need for secondary side feedback circuitry.
Table 1
Product Type Package
ICL8105 PG-DSO-8
Datasheet 5 Rev. 2.0
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ICL8105 - Digital Flyback Controller IC
Datasheet
Figure 1 Typical application 1 (Primary side micro-controller dimming)
Figure 2 Typical application 2 (Secondary side 0-10V dimming)
85 ...305 V AC
VCC
Internal
temperature
sensor
Zero crossing
detection
Startup cell
control PWM
Current
sensing
Dimming /
UART
CS
GD
GND
ZCD
ICL8105
Square wave
generator
SQW
Parameters
Configuration
DIM/UART
Output
HV
Primary side
Micro-controller
PWM
Dimming
signal
RC Low
Pass Filter
85 ...305 V AC
VCC
Internal
temperature
sensor
Zero crossing
detection
Startup cell
control PWM
Current
sensing
Dimming /
UART
CS
GD
GND
ZCD
ICL8105
Square wave
generator
SQW
Parameters
Configuration
DIM/UART
0–10V
input
Output
HV
Isolated Dimming
Circuit with CDM10V
CDM10V
Digital to
Analog
conversion
Vcc
Rdim+
Iout
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ICL8105 - Digital Flyback Controller IC
Datasheet
Pin configuration and description
1 Pin configuration and description
The pin configuration is shown in Figure 3. The pin functions are listed and described in Table 2.
Figure 3 Pin configuration
Table 2 Pin definitions and functions
Symbol Pin Type Function
ZCD 1 I Zero crossing detection
Pin ZCD is connected to an auxiliary winding via the resistor divider for zero
crossing detection. Output & input voltage are also measured with the
sampled positive & negative voltage sensing.
DIM/UART 2 I/O Dimming / UART
Shared functioning pin with either as dimming Input or UART configuration.
The dimming input voltage, VDIM sensing range is from 0.1 to 2V. Once the pin
voltage exceeds 2.2V (for example when the isolated USB interface board is
connected to the IC), this pin will function as UART configuration and the IC
will stay in non-dimming operation unless it is reset or restarted.
CS 3 I Current sense
Pin CS is connected to an external shunt resistor and the source of the power
MOSFET.
GD 4 O Gate driver
Output signal to drive an external power MOSFET.
HV 5 I High voltage
Pin HV is connected to the rectified input voltage via external resistor. An
internal 600 V HV startup-cell is used to pre-charge VCC for IC startup once the
mains input voltage is applied. Furthermore sampled high voltage sensing is
used for synchronization with the input voltage frequency.
SQW 6 O Square wave generator
Pin SQW is capable of providing a square wave signal for driving the isolated
dimming transformer circuit, if necessary. Otherwise, this signal can be
turned off by configuration.
VCC 7 I Voltage supply
IC power supply
GND 8 Power and signal ground
1
2
3
4
6
7
8
SQW
ZCD
VCC
CS
GND
PG-DSO-8 (150mil)
GD
5
HV
DIM/UART
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ICL8105 - Digital Flyback Controller IC
Datasheet
Functional description
2 Functional description
The functional description provides an overview about the integrated functions and features as well as their
relationship. The mentioned parameters and equations are based on typical values at TA = 25 °C. The
corresponding min. and max. values are shown in the electrical characteristics.
2.1 Introduction
The ICL8105 is a digital AC/DC flyback controller with Power Factor Correction (PFC). The PFC function enables
a rectified sinusoidal input current waveform with a power factor typically up to 0.99 and THD < 10% for a wide
range of operating conditions. ICL8105 provides primary side constant output current control that avoids the
secondary side control feedback loop circuitry usually needed in isolated power converters. This approach
supports a low part count that is necessary to build up the application. ICL8105 has multi-mode operations
and it selects the best mode of operation based on operating conditions. The multi-mode operation will
automatically switch between quasi-resonant mode (QRM) and discontinuous mode (DCM) and active burst
mode (ABM). In addition, ICL8105 supports both secondary side 0 - 10 V dimming and primary side micro-
controller dimming application. Digital and RF interfaces can be supported by a microcontroller using a
digital-to-analog converter.
The ICL8105 provides a high flexibility in the design-in of the application. A graphic user interface (GUI) tool
supports users to tune a set of configurable parameters. The configuration can be done via a single pin UART
interface at pin DIM/UART.
2.2 Controller features
Table 3 gives an overview about the controller features that are described in the mentioned chapters.
Table 3 Controller features
Primary side voltage and current sensing Chapter 2.2.1
Primary side control scheme for output current control Chapter 2.2.2
Power factor correction (PFC) Chapter 2.2.3
Dimming via pin DIM/UART Chapter 2.2.4
Isolated dimming interface with CDM10V (optional) Chapter 2.2.5
Wide output load voltage range circuit (optional) Chapter 2.2.6
Automatic output discharge circuit (optional) Chapter 2.2.7
VCC startup function combined with direct input monitoring Chapter 2.2.8
Configurable soft start Chapter 2.2.9
Configurable gate voltage rising slope at pin GD (Lower EMI) Chapter 2.2.10
Datasheet 8 Rev. 2.0
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ICL8105 - Digital Flyback Controller IC
Datasheet
Functional description
2.2.1 Primary side voltage and current sensing
The ICL8105 provides a primary side control of the output current by means of measuring the input peak
current and measuring the conduction period of the output diode. Input and output voltages are measured at
pin ZCD using an external resistor divider and an auxiliary winding of the transformer. The voltage signal VAUX
contains the information of the rectified input voltage Vin and the output voltage Vout at the secondary side.
Figure 4 shows typical current and voltage waveforms of the Quasi-Resonant flyback application.
The following topics are described:
Input current sensing via pin CS and output current calculation (Chapter 2.2.1.1)
Input voltage sensing via pin ZCD (Chapter 2.2.1.2)
Output voltage sensing via pin ZCD (Chapter 2.2.1.3)
Figure 4 Typical waveforms (Example with QRM valley switching)
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ICL8105 - Digital Flyback Controller IC
Datasheet
Functional description
2.2.1.1 Input current sensing via pin CS and output current calculation
The output current Iout is determined by the primary input peak current Ip,pk which is sensed at pin CS at time
tsample1, by the duration of conduction of the output diode (tsample2 - tsample1) and by the switching period tperiod.
The result is used for the control loop and for output overcurrent protections (Chapter 2.3.7).
2.2.1.2 Input voltage sensing via pin ZCD
The input voltage is measured using current IIV at pin ZCD at time tsample1. As the voltage VAUX is a negative
voltage, pin ZCD is clamped to a fixed negative voltage VINPCLN (Figure 5). The negative current IIV (flowing out
of pin ZCD) is proportional to the input voltage. The monitored input voltage is used for input over- and
undervoltage protection (Chapter 2.3.4).
Figure 5 Input voltage sensing via pin ZCD
2.2.1.3 Output voltage sensing via pin ZCD
The output voltage is measured using voltage VZCDSH at pin ZCD at time tsample2 (Figure 6). The measured
voltage at pin ZCD and the dimensioning of the resistor divider are used to calculate the reflected output
voltage Vout,aux at the auxiliary winding. Vout,aux is used for output over- and undervoltage protection
(Chapter 2.3.3). The relation between VCC and ZCD can be decoupled by adding a regulator for VCC
(Chapter 2.2.6).
Figure 6 Output voltage sensing via pin ZCD
Note: Please note that the time (tsample2 - tsample1) has to be longer than 2.0 µs to ensure that the reflected output
voltage can be correctly sensed at pin ZCD!
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ICL8105 - Digital Flyback Controller IC
Datasheet
Functional description
2.2.2 Primary side control scheme for output current control
The basic control scheme for the primary side constant current control is shown in Figure 7.
Figure 7 Integrated PI control scheme for output current control
The sampled signal VCS at pin CS is used to estimate the output current Iout as described in Chapter 2.2.1.1.
The internal reference current I_out_set is weighted according to thermal management and dimming curve. The
average estimated output current is compared with the weighted reference current to generate an error
signal. The error signal is fed into a PI regulator to control the PWM at pin GD for the power MOSFET. The
coefficients of the PI regulator are configurable.
The PI regulator allows different modes of operation as shown in Figure 8:
•Quasi-resonant mode (QRM)
This mode controls the on-time and maximizes the efficiency by switching on at the 1st valley of the VAUX
signal. This ensures zero-current switching with a minimum of switching losses.
Discontinuous mode (DCM)
This mode is used if the on-time cannot be reduced further in QRM while the output is being dimmed. The
controller will extend the switching period later than the 1st valley to control the output power.
Active-Burst mode (ABM)
To extend the dimming range even further, ICL8105 features an ABM which is automatically aligned with
the input frequency to avoid any undesired effects like flicker or shimmer as well as to reduce any audible
noise.
The controller will autonomously select the best mode of operation based on operation conditions like input
voltage, input frequency and dimming input voltage which defines the output power.
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ICL8105 - Digital Flyback Controller IC
Datasheet
Functional description
Figure 8 Overview of operation modes
2.2.3 Power factor correction (PFC)
The gate driver GD is used for driving the power MOSFET of the flyback. Constant output current regulation
and a sinusoidally shaped input current are achieved by on-time control. The quasi-constant on-time ton
ensures high PF and low THD performance. The internal control signal ton is calculated by the digital engine so
that the output current is close to the target current (Chapter 2.2.2).
Optionally, an enhanced PFC (EPFC) scheme can be enabled to compensate the input current distortion
caused by the EMI filter1). In this scheme, the on-time is a function of the internal controller signal ton, the input
voltage Vin, output voltage Vout, output current Iout, phase angle and a configurable gain parameter (C_EMI)
optimizing the input current waveform (Chapter 2.4).
2.2.4 Dimming via pin DIM/UART
The voltage sensed at pin DIM/UART is used to determine the output current level. Figure 9 shows the relation
of DIM/UART voltage to the output current target value. Levels of V_DIM_min and V_DIM_max2) ensure that
minimum current I_out_dim_min and maximum current I_out_set can always be achieved, making the application
robust against dimmer and other component tolerances. The sampled voltage VDIM at pin DIM/UART is digitally
filtered to stabilize light output. The ICL8105 can also be configured to use a linear or a quadratic dimming
curve.
Figure 9 Dimming curves for pin DIM/UART
1) Patent pending
2) fixed at 1.72V
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ICL8105 - Digital Flyback Controller IC
Datasheet
Functional description
Optionally, The output current can be turned off completely when DIM/UART voltage is V_DIM_off or below.
Note: The dim-to-off feature requires an active voltage source to exit the dim-to-off state.
In some cases where the dimming control circuitry is on the primary side and it is using PWM control, please
refer ICL8105 design guide for the RC low pass filter circuit which will convert the PWM dimming signal to an
analog dimming voltage for measurement on pin DIM/UART.
2.2.5 Isolated dimming interface with CDM10V (optional)
Figure 10 shows an exemplary schematic of a 0-10V dimming interface for low BOM cost, using CDM10V by
Infineon. CDM10V is a fully integrated 0-10V dimming interface IC which transmits secondary side analog
voltage based signals from 0-10V dimmer to primary side, by driving an external opto-coupler with a 5mA
current based PWM signal. The secondary auxiliary winding is necessary to supply the operating voltage of
CDM10V. For more details about CDM10V, please visit Infineon website: http://www.infineon.com/cdm10v
Figure 10 Optional circuit for isolated dimming with CDM10V
Datasheet 13 Rev. 2.0
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ICL8105 - Digital Flyback Controller IC
Datasheet
Functional description
2.2.6 Wide output load voltage range circuit (optional)
If wide output load voltage (more than 2 times of the minimum output load voltage) is required, a regulator
for VCC is required. This regulator limits the maximum voltage at pin VCC during steady state operation.
Figure 11 shows an exemplary schematic for the optional wide output voltage range support. A wide output
voltage range impacts efficiency due to the necessary voltage regulator for VCC.
Figure 11 Optional wide output voltage range circuit
2.2.7 Automatic output discharge circuit (optional)
In case of a fault (e.g. Open Load) the output capacitors stay charged and may keep a high voltage. It is
therefore recommended to add an automatic output discharge circuit. This circuit discharges the output
capacitors if the main switch stops switching. For the circuit design, please refer the schematic in the
application note of the ICL8105 40W reference design with CDM10V.
2.2.8 VCC startup function combined with direct input monitoring
There are two main functions supported at pin HV which needs to be connected to the input voltage via
resistor and two diodes.
The integrated HV startup-cell is switched on during the VCC startup phase before the IC is activated. Current
flows from pin HV to pin VCC via an internal diode, which charges the capacitor at pin VCC. Once the voltage
at pin VCC exceeds the VVCCon threshold, the IC enables the active operating phase and switches off the HV
startup-cell.
Furthermore, a direct input monitoring is supported that is controlled by an internal timer. The timer switches
on the HV startup cell for a very short time after a defined period. During this short on-time the current is
sensed at pin HV by a comparator to synchronize to frequency and phase of the input voltage.
2.2.9 Configurable soft start
After startup, the IC initiates a soft-start. During soft-start, the switching stress for the power MOSFET, diode
and transformer is minimized. The cycle-by-cycle current limit is increased in steps with a configurable time
t_ss for each step. The number of soft start steps is defined by parameter n_ss1). After the final CS limit level has
been reached, the output will be charged up with maximum on-time and maximum CS limitation level to the
minimum output voltage that ensures self-supply, V_out_start. After the minimum output voltage has been
reached, the current control loop (Chapter 2.2.2) takes over and output undervoltage protection is activated
(if enabled by configuration).
1) fixed at 3
R
VCCreg
C
VCCreg
VCC
C
VCC
ZD
VCCreg
GND
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Functional description
2.2.10 Configurable gate voltage rising slope at pin GD (Lower EMI)
The gate driver output signal can be configured with respect to the rising slope for switching on the power
MOSFET. This feature can save BOM components (1 diode & 1 resistor) which are conventionally added to
achieve the same purpose for EMI improvement. The maximum gate drive current I_GD_pk for the gate driver
slope can be set between 30 mA and 118 mA (Chapter 2.4). Figure 12 shows the gate driver output signal.
Figure 12 Configurable gate voltage rising slope for lower EMI
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Functional description
2.3 Protection features
Table 4 gives an overview about the available protection features and corresponding default actions in case
a protection feature is triggered. Two protection reactions (auto restart mode and latch mode) are
implemented.
Auto restart mode
Once the auto restart mode is activated, the IC stops the power MOSFET switching at pin GD and reduces the
current consumption to a minimum. After the configurable auto restart time t_auto_restart the IC initiates a new
start-up1). During this auto restart the HV startup-cell is switched on and off in order to keep the VCC between
VUVLO and VOVLO thresholds2). The auto restart cycle starts first with charging the VCC capacitor by means of
switching on the HV startup cell until the VVCCon threshold is exceeded. A regular startup procedure with soft
start is initiated afterwards.
Latch mode
When latch mode is activated, the power MOSFET switching at pin GD is immediately stopped. The HV startup-
cell is switched on and off in order to keep the VCC between VUVLO and VOVLO thresholds. The device stays in this
state until input voltage is completely removed and the VCC voltage drops below the VUVLO threshold. The IC
can then be re-started by applying input voltage.
1) After t_auto_restart, the VCC will be charged to VVCCon again(see Chapter 2.2.8). Therefore, the effective auto-restart time is longer
than t_auto_restart
2) This feature can be disabled for applications with externally supplied VCC.
Table 4 Protection Features
Protection Feature Active Period
(if enabled)
Reaction Description
Undervoltage lockout for VCC Always on Hardware restart Chapter 2.3.1
Overvoltage protection for VCC Always on Latch mode1)
1) Protection which its reaction can be configured to either auto restart mode or latch mode.
Chapter 2.3.2
Overvoltage protection for Vout Always on Auto restart1) Chapter 2.3.3
Undervoltage protection for Vout Activated after startup2)
2) Protection which can be disabled or enabled by configuration.
Auto restart Chapter 2.3.3
Startup Undervoltage protection for Vout During startup Auto restart Chapter 2.3.3
Overvoltage protection for Vin Always on2) Latch mode Chapter 2.3.4
Undervoltage protection for Vin Always on2) Auto restart Chapter 2.3.4
Input overcurrent detection level 1 Always on Current limiting Chapter 2.3.5
Input overcurrent protection level 2 Always on Latch mode Chapter 2.3.6
Output current protection (average) Activated after startup2) Auto restart Chapter 2.3.7
Output current protection (peak) Activated after startup2) Auto restart Chapter 2.3.7
Overtemperature protection Always on Latch mode Chapter 2.3.8
Firmware protections
(1st Watchdog & RAM Parity)
Always on Auto restart Chapter 2.3.9
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Functional description
2.3.1 Undervoltage lockout for VCC
An undervoltage lockout unit (UVLO) is implemented which ensures a defined enabling and disabling of the IC
operation depending on the supply voltage at pin VCC. The UVLO contains a hysteresis with the voltage
thresholds VVCCon for enabling the IC and VUVOFF for disabling the IC. Once the mains input voltage is applied,
current flows through an external resistor into pin HV via the integrated diode to pin VCC. The IC is enabled
once VCC exceeds the threshold VVCCon and enters normal operation if no fault condition is detected. In this
phase VCC will drop until the self supply via the auxiliary winding takes over the supply at pin VCC. For proper
startup, the self supply via auxiliary winding must be in place before the timeout of t_start_max occurs (See
Chapter 2.3.3) or before VCC falls below VUVOFF threshold.
2.3.2 Overvoltage protection for VCC
Overvoltage detection at pin VCC is implemented via a threshold of V_VCC_max.
2.3.3 Over / undervoltage protection for output voltage
Overvoltage (e.g. Open Load) or undervoltage (e.g. Output short) detection of the output voltage Vout is
provided by the measurement and calculation as described in Chapter 2.2.1.3. The overvoltage detection
thresholds V_outOV is configurable while the undervoltage detection threshold V_outUV is fixed at 50% of the
configurable V_out_dim_min threshold. Output undervoltage protection is disabled during startup. For output
overvoltage protection in auto-restart reaction, either slow or fast auto-restart can be selected. The startup
threshold V_out_start has to be configured below the fully dimmed minimum output load voltage, V_out_dim_min.
Note: Please note that there are possibilities where critical protection like output over-voltage not working
properly (example: wrong parameter configurations loaded). Thus, please consider adding zener diode
or any voltage suppressor device/circuit on output for reinforced safety purpose.
Note: It is mandatory to have output discharge resistor/circuit which discharges the output capacitor after
triggering open load protection at V_outOV. Latch reaction is recommended for open load protection as
it can shut down the unit to prevent output overcharged if the discharge resistor ohmic value is too high.
In case of output short/under-voltage, the auxiliary winding cannot provide power to VCC during startup. Such
failure condition is detected if output voltage has not reached V_out_start before a timeout of t_start_max occurs
Figure 13 Voltage threshold for output over / undervoltage protection
2.3.4 Over / undervoltage protection for input voltage
An over / undervoltage detection of the input voltage Vin is provided by the measurement and calculation as
described in Chapter 2.2.1.2. Peak values of Vin are compared to the configurable internal input over /
undervoltage protection thresholds V_inOV and V_inUV (Chapter 2.4).
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Functional description
Figure 14 shows an exemplary setting of both over- and undervoltage thresholds together with configurable
startup thresholds V_in_start_min and V_in_start_max to create hysteresis for flicker-free operation at auto-restart.
Figure 14 Voltage threshold for input over / undervoltage protection
2.3.5 Input overcurrent detection level 1 (OCP1)
The input overcurrent protection level 1 is performed by means of the cycle-by-cycle peak current limitation
to V_OCP1. A leading edge blanking, t_CSLEB prevents the IC from falsely switching off the power MOSFET due to
a leading edge spike.
2.3.6 Input overcurrent protection level 2 (OCP2)
The input overcurrent protection level 2 is meant for covering fault conditions like a short in the transformer
primary winding. In this case overcurrent protection level 1 will not limit properly the peak current due to the
very steep slope of the peak current. Once the threshold V_OCP2 is exceeded for longer than t_CSOCP2, the
protection is triggered.
2.3.7 Output overcurrent protections
The ICL8105 includes protections against exceeding an average and peak current limit. The average output
current is calculated over one half cycle of the input frequency to remove the output current ripple. With auto-
restart reaction, either slow auto-restart or fast auto-restart can be selected.
2.3.8 Overtemperature protection
ICL8105 offers a conventional as well as an adaptive overtemperature protection scheme using an internal
temperature sensor.
Note: Please note that the internal temperature sensor may not be able to sense and protect the temperature
of external components (e.g. power MOSFET, VCC regulator) without sufficient thermal coupling.
Conventional overtemperature protection
The overtemperature protection initiates a thermal shutdown once the internal temperature detection level
T_critical is reached. With latch mode protection, IC will turn off and only restart after recycling of input power.
At startup, junction temperature has to be below T_start.
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Functional description
Figure 15 Conventional temperature protection
Adaptive temperature protection
To protect load and driver against overtemperature, ICL8105 features a reduction of output current below
maximum current I_out_set. As long as temperature T_hot is exceeded, the current is gradually reduced as shown
in Figure 16. If a reduction down to a minimum current I_out_red is not able to compensate the increase of
temperature, IC will turn off at temperature T_critical.
Figure 16 Adaptive temperature protection
2.3.9 Firmware protections
ICL8105 includes several protections to ensure the integrity and flow of the firmware:
A hardware watchdog triggers a protection in case the firmware does not service the watchdog within a
defined time period.
A RAM parity check triggers a protection in case a bit in the memory flips.
A cyclic redundancy check (CRC) at each startup verifies the integrity of firmware and parameters.
A first firmware watchdog triggers a protection if the ADC hardware cannot provide all necessary
information within a defined time period. This may occur if timing requirements for the ADC are exceeded.
A second firmware watchdog triggers a protection if the execution of protection checks and the control
loop are not matching a defined time period. This may occur if timing requirements are exceeded (e.g.
operation beyond frequency limits).
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Functional description
2.4 Configuration and support
The configuration of ICL8105 is supported by the GUI tool .dp vision provided by Infineon. This chapter
describes the configuration procedure via the UART interface. Furthermore, it contains an overview about the
parameters and functions that can be configured.
2.4.1 Configuration procedure and design-in support
Figure 17 shows the setup for the configuration of ICL8105. The Infineon graphic user interface (GUI) .dpVision
connects to ICL8105 via the isolated USB interface board called .dp Interface Gen2. The .dp interface Gen 2
provides power via VCC to ICL8105 and connects via UART interface at pin DIM/UART. The common UART
interface enables communication with the IC even without the interactive GUI tool. This allows easy
configuration during mass production.
When VCC exceeds the VVCCon threshold, ICL8105 will sense pin DIM/UART for a UART connection. If power is
provided by VCC and no input voltage is applied at startup, ICL8105 will enter configuration mode. Also,
ICL8105 will enter configuration mode if no parameters have been programmed so far, regardless of input
voltage being applied or not.
Figure 17 Setup for configuration of the IC
For project development, a graphic user interface called .dp Vision guides the designer through the
configuration of parameters. Further information on .dp Vision can be found in the .dp Vision User Manual
provided by Infineon.
For production and end user configuration, a simpler graphic user interface called XDP™ GUI is also available.
The configurable parameters and configuration range of each parameter in the XDP™ GUI can be customized
using the XDP™ GUI Builder software provided by Infineon. Please refer the user manual of this GUI Builder for
more details.
The dimensioning of the application design(e.g. transformer design, BOM selection, IC parameterization) can
be done easily with an excel tool named ICL8105 system simulation & design creation tool. An ICL8105 40W
reference design with CDM10V is available from Infineon to demonstrate the features and performance. The
ICL8105 design guide presents the dimensioning process while the reference design application note presents
the board performance, fine tuning guide, debugging guide and frequently asked questions.
2.4.2 Overview configurable parameters and functions
The ICL8105 provides a generic firmware version that includes all configurable parameters set to zero. The
parameter values need to be specified by the user according to the target application. Table 5 lists the
configurable parameters. Table 6 lists the non configurable parameters which the values are constant or
adapted internally according to the configurable parameters settings.
Table 5 List of configurable parameters
Description Parameter Example Configuration Range
Hardware configuration
Iout set point (non-dimmed) I_out_set 880 mA Calculated by GUI
PC with
GUI tool
Isolated USB
interface
board
IC
USB
VCC
GND
DIM/UART
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Functional description
Transformer primary winding turns N_p 58 > 0
Transformer secondary winding turns N_s 15 > 0
Transformer auxiliary winding turns N_a 15 > 0
Transformer nominal primary Inductance L_p 0.544 mH Calculated by GUI
Current sense resistor R_CS 0.22 ohm Calculated by GUI
Pin CS OCP1 limitation threshold V_OCP1 0.49 V Calculated by GUI
Pin ZCD series resistor R_ZCD_1 56.2 kohm Calculated by GUI
Pin ZCD shunt resistor R_ZCD_2 2.00 kohm Calculated by GUI
Vcc Voltage Supply Type VCC_SUPPLY Wide [External, Narrow,
Narrow_24.9V, Wide]
Vcc capacitor total capacitance C_VCC 15.0 uF Calculated by GUI
Output capacitor maximum Voltage Rating V_out_cap_rating 63 V 0
Pin HV series resistor R_HV 66 kohm Calculated by GUI
Gate driver peak source current I_GD_pk 49 mA 30 mA to 118 mA (with few
mA change per step)
Protections
Auto restart time t_auto_restart 1 s 0.1 s to 25.5 s1)
Fast auto restart time t_auto_restart_fast 0.4 s 0.1 s to 25.5 s1)
Output OVP / Open Reaction Reaction_OVP_Vout Auto restart [Auto restart, Latch mode]
Auto restart speed for output OVP Speed_OVP_Vout Slow [Slow, Fast]
Output OVP threshold V_outOV 48.4 V V_out_dim_min to V_out_cap_rating
Enable output UVP / Short Protection EN_UVP_Vout Enabled [Enabled, Disabled]
Timeout for short detection at startup t_start_max 10.0 ms Calculated by GUI
Enable Maximum Average output OCP EN_Iout_max_avg Enabled [Enabled, Disabled]
Enable Maximum Peak output OCP EN_Iout_max_peak Enabled [Enabled, Disabled]
Maximum peak Output OCP threshold I_out_max_peak 1980 mA Calculated by GUI
Auto restart speed for output OCP Speed_OCP_Iout Slow [Slow, Fast]
Enable Input OVP EN_OVP_In Enabled [Enabled, Disabled]
Enable Input UVP EN_UVP_In Enabled [Enabled, Disabled]
Input OVP threshold V_inOV 329 Vrms2) Calculated by GUI
Maximum startup input voltage V_in_start_max 329 Vrms2) V_in_start_min to V_inOV
Minimum startup input voltage V_in_start_min 72 Vrms2) V_inUV to V_in_start_max
Input UVP threshold V_inUV 62 Vrms2) Calculated by GUI
Vcc OVP Reaction Reaction_VCCP Latch mode [Auto restart, Latch mode]
Enable Debug mode Debug_mode Disabled [Enabled, Disabled]
Temperature guard
Table 5 List of configurable parameters (cont’d)
Description Parameter Example Configuration Range
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Functional description
Overtemperature detection threshold T_critical 119 °C 110°C to (TJ(max) - 6°C)
Enable adaptive temperature protection EN_ITP Enabled [Enabled, Disabled]
Temperature to start derating of Iout T_hot 110 °C 0 °C to T_critical
Minimum Iout for adaptive temperature
protection
I_out_red 220 mA 0 mA to I_out_set
Time step for each Iout derating t_step 10 s 2 s to 20 s
Startup & shutdown
Soft start timestep t_ss 0.5 ms Calculated by GUI
Minimum Vout when fully dimmed V_out_dim_min 11.9 V V_out_start to V_outOV
Vout to start constant current control loop V_out_start 9.5 V V_outUV to V_out_dim_min
Initial mode of operation control_loop_init DCM [ABM, DCM, QRM]
Initial DCM frequency at startup f_DCM_init 12 kHz f_sw_min_DCM to f_sw_max
Initial number of ABM pulses at startup N_ABM_init 100 Calculated by GUI
Control loop
QRM PI regulator proportional coefficient PI_KP_QRM 550 10 to 3000
QRM PI regulator integral coefficient PI_KI_QRM 8 1 to 1000
DCM PI regulator proportional coefficient PI_KP_DCM 17000 100 to 30000
DCM PI regulator integral coefficient PI_KI_DCM 200 10 to 10000
ABM PI regulator proportional coefficient PI_KP_ABM 64 1 to 600
ABM PI regulator proportional coefficient PI_KI_ABM 32 1 to 200
Dimming
Enable DImming EN_DIM Enabled [Enabled, Disabled]
Pin DIM/UART voltage for minimum Iout V_DIM_min 0.2 V V_DIM_off to V_DIM_max
Minimum Iout when fully dimmed I_out_dim_min 88 mA Calculated by GUI
Dimming curve shape C_DIM Quadratic [Linear, Quadratic]
Enable dim-to-off EN_DIM_TO_OFF Disabled [Enabled, Disabled]
Pin DIM/UART voltage for dim-to-off V_DIM_off 0.18 V 0.1 V to V_DIM_min
Enable Square Wave Output for pin SQW EN_SQW Disabled [Enabled, Disabled]
Multimode
Maximum switching frequency f_sw_max 180.8 kHz Calculated by GUI
Maximum on-time t_on_max 11.3 us Calculated by GUI
Minimum on-time t_on_min 1.1us 1 us to t_on_max
Minimum demagnetization time t_min_demag 3.0 us 2 us to 10 us
Minimum switching frequency in DCM f_sw_min_DCM 12 kHz 3 kHz to 20kHz
Enable Active Burst Mode EN_ABM Disabled [Enabled, Disabled]
Enhanced PFC
Table 5 List of configurable parameters (cont’d)
Description Parameter Example Configuration Range
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Functional description
Enhanced PFC compensation gain C_EMI 0.1000 uF 0
Fine tuning
ZCD propagation delay compensation t_ZCDPD 410 ns 0 ns to 1000 ns
CS Propagation delay compensation t_PDC 200 ns 0 ns to 1000 ns
Transformer coupling T_coupling 1.020 0.000 to 2.000
Input voltage drop compensation R_in 11.9 ohm 0
Switching period modulation attenuation N_DCM_mod_gain 8 [0, 8, 16, 32]
Temperature compensation for VDIM a_DIM 0mV/K -8 mV/K to 8 mV/K
1) The auto-restart time has to be chosen sufficiently large enough to avoid a stepping up of the output voltage which
would exceed the output overvoltage level.
2) The input voltage levels refer to AC RMS voltage. If a programmed ICL8105 is operated with both AC or DC, the
threshold for DC input voltage is 1.41 times the threshold for AC RMS input voltage.
Table 6 List of non-configurable parameters
Description Parameter Value Notes
Hardware configuration
Transformer primary leakage inductance L_p_lk L_p * 1% uH
Output diode voltage drop V_out_diode_drop 0.7 V
Gate driver high voltage V_GD 10.5 V
Protections
Output UVP / Short Reaction Reaction_UVP_Vout Auto restart
Output UVP threshold (at steady state) V_outUV V_out_dim_min
*50% V
Steady state Output UVP blanking time t_Vout_blank 1ms
Maximum Average output OCP Reaction Reaction
_Iout_max_avg
Auto restart
Maximum Average Output OCP threshold I_out_max_avg I_out_set *
150% mA
Maximum Peak output OCP Reaction Reaction
_Iout_max_peak
Auto restart
Input OVP Reaction Reaction_OVP_Vin Latch mode
Input UVP Reaction Reaction_UVP_Vin Auto restart
Input OCP2 / Short Winding Reaction Reaction_OCP2 Latch mode
Vcc OVP Threshold V_VCC_max 24 V or 24.9V if VCC_SUPPLY = Narrow_24.9V,
24.9V. Otherwise, 24V
Hardware reaction for Firmware Protection
(Watchdog, RAM parity)
Reaction_HW Auto restart
Temperature guard
Overtemperature Reaction Reaction_TP Latch mode
Table 5 List of configurable parameters (cont’d)
Description Parameter Example Configuration Range
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Functional description
Maximum startup temperature T_start T_hot -2°C or
T_critical -2°C
if EN_ITP = enabled, T_hot -2°C,
otherwise T_critical -2°C
Iout reduction in each derating step I_out_step I_out_set/80
Startup & shutdown
Number of soft start steps n_ss 3
Dimming
Pin DIM/UART voltage for maximum Iout V_DIM_max 1.72 V
Square-wave frequency for SQW pin f_SQW 160 kHz
Square-wave voltage for pin SQW V_SQW 7.5 V
Multimode
Minimum switching frequency in QRM f_sw_min_QRM 20 kHz
Enable DCM EN_DCM Enabled
Fine tuning
Spike blanking time for OCP2 trigger t_CSOCP2 240 ns
Leading edge blanking time t_CSLEB 480 ns
ZCD ringing suppression time t_ZCDring 1200 ns
Blanking time for CCM protection t_CCM 10 ms
Number of digital filter stages for VDIM N_DIM_Filter 6
Table 6 List of non-configurable parameters (cont’d)
Description Parameter Value Notes
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Functional description
2.4.3 Debug mode support
If an unexpected system protection was triggered during testing, user can set parameter Debug_mode to
“Enabled”, which allows the firmware status code readout from the IC to debug which protection was
triggered.
For example in Figure 18, the firmware status code readout in the GUI shows a number of 0x0001 (in red
colour), which the description shows that the output over-voltage protection has been triggered. The
description of the status code will be shown automatically when the mouse pointer is hovered around the
status code.
Note: if there is no protection being triggered, the firmware status code should be 0x0000 (in black colour)
Figure 18 Firmware status code readout for debugging
Please kindly refer the application note for details on the necessary setup & procedures to read out the
firmware status code in debug mode.
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Electrical Characteristics
3 Electrical Characteristics
All signals are measured with respect to ground (pin 8). The voltage levels are valid if other ratings are not
violated.
3.1 Package Characteristics
3.2 Absolute Maximum Ratings
Absolute maximum ratings (Table 8) are defined as ratings which when being exceeded may lead to
destruction of the integrated circuit. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability. Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the integrated circuit. These values are not tested during production test.
Table 7 Package Characteristics
Parameter Symbol Limit Values Unit Remarks
min max
Thermal resistance from junction to
ambient
RthJA 178 K/W PG-DSO-81)
1) JEDEC 1s0p at Pv = 140 mW
Table 8 Absolute Maximum Ratings
Parameter Symbol Limit Values Unit Remarks
min max
Voltage externally supplied at pin
VCC
VCC -0.5 26 V
Voltage at pin GD VGD -0.5 VCC + 0.3 V
Voltage at pin SQW VSQW -0.5 VCC + 0.3 V
Ambient temperature TA-40 85 °C 136.4kHz < f_sw_max 180.8kHz
-40 105 °C f_sw_max 136.4kHz
Junction temperature TJ-40 125 °C 136.4kHz < f_sw_max 180.8kHz
-40 1501) °C f_sw_max 136.4kHz
Storage temperature TS-55 150 °C
Soldering temperature TSold 260 °C Wave soldering2)
ESD capability HBM VHBM 2000 V Excluding pin HV3)
ESD capability HBM VHBM 1500 V Pin HV3)
Voltage at pin ZCD VZCD -0.5 3.6 V
Voltage at pin CS VCS -0.5 3.6 V
Voltage at pin DIM/UART VDIM/UART -0.5 3.6 V
Maximum transient input clamping
for pins ZCD and CS
-ICLN_TR —10 mA
4)
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Electrical Characteristics
3.3 Operating Conditions
Table 9 shows the recommended operating range where the electrical characteristics shown in Chapter 3.4
are valid for.
Maximum permanent input
clamping current for pins ZCD and CS
-ICLN_DC —5 mA
Permanently applied as DC
value
Maximum negative transient input
voltage at pin ZCD
-VIN_ZCD —1.5V
4)
Maximum negative transient input
voltage at pin CS
-VIN_CS —3.0V
4)
Maximum current into pin HV IHV —10 mA
Voltage at pin HV VHV 600 V
1) Auto-restart may be delayed at low input voltage condition when junction temperature is above 125°C
2) According to JESD22A111 Rev A
3) ESD-HBM according to ANSI/ESDA/JEDEC JS-001-2012.
4) Only valid during transitions, allowed for maximum 2 µs and with a duty cycle of maximum 10%. Values for DC
operation, see absolute maximum table.
Table 9 Operating Range
Parameter Symbol Limit Values Unit Remarks
min max
Lower VCC limit VCC VUVOFF V Device is held in reset
when VCC < VUVOFF
Voltage externally supplied to VCC
pin
VCCext 24 V Maximum voltage that can
be applied to pin VCC by
an external voltage source
Voltage at pin GD VGD -0.3 VCC + 0.3 V
Voltage at pin SQW VSQW -0.3 VCC + 0.3 V
Table 8 Absolute Maximum Ratings (cont’d)
Parameter Symbol Limit Values Unit Remarks
min max
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Electrical Characteristics
3.4 DC Electrical Characteristics
The electrical characteristics involve the spread of values given within the specified supply voltage and
junction temperature range, TJ from -40 °C to +125 °C. Typical values represent the median values related to
TA = 25 °C. All voltages refer to GND, and the assumed supply voltage is VCC = 18 V, if not specified otherwise.
The following characteristics are specified
Power supply (Table 10)
Clock Oscillators (Table 11)
Internal temperature sensor (Table 12)
•Pin ZCD (Table 13)
•Pin DIM/UART (Table 14)
•Pin CS (Table 15)
•Pin GD (Table 16)
•Pin HV (Table 17)
•Pin SQW (Table 18)
Table 10 Electrical Characteristics of the Power Supply
Parameter Symbol Values Unit Note or
Test Condition
Min. Typ. Max.
VCC turn-on threshold VVCCon 19 20.5 22 V dVCC/dt = 0.2 V/ms
VCC turn-off threshold VUVOFF -5% 6 +5% V
VCC UVOFF current IVCCUVOFF 52040mAV
CC < VVCCon(min)- 0.3 V
VCC threshold for turning on
HV startup cell in auto restart
and latch mode
VUVLO -5% 7.5 +5% V
VCC threshold for turning off
HV startup cell in auto restart
VOVLO 20.5 V
VCC average quiescent
current in latched mode
IVCCqu,latch 0.3 0.48 mA Tj 85°C, Latch mode
——1.2mATj 125°C, Latch mode
VCC average quiescent
current in auto restart mode
IVCCqu,restart 0.3 0.48 mA Tj 85°C, Off phase in
auto restart mode
——1.2mATj 125°C, Off phase in
auto restart mode
VCC voltage for OTP
programming
VPP 7.35 7.5 7.65 V Operational values,
not tested in
production test
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Electrical Characteristics
Table 11 Electrical Characteristics of the Clock Oscillators
Parameter Symbol Values Unit Note or
Test Condition
Min. Typ. Max.
Main clock oscillator period tMCLK 15.0 15.8 16.6 ns 136.4kHz < f_sw_max
180.8kHz
20.0 20.9 22.0 ns f_sw_max 136.4kHz
DCM Minimum switching
frequency
f_sw_min_DCM -5.1% 1) +5.3% kHz
Maximum switching frequency f_sw_max -5.1% 1)
1) See configuration chapter
+5.3% kHz
Table 12 Electrical Characteristics of the Internal Temperature Sensor
Parameter Symbol Values Unit Note or
Test Condition
Min. Typ. Max.
Internal Temperature sensing T_critical,
T_start,
T_hot
-6 1)
1) See configuration chapter
+6 °C 3 sigma deviation by
lab characterization,
not tested in
production
Table 13 Electrical Characteristics of pin ZCD
Parameter Symbol Values Unit Note or
Test Condition
Min. Typ. Max.
ZCD clamping of negative
voltages
-VINPCLN 150 180 220 mV analog clamp
activated
ZCD threshold VZCDdet 52035mV
ZCD clamping current -IIV 0.021 3.14 mA
ZCD voltage sensing VZCDSH 0.067 2.61 V
ZCD S&H delay of input buffer
referring to positive jump of
ZCD voltage
tZSHST ——2.0µsnot tested in
production
Table 14 Electrical Characteristics of pin DIM/UART
Parameter Symbol Values Unit Note or
Test Condition
Min. Typ. Max.
Dimming mode voltage VDIM 0.1 2.0 V
Datasheet 29 Rev. 2.0
2016-08-01
ICL8105 - Digital Flyback Controller IC
Datasheet
Electrical Characteristics
UART mode output low
voltage
VUARTLow ——0.8VIOL = 2 mA
UART mode output high
voltage
VUARTHigh 2.2——VIOH = -2 mA
Table 15 Electrical Characteristics of pin CS
Parameter Symbol Values Unit Note or
Test Condition
Min. Typ. Max.
CS voltage threshold for 1st
level overcurrent protection
V_OCP1 -5% 1)
1) see configuration chapter
+5% V V_OCP1 = 1.08V, 0.72V or
0.54V
-5% 1) +8% V_OCP1 = 0.36V
CS voltage threshold for 2nd
level overcurrent protection
V_OCP2 -5% 1.6 +5% V 0.72V < V_OCP1 1.08V
-5% 1.2 +5% V 0.54V < V_OCP1 0.72V
-5% 0.8 +5% V 0.36V < V_OCP1 0.54V
-5% 0.6 +5% V 0.34V V_OCP1 0.36V
Table 16 Electrical Characteristics of pin GD
Parameter Symbol Values Unit Note or
Test Condition
Min. Typ. Max.
Output voltage at low state VGDlow ——1.6VI
GD = 5 mA1)
1) Not tested in production test
Output voltage at high state V_GD 10.5 V
Tolerance of output voltage at
high state
VGD -0.5V +0.5V
Output high current I_GD_pk -20% 2)
2) See configuration chapter
+20% mA CLOAD = 2 nF
Discharge current IGDDIS 500 mA VGD = 4V and driver at
low state
Table 17 Electrical Characteristics of pin HV
Parameter Symbol Values Unit Note or
Test Condition
Min. Typ. Max.
Leakage current at pin HV IHVleak ——10mAV
HV = 600 V, HV startup
cell disabled
Table 14 Electrical Characteristics of pin DIM/UART (cont’d)
Parameter Symbol Values Unit Note or
Test Condition
Min. Typ. Max.
Δ
Datasheet 30 Rev. 2.0
2016-08-01
ICL8105 - Digital Flyback Controller IC
Datasheet
Electrical Characteristics
Current for VCC cap charging ILD 3.2 5 7.5 mA VHV = 30 V;
VVCC < VVCCon - 0.3 V
Current into pin HV IHV,max ——9.6mA
Table 18 Electrical Characteristics of pin SQW
Parameter Symbol Values Unit Note or
Test Condition
Min. Typ. Max.
Squarewave frequency f_SQW -5.1% 160 +5.3% kHz
Output voltage at low state VSQWlow ——1.6VI
SQW = 5 mA1)
1) Not tested in production test.
Output voltage at high state V_SQW —V 7.5 V
Tolerance of output voltage at
high state
V_SQW -0.5V +0.5V
Output high current -ISQWH -20% 30 +20% mA CLOAD = 2 nF
Discharge current ISQWDIS 500 mA VSQW = 4V and pin at
low state
Table 17 Electrical Characteristics of pin HV (cont’d)
Parameter Symbol Values Unit Note or
Test Condition
Min. Typ. Max.
Δ
Datasheet 31 Rev. 2.0
2016-08-01
ICL8105 - Digital Flyback Controller IC
Datasheet
Outline dimensions
4 Outline dimensions
Figure 19 PG-DSO-8
Notes
1. You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”:
http://www.infineon.com/products.
2. Dimensions in mm
Does not include plastic or metal protrusion of 0.15 max. per side
-0.05
-0.2
+0.1
5
0.41
Index Marking (Chamfer)
x8
1
1)
4
8
1.27
5
A
0.1
0.2
M
A
(1.5)
0.1 MIN.
1.75 MAX.
C
C
6
±0.2
0.64
0.33 4
-0.2
-0.01
0.2
+0.05
x 45˚
±0.08
1)
±0.25
MAX.
1)
Index
Marking
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Trademarks Update 2014-11-12
Edition 2016-08-01
Published by
Infineon Technologies AG
81726 Munich, Germany
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